NC STATE UNIVERSITY The State of ZettaRAM Center for Embedded Systems Research (CESR) Department of Electrical and Computer Engineering North Carolina.

NC STATE UNIVERSITY

The State of ZettaRAM The State of ZettaRAM

Center for Embedded Systems Research (CESR)Department of Electrical and Computer Engineering

North Carolina State Universitywww.tinker.ncsu.edu/ericro

Eric Rotenberg and Ravi K. Venkatesan*

* Now at Intel Bangalore

NC STATE UNIVERSITY

Eric Rotenberg NANONET 09/14/20062

Goal of TalkGoal of Talk

High level (casual) talk about ZettaRAMConsolidate papers and patents

– Core technology– Three different embodiments– Key novel properties– Implications

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Core TechnologyCore Technology

New memory from ZettaCore– Genesis in DARPA Moletronics– Molecule stores 1 charge (0, +1)– Some molecule types store

multiple charges (0, +1, +2)

Long term– 1 molecule = 1 bit

Near term– Use molecules in aggregate– Molecular capacitor

Porphyrin Molecule

ZettaRAM Molecular Capacitor

Metal

Electrolyte

Metal

Molecules

Linkers

linker

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Molecular CapacitorMolecular Capacitor

Metal (working electrode)

Molecules

Linkers

Electrolyte

Metal (counter electrode)

Vox e- e- e- e- e- e-

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Linker & ElectrolyteLinker & Electrolyte

Neither conduct electronsElectrons tunnel across linkerElectrolyte ions form aligned dipoles

– Electrically interface counter electrode to molecules, yet charged molecules isolated

– Also provide critical charge shielding, prevent huge electric field across short linkers

Intrinsic retention times of 10s of seconds to minutes

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Three EmbodimentsThree Embodiments

Transistor-free CrossbarTwo hybrid molecule/silicon devices

– Flash-like MoleFET– 1T-1C DRAM cell with molecular capacitor

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CrossbarCrossbar

single memory cell

electrolytemoleculeslinkers

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Crossbar FeaturesCrossbar Features

No explicit patterning of cells– Cell forms implicitly between electrodes– Density only limited by wire pitch– Easy path to minimum DRAM density

Silicon free– Easy 3D stacking (no silicon growth)– Deposit on arbitrary surfaces? Flexible memory?

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Crossbar FateCrossbar Fate

Crossbar earliest embodiment 2x2 in the lab Repeatability issues?

– Disturbs due to floating electrode voltages– Better control with transistor switches at intersections

Meanwhile– Moletronics 2nd phase brought transistor fab engineers– Shift towards hybrid molecules/silicon– Leverage predominance of silicon fabrication

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Conventional Flash MemoryConventional Flash Memory

thin oxide

metal floating gate

thin oxide

metal gate

source diffusion

drain diffusion

silicon channel

to wordline

to bitline

Charge state of floating gate modulates Vt

hence Ids

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MoleFET Flash MemoryMoleFET Flash Memory

thin barrier oxide

electrolyte

metal gate

source diffusion

drain diffusion

silicon channel

to wordline

linkers++ + + + + + + + + + +molecules to bitline

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MoleFET FeaturesMoleFET Features

Fixed charge provides discreteness– Remarkable accuracy compared to “continuous” floating gate

– Robust, work within tighter noise margins

– Path to smaller devices

Discreteness especially benefits multi-bit storage– Multi-bit successful in Flash domain

– Molecules with multiple discrete charge states makes multi-bit much easier

00

01

10

11

0

+1

+2

+3

Vprog > Vox1

Vprog > Vox2

Vprog > Vox3

Flash MoleFET

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MoleFET IssuesMoleFET Issues

Striving for larger Vt shift

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Conventional 1T-1C DRAM CellConventional 1T-1C DRAM Cell

Word Line

Bit

Lin

e

capacitor

access transistor

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1T-1C DRAM Derivative1T-1C DRAM Derivative

source diffusion

drain diffusion(working electrode)

silicon channel

WORDLINE

BIT

LIN

E

metal (counter electrode)

electrolyte

oxide

gate

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DRAM Voltage Scaling LimitsDRAM Voltage Scaling Limits

Q

V

Qcrit

Vox

Q

VVmin

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ZettaRAM’s Power Scaling AdvantageZettaRAM’s Power Scaling Advantage

Qcrit nearly constant due to noise sources– Sense amp margins– Bitline imbalances– Leakage– Radiation

Conventional DRAM– Charge-voltage coupling, Q = CV– Charge constrains voltage

ZettaRAM derivative– Charge-voltage decoupling– Fixed charge independent of voltage– Charge does not constrain voltage

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DRAM Voltage Scaling LimitsDRAM Voltage Scaling Limits

Q

V

Qcrit

Vox

Q

VVmin

• Hard to increase C• Even harder when reducing 2D area

• Engineer new molecules with lower thresholds

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Key PropertiesKey Properties

Flexibility and Precision Self-Assembly Charge-Voltage Decoupling Speed/Energy Tradeoff Multiple Discrete States Admixtures

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Flexibility and PrecisionFlexibility and Precision

Hundreds of molecules synthesized Significant flexibility in customizing molecular attributes

– Design of organic molecules– Design of attachment groups– Influence surface concentration (density), threshold voltage

(power), electron transfer rate (speed, retention time)

Semiconductors also flexible– But attributes (e.g., threshold voltage) depend on bulk properties– Sophisticated “recipes” required– High cost to achieve precision– Contrast bulk properties with intrinsic chemical properties of

molecules

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Self-AssemblySelf-Assembly

Auto arrangement of molecules in single, uniform, dense monolayer– Autonomous and parallel– Efficient fabrication

Reconsider possibilities thought impractical with conventional tech. Mixed logic/DRAM chips (DRAM embodiment)

– Conventional logic and DRAM processes too different due to stacked capacitors

– Self-assembled monolayers yield high charge density without elaborate stacked capacitor structures

– Apply thin oxide concept of MoleFET to reduce leakage (speed tradeoff) 3D stacking (crossbar embodiment)

– Molecules self-assemble on any compatible surface– Easy path to 3D memory stacking

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Charge-Voltage DecouplingCharge-Voltage Decoupling

Fixed charge independent of voltage Charge does not constrain voltage Power-scalable DRAM derivative extends

roadmap of this important memory technology

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Speed/Energy TradeoffSpeed/Energy Tradeoff

Voltage padded with respect to Vox

– Molecule speed slower as voltage approaches Vox

– Pad write voltage for competitive latency

Opportunity for architectural management Apply “fast voltage” for critical requests and “slow

voltage” for non-critical requests

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Intelligent ManagementIntelligent Management

Hybrid Write Policy

FastQ = 4F: 1.2 V

WB: 1.2 V

SlowQ = 4F: 1.0 V

WB: 1.0 V

HybridQ = 4F: 1.2 V

WB: 1.0 V

HybridQ = 64F: 1.2 V

WB: 1.0 V

HybridEWB, Q = 4

F: 1.2 VWB: 1.0 V

0

0.2

0.4

0.6

0.8

1

no

rma

lized

bit

line

en

erg

y

FastQ = 4F: 1.2 V

WB: 1.2 V

SlowQ = 4F: 1.0 V

WB: 1.0 V

HybridQ = 4F: 1.2 V

WB: 1.0 V


WB: 1.0 V

HybridEWB, Q = 4

F: 1.2 VWB: 1.0 V

0

0.2

0.4

0.6

0.8

1

no

rma

lized

bit

line

en

erg

y

critical fetches

Vfast (high energy)

non-critical writebacks

Vslow (low energy)

FastQ = 4F: 1.2 V

WB: 1.2 V

SlowQ = 4F: 1.0 V

WB: 1.0 V

HybridQ = 4F: 1.2 V

WB: 1.0 V


WB: 1.0 V

HybridEWB, Q = 4

F: 1.2 VWB: 1.0 V

0

0.5

1

1.5

2

no

rmal

ized

exe

cuti

on

tim

e

FastQ = 4F: 1.2 V

WB: 1.2 V

SlowQ = 4F: 1.0 V

WB: 1.0 V

HybridQ = 4F: 1.2 V

WB: 1.0 V


WB: 1.0 V

HybridEWB, Q = 4

F: 1.2 VWB: 1.0 V

0

0.5

1

1.5

2

no

rmal

ized

exe

cuti

on

tim

e

hybridslow

Energy

Time

hybridfast

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Multiple Discrete StatesMultiple Discrete States

Easier multi-bit storage due to discrete states Discreteness reduces variability

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AdmixturesAdmixtures

Different molecules can be mixed in same chip Although hybrid technologies not new:

– Nanotechnology offers new twist– Different molecules can occupy same physical space

admixture

bipartite

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Dual MoleculesDual Molecules

NN

NN

ZnHS

NN

NN

Zn

HO

primary storage molecule

secondary storage molecule

F

F

F

F

F

F F

F

FF

F

F

F

F

F

NN

NN

ZnHSNN

NN

Zn

primary storage molecule secondary storage molecule

F

F

F

F

F

F F

F

FF

F

F

F

F

F

Fe

HO

HO

Fe

O

CH3

O

CH3

primary storage molecule

secondary storage molecule

E. Rotenberg and J. Lindsey.Variable-Persistence Molecular Memory Devices and Methods of Operation Thereof. US Patent #6,944,047.

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PossibilitiesPossibilities

Unusual memory hierarchy– Memories with different attributes (speed, power,

volatility) cohabit same space– New challenges and opportunities for optimizing data

“placement” for power and performance

Admixtures enable different business models– Ship product with multiple molecules but only one

configured– Multiple virtual products in one physical product

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The State of ZettaRAMThe State of ZettaRAM

Contribution– Consolidated and distilled papers and patents– Unified discussion of core technology, embodiments, key

properties, and implications ZettaRAM has signs of disruptive technology

– Cheap fabrication of high perf. memory (by all metrics)– Practical mixed logic/DRAM– Practical 3D memory– Exceeds DRAM power scaling limits– Intelligent power management– Efficient multi-bit storage– Memory hierarchies cohabiting same space– Multiple virtual products in one physical product

NC STATE UNIVERSITY The State of ZettaRAM Center for Embedded Systems Research (CESR) Department of Electrical and Computer Engineering North Carolina.

Documents

voltage slide

crossbar slide

ds slide

minutes slide

molecular capacitor

state of zettaram center

molecular capacitor

c dram cell slide