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ModifiedBooth-1

Apr 07, 2018

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    Modified Booth Multiplier

    Digital Electronics

    Fall 2008Project 2

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    Spring 2006 EE 5324 - VLSI Design II - Kia Bazargan 2

    Booth Multiplier: an Introduction

    Recode each 1 in multiplier as +2-1

    Converts sequences of 1 to 100(-1) Mightreduce the number of 1s

    0 0 1 1 1 1 1 1 0 0

    +1 -1

    +1 -1

    +1 -1

    +1 -1

    +1 -1

    +1 -1

    0 1 0 0 0 0 0 -1 0 0

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    Spring 2006 EE 5324 - VLSI Design II - Kia Bazargan 3

    Booth Multiplier: Recoding (Encoding) Example

    If you use the last row in multiplication, youshould get exactly the same result as using thefirst row (after all, they represent the samenumber!)

    0 1 1 0 1 1 1 0 0 0 1 0

    (+1 -1) (+1 -1) (+1 -1)

    (+1 -1) (+1 -1)

    (+1 -1)

    +1 0 -1 +1 0 0 -1 0 0 +1 -1 0

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    Spring 2006 EE 5324 - VLSI Design II - Kia Bazargan 4

    0 0 1 1 0 6x0 1 1 1 0 14

    +1 0 0 -1 0

    0 0 0 0 0

    1 1 0 1 0 (-6)

    0 0 0 0 0

    0 0 0 0 0

    0 0 1 1 00 0 1 0 1 0 1 0 0 84

    Booth Recoding: Multiplication

    Example

    1 1 1

    Sign extension

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    Spring 2006 EE 5324 - VLSI Design II - Kia Bazargan 5

    Booth Recoding: Advantages and

    Disadvantages

    Depends on the architecture

    Potential advantage: might reduce the # of 1s

    in multiplier

    In the multipliers that we have seen so far:

    Doesnt save in speed

    (still have to wait for the critical path, e.g., the

    shift-add delay in sequential multiplier) Increases area: recoding circuitry AND subtraction

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    Modified Booth

    Booth 2 modified to produce at most n/2+1 partialproducts.

    Algorithm: (for unsigned numbers)

    1. Pad the LSB with one zero.

    2. Pad the MSB with 2 zeros if n is even and 1 zero if n isodd.

    3. Divide the multiplier into overlapping groups of 3-bits.

    4. Determine partial product scale factor from modified

    booth 2 encoding table.

    5. Compute the Multiplicand Multiples

    6. Sum Partial Products

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    Spring 2006 EE 5324 - VLSI Design II - Kia Bazargan 7

    Modified Booth Multiplier: Idea (cont.)

    Can encode the digits by looking at three bits at a

    time Booth recoding table:

    Must be able to addmultiplicand times2, -1,

    0, 1 and 2 Since Booth recoding got

    rid of 3s, generatingpartial products is not that

    hard (shifting andnegating)

    i+1 i i-1 add

    0 0 0 0*M

    0 0 1 1*M

    0 1 0 1*M

    0 1 1 2*M

    1 0 0 2*M

    1 0 1 1*M

    1 1 0 1*M

    1 1 1 0*M

    [Hauck]

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    Modified Booth

    Example: (n=8-bits unsigned)

    1. Pad LSB with 1 zero

    2. n is even then pad the MSB with two zeros

    3. Form 3-bit overlapping groups for n=8 we have 5 groups

    Y3 Y2 Y1 Y0

    Y3 Y2 Y1 Y0

    0

    0

    Y3 Y2 Y1 Y0 0

    0 1 0 0 0

    Y7 Y6 Y5 Y4

    Y7 Y6 Y5 Y4

    0 0 0 1

    Y7 Y6 Y5 Y4

    00

    00

    00

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    Modified Booth

    4. Determine partial product scale factor from

    modified booth 2 encoding table.

    Xi+1 Xi Xi-1 Action

    0 0 0 0 Y

    0 0 1 1 Y

    0 1 0 1 Y

    0 1 1 2 Y

    1 0 0 -2 Y

    1 0 1 -1 Y

    1 1 0 -1 Y

    1 1 1 0 Y

    Groups Coding

    0 0 0 0 Y

    0 1 0 1 Y

    0 1 0 1 Y

    0 0 0 0 Y

    0 0 0 0 Y

    0 1 0 0 00 0 0 100

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    Modified Booth

    5. Compute the Multiplicand Multiples

    0 0 0 0 0 1 0 0 0 8

    0 0 0 0 1 0 1 0 0 200 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Y

    0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 Y

    0 0 0 0 0 0 0 0 1 0 0 0 1 Y

    0 0 0 0 0 0 0 0 0 0 0 Y

    0 0 0 0 0 0 0 0 0 Y

    Groups Coding

    0 0 0 0 Y

    0 1 0 1 Y

    0 1 0 1 Y

    0 0 0 0 Y

    0 0 0 0 Y

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    Compute Partial Products

    0

    Yi-1

    Yi

    Xi-1 Xi Xi+1

    Adders

    Xi+1 Xi Xi-1 Action

    0 0 0 0 Y

    0 0 1 1 Y0 1 0 1 Y

    0 1 1 2 Y

    1 0 0 -2 Y

    1 0 1 -1 Y

    1 1 0 -1 Y

    1 1 1 0 Y

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    Modified Booth

    6. Sum Partial Products

    0 0 0 0 0 1 0 0 0 8

    0 0 0 0 1 0 1 0 0 200 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Y

    0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 Y

    + 0 0 0 0 0 0 0 0 1 0 0 0 1 Y

    0 0 0 0 0 0 0 0 0 0 0 Y

    0 0 0 0 0 0 0 0 0 Y

    0 0 0 0 0 0 0 0 1 0 1 0 0 0 0 0 160

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    Modified Booth

    Booth 2 modified to produce at most n/2+1 partialproducts.

    Algorithm: (for unsigned numbers)

    1. Pad the LSB with one zero.

    2. If n is even dont pad the MSB ( n/2 PPs) and if n is oddsign extend the MSB by 1 bit ( n+1/2 PPs).

    3. Divide the multiplier into overlapping groups of 3-bits.

    4. Determine partial product scale factor from modified

    booth 2 encoding table.

    5. Compute the Multiplicand Multiples

    6. Sum Partial Products

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    Modified Booth

    Example: (n=8-bits unsigned)

    1. Pad LSB with 1 zero

    2. n is even then do not pad the MSB

    3. Form 3-bit overlapping groups for n=8 we have 4 groups

    Y3 Y2 Y1 Y0

    Y3 Y2 Y1 Y0

    0

    0

    Y3 Y2 Y1 Y0 0

    1 0 0 1 0

    Y7 Y6 Y5 Y4

    Y7 Y6 Y5 Y4

    0 1 1 0

    Y7 Y6 Y5 Y4

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    Modified Booth

    4. Determine partial product scale factor from

    modified booth 2 encoding table.

    Xi+1 Xi Xi-1 Action

    0 0 0 0 Y

    0 0 1 1 Y

    0 1 0 1 Y

    0 1 1 2 Y

    1 0 0 -2 Y

    1 0 1 -1 Y

    1 1 0 -1 Y

    1 1 1 0 Y

    Groups Coding

    0 1 0 1 Y

    1 0 0 -2 Y

    1 0 1 -1 Y

    0 1 1 2 Y

    1 0 0 1 00 1 1 0

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    Modified Booth

    5. Compute the Multiplicand Multiples

    1 0 0 1 0 1 0 1 -107

    0 1 1 0 1 0 0 1 1051 1 1 1 1 1 1 1 1 0 0 1 0 1 0 1 1 Y

    0 0 0 0 0 0 1 1 0 1 0 1 1 0 -2 Y

    0 0 0 0 0 1 1 0 1 0 1 1 -1 Y

    1 1 0 0 1 0 1 0 1 0 2 Y

    1 1 0 1 0 1 0 0 0 0 0 1 1 1 0 1 -11235

    Groups Coding

    0 1 0 1 Y

    1 0 0 -2 Y

    1 0 1 -1 Y

    0 1 1 2 Y

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    Spring 2006 EE 5324 - VLSI Design II - Kia Bazargan 17

    Modified Booth Multiplier: Idea (cont.)

    Interpretation of the Booth recoding table:

    i+1 i i-1 add Explanation

    0 0 0 0*M No string of 1s in sight

    0 0 1 1*M End of a string of 1s0 1 0 1*M Isolated 1

    0 1 1 2*M End of a string of 1s

    1 0 0 2*M Beginning of a string of 1s

    1 0 1 1*M End one string, begin new one

    1 1 0 1*M Beginning of a string of 1s

    1 1 1 0*M Continuation of string of 1s

    [Par] p. 160

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    Spring 2006 EE 5324 - VLSI Design II - Kia Bazargan 18

    Modified Booth Recoding: Summary

    Grouping multiplier bits into pairs

    Orthogonal idea to the Booth recoding

    Reduces the num of partial products to half

    If Booth recoding not used have to be able tomultiply by 3 (hard: shift+add)

    Applying the grouping idea to BoothModified Booth Recoding (Encoding)

    We already got rid of sequences of 1sno mult by 3

    Just negate, shift once or twice

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    Spring 2006 EE 5324 - VLSI Design II - Kia Bazargan 19

    Modified Booth Multiplier: Summary

    (cont.)

    Uses high-radix to reduce number ofintermediate addition operands

    Can go higher: radix-8, radix-16

    Radix-8 should implement *3, *-3, *4, *-4 Recoding and partial product generation becomes

    more complex

    Can automatically take care of signedmultiplication

    (we will see why)