MicroprocessorMicrocontrollers

8/7/2019 MicroprocessorMicrocontrollers

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Microprocessors andMicrocontrollers


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Syllabus


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CP356: Microprocessors and MicrocontrollersCREDITS=6 (L=4, T=0, P=2)

(Prereq uisit e: EL206 D igital Circuits)1. Introduction to Microcontrollers : Inte l 805 1 arch itec tu re . Softwa re

arch itec tu re . de tails of SFRs. Port st ructu re s. Extern al mem ory inter face . Interr upt. Ser ial and T imer/c ou nter s facility. Inst ructio n se t and prog ramm ing of 805 1.

2. Programmable I/O ports : Stu dy of Inte l 8255 in m ode s 0, 1 and 2 . Inter face of A/D and D/A c onver ter s wit h m icrocont roller and re lat edSoftwa re .

3 Memory and device selection : Gener atio n of ch ip se lec t logic;

addre ss dec oding for mem ory and I/O po rts ; lat ch ing and buff er ing;deve lop men t of a small 805 1 bas ed m icrocomut er syst em .


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4 . Study of programmable peripheral controllers : Timer/c ou nterdev ice In te l 825 3; keyboa rd and d isplay cont roller In te l 8279 .

5. Serial communication : Synchr onous and asy nchr onous

comm unicatio n . Stu dy of the We st ern D igital 8250comm unicatio n cont roller. Princ iple of op er atio n of modem s. TheEIARS-232C ser ial inter face sta nd ard .

6. Special purpose and 1 6 bit microcotrollers

7. Microcontroller applications : Inter facing of input / output dev ice s,keyboa rd, swit che s, seven segmen t dispaly , LCD display. Design of m icrocont roller bas ed syst em s for ind ust rial appli catio ns,Tem per atu re scanner and we ight me asu remen t syst em s. Embeded Syst em s, its hard wa re and softwa re req uiremen ts.


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REFERENCEBOOKS:1. R.S. Gaonkar

M icrop roce sso r Arch itec tu re, Pr og ramm ing and Appli catio ns wit h 8085APenr am In tern atio nal

2. Muhammad Ali Mazidi

Janice G illispie M azidiThe 805 1 M icrocont roller and Em bedded syst em sPren tice Hall of Ind ia

3. Kenneth J. AyalaThe 805 1 M icrocont roller Arch itec tu re, Pr og ramm ing & Appli catio nsPenr am In tern atio nal

4. V Udayas hankara & M S M allikarjunaswa my8 051 Microcontroller Hardwa re, softwa re and appli catio ns


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CP356: Microprocessors and MicrocontrollersCREDITS=6 (L=4, T=0, P=2)

List of Experiments :

1. Prog rams using arithme tic inst ructio ns of 805 12. Prog rams using logical inst ructio ns of 805 13. Prog rams using cont rol and branch inst ructio ns of 805 14 . Prog rams using sub routi ne inst ructio ns of 805 15. Prog rams using inbuilt timer s of 805 16. Prog rams using inbuilt interr upts of 805 17. Prog rams using inbuilt interr upts of 805 18. Prog rams using inbuilt ser ial facility of 805 19. Inter facing of 8255 wit h 805 110. Inter facing of 8255 wit h 805 111. Inter facing of ADCwit h 805 1

12. Inter facing of DACwit h 805 1


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M a rks Dist ributio n

M a rks d ist ributio n7 0 + 20 + 10 = 100 (theory)

15 (10- Evaluation + 5 - attendance ) + 20(Performance ) + 15(Viva ) = 50 (Practical)Sem ina r Pre sen tatio n (In Performance ) -> 5

Class wo rk Not eboo k(In Evaluation )->3The o ry Assig nmen ts (In Evaluation ) -> 2Q uizzes(In Viva )->5


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Brie f Discussio n

W hat is Computer? CPU -> CU + ALU+ re gist er s M

em o ry -> RAM

(2 TYPES)/ ROM

(4

TYPES) I/P AND O/P DEVICES


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Cont.W hat is Microprocessor? 1960 s CPU designed wit h logic gat es LSI La rge Scale In tegratio n

SSI to LSI calledM

icrop roce sso r M icrocomput er Inte l 4 bit m icrop roce sso r 4 00 4 in 197 1 8 bit m icrop roce sso r 8080 8-bit 8085 (8 bit data bus + 16 bit addre ss bus) 16-bit 8086 ( 16 bit data bus + 20 bit addre ss bus) 16 bit p roce sso rs 8088,80 186,80 188, 80286 32 bit p roce sso rs 80386 , 80 4 86, 80586 (P )


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CPU

General-Purpose

Micro- processor

RAM ROM I/O

Port

TimerSerialCOMPort

Data Bus

Address Bus

General-Purpose Microprocessor System

M icrop roce sso rs:

C PU for C omputers No RAM, ROM, I/O on C PU chip itself Example Intels x86, Motorolas 680x0

Many chips on mothers board

General-purpose microprocessor


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Lim itatio ns of (8085 ) M

icrop roce sso rOper at e s wit h Low sp eedLess pow er ful addre ssing mode andinst ructio n se tLim ited n o. of 8 bit gener al pu rpos e re gist er sLow mem o ry 64 kbyt e s addre ssingRequires e xternal memory to e xecute aprogramCannot directly interfaced with I/O devices.Peripheral chips are needed to interface withI/O devices


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W hat is Microcontroller?

LSI to VLSI called M icrocont rollerTo buil d M icrop roce sso r, mem ory and I/O dev ice s on a single ch ip

Compo nen tsM icrop roce sso rA/D Conver terD/A Conver terPa ralle l I/O In ter faceSer ial I/O In ter faceTimer s and Cou nter s


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RAM ROM

I/OPort

TimerSerialCOMPort

Microcontroller

CPU

A smaller computer On-chip RAM, ROM, I/O ports...Example Motorolas 6811, Intels 8051, Zilogs Z8

A single chip

Microcontroller :


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MicroprocessorC PU is stand-alone, RAM,

ROM, I/O, timer areseparatedesigner can decide on theamount of ROM, RAM andI/O ports.

expansiveversatilitygeneral-purpose

Microcontroller C PU, RAM, ROM, I/O and

timer are all on a single chip

fix amount of on-chip ROM,RAM, I/O portsfor applications in which cost,

power and space are criticalsingle-purpose

Microprocessor vs. Microcontroller


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M icrocont roller v s. M icrop roce sso rs


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Cont.

Wh ich is the first tas k faced when lea rn ing to us e a ne w comput er? Intern al ha rd wa re de sign (a rch itec tu re ) Type, n umber and size of re gist er s Other c ircuit ry Ha rd wa re and softwa re of m icrocon t roller


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Embedded C omputi ng Syst em sUse a m icrop roce sso r or m icrocon t roller to do one task only

Printer

PC us ed for any number of appli catio ns Word proce sso r, print-s erver, ba nk te ller term inal ,

vide o game play er, ne two rk server, interne t term inal

PC contai ns o r is connec ted to va rious em bedded

p roducts Keyboa rd, printer, m odem, d isk cont roller, sou nd c a rd,

CD-ROM dr iver, m ous e


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Embedded Pr oducts Using M icrocont roller s

Home Applia nce s, in terc om, te lephone s, sec u rity

syst em s, ga rag e d oo r op ener s, answ er ing mach ine s, fax mach ine s, home c omput er s, TVs,cabl e TV tu ner, VCR, camco rder, rem ot e con t rols ,vide o game s, ce llula r phone s, m usi cal inst rumen ts ,sewing mach ine s, lighting con t rol , pagi ng, camer a ,pinball mach ine s, toys , exerc ise eq uip men t


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Office Telephone s, comput er s, sec urity syst em s, fax

mach ine s, m icrowa ve, c opi er, las er printer, c olo rp rinter, pagi ng


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Auto Trip comput er, en gine c on t rol , air bag , ABS,

inst rumen tatio n, sec u rity syst em, t ransm issio ncont rol , en ter tai nmen t , climat e cont rol , ce llula rphone, ke yless en t ry


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Choosi ng A M icrocont roller

Computi ng need s Speed, pa ckaging, pow er c onsu mptio n, RAM ,

ROM , I/O pins, timer s, upg rade to h ighper form ance o r low-pow er ver sio ns, cost

Softwa re deve lop men t tools Assem bler, C c ompiler, Simulato rs

Availability


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Compa n ies Producing 805 1

CompanyCompany Web SiteWeb Site

IntelIntel www.intel.com/design/mcs51www.intel.com/design/mcs51

AtmelAtmel www.atmel.comwww.atmel.com

Philips/SigneticsPhilips/Signetics www.semiconductors.philips.comwww.semiconductors.philips.com

SiemensSiemens www.sci.siemens.comwww.sci.siemens.com

Dallas Semiconductor Dallas Semiconductor www.dalsemi.comwww.dalsemi.com


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805 1 Fam ily

F eatureF eature 80518051 80528052 80318031

ROM (on chip program space in bytes)ROM (on chip program space in bytes) 4K 4K 8k 8k 0k 0k RAM (bytes)RAM (bytes) 128128 256256 128128

TimersTimers 22 33 22

I/O pinsI/O pins 3232 3232 3232

Serial portSerial port 11 11 11

Interrupt sourcesInterrupt sources 6 6 88 66


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Timer ::Timer:


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Interr upt :


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Va rious 805 1 M icrocont roller s

875 1 m icrocont roller UV-EPROM

AT89 C51 from Atmel Corporation (IN LAB WITH KEIL COMPILER)

Flas h (er as e be fore write )

DS5000 f rom D allas Semiconductor NV-RAM (changed one byt e at a time ), RTC (real-ti me

clock)

OTP (one -time -p rog ramm abl e ) ver sio n of 805 1805 1 fam ily f rom Ph ilips

AD, DA, extended I/O, OTP and flas h


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805 1 M icrocont roller


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Block Diagram of 8051

CPU

On-chipRAM

On-chipROM forprogramcode

4 I/O Ports

Timer 0

SerialPortOSC

InterruptControl

External interrupts

Timer 1

Timer/Counter

Bus

Control

TxD RxDP0 P1 P2 P3

Address/Data

CounterInputs


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Featu re s

8 bit CPU16-bit p rog ram c ou n ter(PC ) and d ata poi nter

(DPTR)8-bit p rog ram status wo rd(P SW)8-bit sta ck poi n ter

4 Kbyte s of on-ch ip p rog ram mem o ry(ROM )128 byt es of on-ch ip data rand om acce ss mem o ry(RAM )


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64 Kbyte s of p rog ram mem o ry addre ss spa ce64 Kbyte s of data mem o ry addre ss spa ceTwo 16 bit timer s/c ou nter s16 bit addre ss bus multipl exed wit h po rt 0 andpo rt 232 bid irec tio nal I/O line s can be e ither us ed as

8 bit po rtsOn -ch ip clock os cillato rCon t rol Regist er sSer ial data rece iver/ t ransm itt er

Interr upt sou rce s


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Arch itec tu re of 805 1

Proce sso r inc lude s Arithme tic and logic un it Inst ructio n dec oder Tim ing gener atio n un it Accumulato r B re gist er Status re gist er


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Arithme tic and Logi c Un it

Per form ing computi ng func tio ns Accumulato r is 8-bit re gist er Arithme tic and logical op er atio ns one of the

op er and s is in A re gist er Result is sto red in on ly A C(carry), AC(au xiliary ca rry), O(over flow) and

P(Parity) status re gist er


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Inst ructio n dec oder and c ont rol

When an inst ructio n is f e tched it is loa ded inthe inst ructio n re gist er

Decoder dec ode s the inst ructio n andestablis he s the seq uence of even ts to followInst ructio n cycle: In st ructio n cycle is de finedas the time req uired for comple ting theexec utio n of an inst ructio n


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Inst ructio n re gist er is not p rog ramm abl eIt cann ot be acce ssed thr oug h any inst ructio n

Con t rol un it gener at es con t rol signals nece ssa ry for comm un icatio n be tw een thep roce sso r and per ipher als


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CPU Regist er s

A Regist er(E0H ) 8 bit Direc t connec tio n wit h ALU In m ultipli catio n- one of 8 bit op er and s sto red in A and

aft er op er atio n it sto re s low er byt e in A In d ivision- holds 8 bit dividend & q uoti en t is sto red in A

B Regist er( F0H) 8 bit Used wit h m ultiply and d ivide op er atio ns In m ultipli catio n- aft er op er atio n it sto re s h igher byt e in B In d ivision- holds 8 bit diviso r & rem inder is sto red in B


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Registers

A

B

R0

R1

R3

R4

R2

R5

R7

R6

DPH DPL

PC

DPTR

PC

Some 8051 16-bit Register

Some 8-bitt Registers of the 8051


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Prog ram status wo rd(D0H )

CY AC F0 RS1 RS0 OV -- P

CY PS W .7 Carry flag

AC PSW.6 Auxiliary ca rr y

F0 PSW.5 Gener al pu rpos e

RS1-PSW.4 Regist er ba nk se lec to r bit 1

RS0-PSW.3 Regist er ba nk se lec to r bit 0

OV-PSW.2 Over flow flag-- User de fined bit

P P SW.0 Pa rity flag

Add numbers 56H and 95H AND show how CY,AC and P

flags affected???


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M OV A,#56HM OV A,#95H

56 -- 0101 011 0+

95 --- 100 1 0101-------------------------------------

EBH - 111 0 1011CY = 0 (No carr y be tw een D7 )AC = 0 (No carr y f rom D3 to D4 )P = 0 (Accumulato r h as an even n umber of bits)


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Sec ond Exerc ise!

Show status of CY,ACand P flags aft er theadd itio n of 9CH and 6 4 H

Wh at is the size of flag re gist er in the 805 1?FIND C,AY,P FOR ----M OV A,#02HADD A,#3DH

0000 00 1000 11 11 01

--------------

0 0 1 1 1 1 1 1


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M OV A,#95ADD A,#120

ANS = 44 IN HEX


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Third Exerc ise!

Show the c on ten ts of PSW re gist er aft erexec utio n of followi ng inst rucito ns:M OV A,#0BFHADD A,#1BH

BF 1011 1111

1B 000 1 1011---------------------

DA 11 01 1010Cy=0,ac=1 ,f 0=0,r s1 =0,r s0=0, ov=0,n ot us ed=0, p=1


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Answ er s: 1(CY) 1(AC) 0(P)100 1 11 00

011 0 0 100-------------

0000 0000

Answ er s: con ten ts of psw = 0100 000 1=(65 )10= (41) 16


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Sta ck Pointer(8 1H)

8 BITCon tai ns data item on the top of sta ck

Incremen ted be fore d ata is sto redInitialized to 07H


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Data Pointer

DPTR (Data Poin ter ) consists of two 8 bit re gist er s high byt e (DPH) and low byt e (DPL)16 bit addre ssTo fu rn ish addre ss inform atio n for intern al andextern al p rog ram mem o ry and for ex tern al data mem o ry


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Prog ram Cou nter

16 bit re gist erSpec ifies the addre ss of nex t inst ructio n to beexec ut edAfter re se t PC will be se t to 0000H805 1 f e tche s the inst ructio n one byt e at a timeAfter incremen ts , it incremen ts PC by 1


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M EM ORY

4 k byt es on ch ip ROM

128 byt es RAM

Prog ram mem o ry is us ed to hold sta rt up p rog ramData rand om acce ss mem o ry is d ivided in to 4 pa rts :

First 12 8 bytes : 00H TO 1FH (31) Regist er Banks20H TO 2 FH(4 7) Bit addre ssabl e RAM

30H TO 7FH (127 ) Gener al pu rpos e re gist er sNext 12 8 bytes : 80H TO FFH (255 ) Spec ial func tio n

re gist er s


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Regist er Banks

Low e st 32 byt e s4 ba nks each h aving 8 re gist er s

RS1 and RS0 (4TH

BIT AND3RD

BIT) p rog ramstatus wo rd se lec t the ba nkEach ba nk contai ns R0 TO R7

Ex: add A, R2 add s the v alu e c on tai ned in R2to the accumulato r

RS1=0 and RS0=0 BANK 0 IS SELECTED

R2 is wh ich mem o ry locatio n? ADD A,02H


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Intern al RAM Organ izatio n

Special functionregisters

8 0 FF

Gener al pu rpos e re gist er s 30-7FBit addre ssabl e spa ce 20 -2FBANK 3 (R0-R7) 18-1F

BANK2 (R0-R7) 10-17

BANK 1 (R0-R7) 08 -0F

BANK0 (R0-R7) 00 -07


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PSW bits ba nk se lec tio n

RS1 PSW .4 RS0- PSW .3BANK0 0 0

BANK 1 0 1BANK2 1 0Bank 3 1 1


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Gener al Purpos e RAM 30H TO 7FH

80 BYTESInst ructio ns of single byt e op er and s us e th is are a of sto rag eDirec t o r ind irec t addre ssing mode s


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SFR Regist er 80h to ff h

21 SFR re gist er s are de finedSome re gist er s a re bit addre ssabl e

Access by in tern al RAM locatio nsCPU and in tern al per ipher al modules us e SFR for cont rolling the de sired op er atio n of thedev iceCon tai ns I/O po rts , con t rol re gist er s, timer s,ser ial po rts e tc.Ex : acc, B, PSW, sp , dpt r e tc.


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M OV A,R5 is eq uivalen t to ?

W hich register bank of r0-r 7 do we have accessto when 8 051 is powered up?

Ans regist er ba nk 0RAM LOCATIONS 0,1 to 7By r0 to r7

How to switch register banks?By bit addre ssabl e inst ructio ns SETB and CLRSETB PSW.3 - will make P SW.3 =1 so

0(PSW.4

)AND 1 B

ANK1 IS SELECTED


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Wh ich is the ot her way to writebe low prog ram

Stat e the c on ten ts of RAM LOCATIONS aft erfollowi ng p rog ram:M OV R0,#99HM OV R1,#50HM OV R2,#60HM OV R3,#90HM OV R4 ,#65H

RAM LOCATION 0 HAS VALUE 99H RAM LOCATION1 HAS VALUE 50H RAM LOCATION 2 HAS VALUE 60H RAM LOCATION3 HAS VALUE 90H

RAM LOCATION4 HAS VALUE 65H

Wr ite inst ructio ns to us e t e


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Wr ite inst ructio ns to us e t ere gist er s of ba nk 3 and loa d the

sa me v alu e 05H in re g. r0 -r3SETB PSW .4

SETB PSW .3MOV R0,#0 5HM OV R1,#05H

M OV R2,#05HM OV R3,#05H


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Example : the following instructions enableregister bank 3 and move the content of R7 (address 1 FH) to the accumulator

SETB RS1SETB RS0

MOV A,R7

MicroprocessorMicrocontrollers

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