Microprocessor-.pdf

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Microprocessor/Microcontroller

Introduction


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A microprocessor - also known as a CPU or centralprocessing unit - is a complete computationengine that is fabricated on a single chip. The firstmicroprocessor was the Intel 4004, introduced in1971. The 4004 was not very powerful - all itcould do was add and subtract, and it could onlydo that 4 bits at a time. But it was amazing thateverything was on one chip. Prior to the 4004,engineers built computers either from collections

of chips or from discrete components (Transistorsand such). The 4004 powered one of the firstportable electronic calculators. (excerpts fromHow Microprocessors Work by Marshall Brain)
http://computer.howstuffworks.com/microprocessor.htm/about-author.htmhttp://computer.howstuffworks.com/microprocessor.htm/about-author.htm


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Microprocessor/Microcontroller The first microprocessor to make it into a home computer

was the Intel 8080, a complete 8-bit computer on one chip,introduced in 1974. The first microprocessor to make a realsplash in the market was the Intel 8088, introduced in 1979and incorporated into the IBM PC (which first appearedaround 1982). If you are familiar with the PC market and its

history, you know that the PC market moved from the 8088to the 80286 to the 80386 to the 80486 to the Pentium tothe Pentium II to the Pentium III to the Pentium 4. All ofthese microprocessors are made by Intel and all of themare improvements on the basic design of the 8088. The

Pentium 4 can execute any piece of code that ran on theoriginal 8088, but it does it about 5,000 times faster!(excerpts from How Microprocessors Work by MarshallBrain)
http://computer.howstuffworks.com/microprocessor.htm/about-author.htmhttp://computer.howstuffworks.com/microprocessor.htm/about-author.htmhttp://computer.howstuffworks.com/microprocessor.htm/about-author.htmhttp://computer.howstuffworks.com/microprocessor.htm/about-author.htmhttp://computer.howstuffworks.com/microprocessor.htm/about-author.htmhttp://computer.howstuffworks.com/microprocessor.htm/about-author.htm


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:


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This is about as simple as a microprocessor gets. Thismicroprocessor has:

An address bus (that may be 8, 16 or 32 bits wide) thatsends an address to memory

A data bus (that may be 8, 16 or 32 bits wide) that can

send data to memory or receive data from memory An RD (read) and WR (write) line to tell the memory

whether it wants to set or get the addressed location

A clock line that lets a clock pulse sequence the

processor A reset line that resets the program counter to zero (or

whatever) and restarts execution

Let's assume that both the address and data buses are8 bits wide in this example.


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Here are the components of this simple

microprocessor:

Registers A, B and C are simply latches made out

of flip-flops.

The address latch is just like registers A, B and C.

The program counter is a latch with the extraability to increment by 1 when told to do so, and

also to reset to zero when told to do so.


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Microprocessor Instructions Even the incredibly simple microprocessor shown in

the previous example will have a fairly large set ofinstructions that it can perform. The collection ofinstructions is implemented as bit patterns, each one

of which has a different meaning when loaded into theinstruction register. Humans are not particularly goodat remembering bit patterns, so a set of short wordsare defined to represent the different bit patterns. Thiscollection of words is called the assembly language of

the processor. An assembler can translate the wordsinto their bit patterns very easily, and then the outputof the assembler is placed in memory for themicroprocessor to execute.


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Here's the set of assembly language instructions that thedesigner might create for the simple microprocessor inour example:

LOADA mem - Load register A from memory address

LOADB mem - Load register B from memory address CONB con - Load a constant value into register B

SAVEB mem - Save register B to memory address

SAVEC mem - Save register C to memory address

ADD - Add A and B and store the result in C SUB - Subtract A and B and store the result in C

MUL - Multiply A and B and store the result in C

DIV - Divide A and B and store the result in C


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COM - Compare A and B and store the result in test

JUMP addr - Jump to an address

JEQ addr - Jump, if equal, to address

JNEQaddr - Jump, if not equal, to address

JG addr - Jump, if greater than, to address

JGE addr - Jump, if greater than or equal, to address

JL addr - Jump, if less than, to address

JLE addr - Jump, if less than or equal, to address

STOP - Stop execution


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An opcode (operation code) is the portion of a

machine language instruction that specifies the

operation to be performed. Their specification

and format are laid out in the instruction set

architecture of the processor in question (whichmay be a general CPU or a more specialized

processing unit). Apart from the opcode itself, an

instruction normally also has one or more

specifiers for operands (i.e. data) on which the

operation should act, although some operations

may have implicitoperands, or none at all.


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Assembly language, or just assembly, is a low-

level programming language, which uses

mnemonics, instructions and operands to

represent machine code. This enhances thereadability while still giving precise control

over the machine instructions.


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ROM-8KB

RAM-256 bytes

EEPROM-512 bytes

PORT

A

PULSE ACCUMULATOR

PERIODIC INTERRUPT

COP WATCHDOG

PAI

OC2

OC3

OC4

OC5

O

C

1

IC1

IC2

IC3

PA7

PA6

PA5

PA4

PA3

PA2

PA1

PA0

PE7

PE6

PE5

PE4

PE3

PE2

PE1

PE0

PORT

E

VREFH

VREFL

A/D

CONVERTER

DATA

DIRECTION

PORT

D

SS

SCK

MOSI

MISO

SPI

TxD

RxDSCI

PD5

PD4

PD3

PD2

PD1

PD0

M68HC11 CPU

ADDRESS DATA BUS

INTERRUPTS

RESET

XIRQ

IRQ(V

PPBULK)

HANDSHAKE I/O

DATA DIRECTION C

PORT CPORT B

PARALLEL

I/O

SINGLE

CHIP

P

B

7

P

B

6

P

B

5

P

B

4

P

B

3

P

B

2

P

B

1

P

B

0

P

C

7

P

C

6

P

C

5

P

C

4

P

C

3

P

C

2

P

C

1

P

C

0

S

T

R

A

S

T

R

B

A

1

5

A

1

4

A

1

3

A

1

2

A

1

1

A

1

0

A

9

A

8

A

D

7

A

D

6

A

D

5

A

D

4

A

D

3

A

D

2

A

D

1

A

D

0

R/W ASEXPAND

OSCILLATOR

XTAL

EXTAL

E

MODA

LIR

MODB(V

STBY)

VDD

VSS

MODE

SELECT

POWER

Figure 1.2 68HC11A8 block diagram (redrawn with permiss ion of Motorola)


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7 0Accumulator A 7 0Accumulator B

15 0Double Accumulator D

15 0Index Register IX

15 0Index Register IY

15 0Stack pointer

15 0Program Counter

A:B

D

IX

IY

PC

SP

S X H I N Z V C CCR

Carry

Overflow

Negative

Zero

I interrupt mask

Half-Carry (from bit 3)

X Interrupt Mask

Stop Disable

Figure 1.3 MC68HC11 Programmer's model


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Memory Addressing

Memory consists of addressable locationsA memory location has 2 components: address and contents

Data transfer between CPU and memory involves address

bus and data bus

CPU memory

address bus lines

data bus lines

Figure 1.5 Data transfer between CPU and memory

address contents



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ADDRESSING MODES

Operands needed in an instruction are specified by one of the 6

addressing modes

Immediate modeDirect mode

Extended mode

Indexed mode

Inherent modeRelative mode



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68HC11 addressing modes

Table 1.1 Prefix for number representation

Base Prefixbinary

octal

decimal

hexadecimal

%

@

nothing*

$

*Note: Some assemblers use &



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Immediate mode

The actual operand is contained in the byte or bytes immediately following the

instruction opcode

LDAA #22

ADDA #@32

LDD #1000

Note that the (#) is a critical assembler directive!



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Direct modeA one-byte value is used as the address of a memory operand (located in on-chip SRAM)

ADDA $10SUBA $20

LDD $30

Extended mode

A two-byte value is used as the address of a memory operand

LDAA $1000

LDX $1000

ADDD $1030

Indexed modeThe sum of one of the index registers and an 8-bit value is used as the address of a

memory operand

ADDA 10,X

LDAA 3,Y


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Inherent mode

- Operands are implied by the instruction

- No address information is needed

ABA

INCB

INX

Relative mode

- Used in branch instructions to specify the branch target

- Specified using either a 16-bit value or a label (preferred)

...BEQ there

ADDA #10

...

there DECB


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A Sample of 68HC11 Instructions

The LOAD instructions

A group of instructions that place a value or copy the contents of a memory

location (or locations) into a register

LDAA Load Accumulator A

LDAB Load Accumulator B

LDD Load Double Accumulator DLDX Load Index Register X

LDY Load Index Register Y

LDS Load Stack Pointer

can be immediate, direct, extended, or index mode

Examples

LDAA $10

LDX #$1000


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The ADD instruction

A group of instructions perform addition operation

ABA

ABX

ABY

ADDA

ADDB

ADDD

ADCA

ADCB is specified using immediate, direct, extended, or index mode

Examples.

ADDA #10

ADDA $20

ADDD $30


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The SUB instruction

A group of instructions that perform the subtract operation

SBA

SUBA

SUBB

SUBD

SBCA ; A [A] - - C flagSBCB ; A [B] - - C flag

can be immediate, direct, extended, or index mode

Examples

SUBA #10SUBA $10

SUBA 0,X

SUBD 10,X


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The STORE instructionA group of instructions that store the contents of a register into

a memory location or memory locations

STAA

STAB

STD

STX

STY

STS

can be direct, extended, or indexmode

Examples:

STAA $20STAA 10,X

STD $10

STD $1000

STD 0,X


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The 68HC11 Machine Code

A 68HC11 instruction consists of 1 to 2 bytes of opcode and 0 to 3 bytes ofoperand information

Examples

Machine instructions

Assembly instruction (in hex format)

LDAA #29 86 1D

STAA $00 97 00

ADDA $02 9B 02

STAA $01 97 01

INY 18 08



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machine code assembly instruction format

01 NOP

86 LDAA IMM

96 LDAA DIR

C6 LDAB IMM

D6 LDAB DIR

CC LDD IMMDC LDD DIR

8B ADDA IMM

9B ADDA DIR

CB ADDB IMM

DB ADDB DIR

C3 ADDD IMMD3 ADDD DIR

97 STAA DIR

D7 STAB DIR

DD STD DIR



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The 68HC11 Instruction Execution Cycle

- Perform a sequence of read cycles to fetch instruction opcode byte and

address

information.

- Optionally perform read cycle(s) required to fetch the memory operand.

- Perform the operation specified by the opcode.

- Optionally write back the result to a register or a memory location.

- Consider the following 3 instructions

Assembly instruction Memory location Opcode

LDAA $2000 $C000 B6 20 00

ADAA $3000 $C003 BB 30 00

STAA $2000 $C006 B7 20 00



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$B6

$20

$00

$BB

$30

$00

$B7

$20

$00

Figure 1.10 Instruction 1--Opcode read cycle

Before After

PC PC

$C000 $C001

Memory contents Address

$C000

$C001

$C002

$C003

$C004

$C005

$C006

$C007

$C008

CPU

$C000

$B6Data bus

Address bus

Instruction LDAA $2000

Step 1. Place the value in PC on the address bus with a request to read the contents of that

location.

Step 2. The opcode byte $B6 at $C000 is returned to the CPU and PC is incremented by 1.


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$B6

$20

$00

$BB

$30

$00

$B7

$20

$00

Figure 1.11 Instruction 1--address byte read cycles

Before After first read

PC PC

$C001 $C002


$C000

$C001

$C002

$C003

$C004

$C005

$C006

$C007

$C008

CPU

Data bus

Address bus

$C001

$20

$B6

$20

$00

$BB

$30

$00

$B7

$20

$00


$C000

$C001

$C002

$C003

$C004

$C005

$C006

$C007

$C008

CPU

Data bus

Address bus

$C002

$00

After second read

PC

$C003

Step 3. CPU performs two read cycles to obtain the extended address $2000 from locations

$C001 and $C002. At the end the value of PC is incremented to $C003


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Figure 1.12 Instruction 1--execution read cycle

Memory contents

$19

$37

CPU .

.

.

$2000

Address bus

Data bus

$19

$2000

Address

$3000

Step 4. The CPU performs another read to get the contents of the memory location at

$2000, which is $19. The value $19 will be loaded into accumulator A.


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The End


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