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MicrocontrollerENGINEERING REVIEW
MAXQ ..........1
MAXQ
RISC .....7
DS80C400
C .................17
MAXQTM
8
16 RISC CISC
Maxim Integrated Products
Dallas Semiconductor
MAXQ RISC
MAXQ MAXQ
MAXQ
MAXQ
MAXQ -
MAXQ
/
/ MAXQ
RISC
MAXQ
MAXQ (
RISC ) MAXQ ( )
MAXQ RISC
2
RISC CPU
CPU ( )
CPU
MAXQ 8
16 RISC (
)
MAXQ
MAXQ MOVE MOVE
16 MAXQ
7 1 8
0 ( #00h – #FFh)
ALU
1 16 MAXQ
MAXQ
MAXQ
MAXQ
/ (
)
@DP[0]
0 (DP[0])
MAXQ /
MAXQ (ADD SUB ADDC SUBB)
(IP)
/
/
DP[0]
@DP[0]++ @DP[0]--
IMMEDIATE BYTE DATA(i.e., 00h–FFh)
INDEX MODULEINDEX MODULE
0
1
f ddd dddd
FORMAT DESTINATION SOURCE
ssss ssss
INDEX MODULE
1. MAXQ
...MAXQ
3
MAXQ
16
/
-
MAXQ
MAXQ
MAXQ
MAXQ 2004
MAXQ MAXQ10 MAXQ20
MAXQ10 MAXQ20 (ALU) MAXQ10
8 ( ) ALU MAXQ20 16 ( ) ALU
MAXQ 8 16 /
A[n]
n 16 MAXQ A[0]
A[1] ... A[14] A[15] AP
Acc ( Acc = A[AP]) AP
16
MAXQ ALU
ADDC src
(src) /
(APC) AP
(PSF) 5 ALU
(C) (Z) (S) (E) (OV)
PSF
(GF1 GF0)
MAXQ MAXQ
/ PUSH /POP
( / / )
MAXQ
-
... /
-
4
MAXQ10 MAXQ20
MAXQ DJNZ 16 (LC[0] LC[1])
DJNZ LC[n], src 0
RISC
MAXQ
MAXQ
DJNZ
MAXQ 3 16 (DP[0] DP[1] BP[Offs])
(DPC) / (WBSn)
/
/ (FP = BP[Offs]) 16
(BP) 8 (Offs) C
Von Neumann Harvard
MAXQ Harvard
Von Neumann
I/O
Von Neumann
MAXQ (MMU)
ROM
MAXQ
-
MAXQ
MAXQ 8
16 RISC
(
)
5
16 32
/
16 6 (M0–M5)
(6 x 32 = 192 )
MAXQ I/O
LCD ADC 10 (M6–M15) MAXQ
MAXQ
/ / MAXQ
2 MAXQ
MAXQ MAXQ
( = 00h)
00h
(n) (PFX[n])
16 32
/ ( 16
24 )
PFX[n] n
n = dds
( / )
16
16
( ) MAXQ MAXQ
MAXQ
MAXQ MAXQ
(MAXQ Q –Quiet ) MAXQ
2. MAXQ
TIMER 0 TIMER 1 TIMER 2
UART
IN-CIRCUIT DEBUGGER
BIT OPERATIONS
AP, APC, PSF IC, IMR, SC, CKCN, WDCN
I/O
I/O I/O
PROGRAMMEMORY
STACKMEMORY
DATAMEMORY
A[0]... A[15]
ALU OPERATIONSACC
PFX[n] MODULE
CONDITIONAL JUMPS, RETURNS, CONDITIONAL RETURNS
GENERAL-PURPOSE I/O, EXTERNAL INTERRUPT CONTROL AND STATUS
IPPUSH/POP, CALL, DJNZSP, IV, LC[n]
DPC, BP, OFFS, FP, GR
DP[n]DATA MEMORY ACCESS
MULTIPLY-ACCUMULATE UNIT
SPI™
MAXQ TRANSFER MAP
CMP
MAXQ
16
MAXQ
6
MAXQ
MAXQ
MAXQ
MAXQ - MAXQ
MAXQ
MAXQ
MAXQ
MAXQ Maxim Integrated Products, Inc.SPI Motorola, Inc.
...MAXQ
MAXQ
7
MAXQRISCMAXQ PIC16CXXX ( ) AVR
MSP430
MIPS ( )/mA
MAXQ
MAXQ -
/ MAXQ -
MAXQ MAXQ
MAXQ 1
MAXQ
MNEMONIC DESCRIPTION MNEMONIC DESCRIPTIONBIT MANIPULATION LOGICALMOVE C, #0/#1 Clear/Set Carry AND Logical ANDCPL C Complement Carry OR Logical ORAND Acc.<b> Logical AND Carry with Accumulator Bit XOR Logical XOROR Acc.<b> Logical OR Carry with Accumulator Bit CPL,NEG One's, Two's ComplementXOR Acc.<b> Logical XOR Carry with Accumulator Bit SLA,SLA2, SLA4 Shift Left Arithmetically 1,2,4MOVE C, Acc.<b> Move Accumulator Bit to Carry SRA,SRA2,SRA4 Shift Right Arithmetically 1,2,4MOVE Acc.<b>,C Move Carry to Accumulator Bit SR Logical Shift RightMOVE C, src.<b> Move Register Bit to Carry RR,RRC Rotate Right Carry (Ex/In) clusive MOVE dst.<b>, #0/#1 Clear/Set Register Bit RL,RLC Rotate Left Carry (Ex/In) clusiveMATH DATA TRANSFERADD, ADDC Add Carry (Ex/In) clusive XCHN Exchange Accumulator data nibbles SUB, SUBB Subtract Carry (Ex/In) clusive XCH (MAXQ20) Exchange Accumulator data bytesFLOW CONTROL AND BRANCHING MOVE dst, src Move source to destination
JUMP {C/NC/Z/NZ/E/NE/S} Jumps - unconditional or conditional, relative or absolute PUSH/POP Push/Pop stack
DJNZ LC[n], src Decrement Counter, Jump Not Zero POPI Pop stack and enable interrupts (INS≤0)CALL Call – relative or absolute OtherRET {C/NC/Z/NZ/S} Return – unconditional or conditional NOP No Operation
RETI {C/NC/Z/NZ/S}Return from Interrupt – unconditional or conditional CMP Compare with Accumulator
DESTINATION SPECIFIER
FORMAT BIT (0 = IMMEDIATE SOURCE, 1 = MODULE SOURCE)
• Extensive source, destinationaddressing modes are encodedwithin the op code—can yield densecode
• 16-bit internal data path• Internal memory accessible as word
or byte• Constant generator (CG) for -1, 0, 1,
2, 4, 8• Single-cycle operation• Stack limited only by internal RAM• Conditional/relative jump destination
range = ±512 (two-cycle)• Separate interrupt vectors, single-
source flags automatically cleared
• Von Neumann memory map +elaborate addressing modes = manycycles. The ONLY single-cycleinstructions are those dealingexclusively with Rn. Peripheralregister access = three to six cycles
• Literals not supported by CGrequire extra word
• Destination operand cannot beregister indirect or register indirectauto-increment
• No auto-decrement support forregister indirect
• Symbolic addressing limits theability to reuse code routines
MAXQ
• System and peripheral registers areaccessible as source or destinationin the same logical memory space,yielding the fastest data transfers
• Single-cycle operation and nopipelining
• Single-cycle conditional jump(+127/-128) or two-cycle absolutejump (0–65,535)
;====================================MSP430=====================================; MSP430 has a 16-bit data bus; assuming bytes are word aligned, only requires (blocksize/2 transfers).; R4 ;src pointer; R5 ;dst pointer; R6 ;size of block to copyloop: ;words/cycles
;===================================PIC16CXXX===================================; a ; src pointer base; b ; dst pointer base; i ; byte count held in reg file; USES:; temp ; temp data storageloop: ; cycles
decf i, W ; 1 i-- => W addlw a ; 1 (a+i--) => W starting at end movwf FSR ; 1 W => FSR movfw INDF ; 1 W <= @FSR get data movwf temp ; 1 W => temp
11
movlw (b-a) ; 1 diff in dest-src addwf FSR, F ; 1 (b+i--) => W movfw temp ; 1 temp => W movwf INDF ; 1 W => @FSR store data decfsz i, F ; 2/1 i-- goto loop ; 2return ; 2
;----------;11 / (12*bytecount) +1 (ret instead of
goto, +1 on decfsz); WORD COUNT = 12 ; CYCLE COUNT = 769 (*4clks/inst cycle = 3076)
MAXQ MAXQ10
MAXQ20 MAXQ10
(
MSP430 MAXQ20 )
MAXQ10 /
MAXQ
1)
2)
3) Harvard
4) / MSP430
0(R5) @R5
MAXQ /
MSP430
MSP430 16
ADC
ADC
; words/cycles
mov.w &ADAT,0(R14) ; 3 / 6 Store output word
incd.w R14 ; 1 / 1 Increment pointer
; 4 / 7
MAXQ20
move @DP[0]++, ADCOUT ; 1 / 1
350030002500200015001000500
0
CYCL
ES
97 193 291 451
3076
MAX
Q20
MAX
Q10
MSP AV
R
PIC
25
20
15
10
5
0
BYTE
S
10
21
MAX
Q
AVR
MSP PI
C
128
MemCpy64 CYCLE/BYTE COUNT COMPARISON
MAXQ
/
MemCpy64 /
12
(BubbleSort )
/
32
MAXQ MAXQ
ASCII (Hex2Asc )
16 (0 9 A F)
AVR MAXQ
MSP
(#nnnnh) MAXQ
Atmel AVR MSP430
2 (ShRight )
16 ALU
16 ( ) 256
25,000
20,000
15,000
10,000
5000
0
CYCL
ES
5861
21,580
MAX
Q
AVR
MSP PIC
4035302520151050
BYTE
S
MAX
Q
MSPAV
R
PIC
3101
8621
31.5282636
BubbleSort CYCLE/BYTE COUNT COMPARISON
7060504030
1020
0
CYCL
ES
60
MAX
Q10
AVR
MAX
Q20
MSP PI
C
50
40
30
20
10
0
BYTE
S
MAX
Q
MSPAV
R
PIC
11.75 12 12.25
24 26 26.2521.5
44
Hex2Asc CYCLE/BYTE COUNT COMPARISON
/
Hex2Asc /
BubbleSort /
13
16 ALU MAXQ20 MSP430
8 MAXQ20
8 ALU MAXQ10 16 MSP430
MAXQ20 MSP430 8 16
MAXQ20 16
( ) MSP430
(RRA@R5)
MAXQ20 MSP430 16
(SRA2 SRA4 SLA2 SLA4)
(BitBang )
/
( )
I/O
MAXQ PIC 4 (
) MSP430 Von Neumann
MAXQ PIC RISC PIC MAXQ
14 MAXQ 16 MSP430
( & register) (
#3h)
MSP430
I/O
50403020100
CYCL
ES
9 14
40
10
MAX
Q20
MSP
MAX
Q10
AVR
PIC
2520151050
BYTE
S
20 20
MAX
Q20
MSP PI
C
MAX
Q10
AVR
4
17.5
8 8
ShRight CYCLE/BYTE COUNT COMPARISON
353025
15
5
20
10
0
BYTE
S 19.2522 24
MAX
Q
MSPPI
C
AVR
350300250
150
50
200
100
0
CYCL
ES
56105
145
296
AVR
PIC
MAX
Q
MSP
32
BitBang CYCLE/BYTE COUNT COMPARISON
BitBang
/
( )
BitBang /
ShRight /
14
MSP430
MSP430
MSP430
MIPS/mA
/
MIPS/mA
MIPS/mA
3V ( AVR MSP430 PIC16 MAXQ)
MIPS/mA
MIPS/mA mA
(DC)
mA / MHz
/
mA/MHz
(DC) mA-MHz
( ) 2 -MHz
2 mA/MHz
mA/MHz
MIPS/mA MIPS
MIPS 3
MIPS
(CPI) Microchip PIC
( / )
MIPS (MIPS)
MIPS/mA
mA
00
2 4 6 8 10 12 MHz
STEEPER-DYNAMIC-CURRENTmA/MHz CHARACTERISTIC
HIGHER INITIAL STATIC (DC)CURRENT CHARACTERISTIC
10
8
6
4
2
2. -MHz
CLOCKS/INSTRUCTIONS
MILLION CLOCKS
SECOND
CPI
MIPS (MILLIONS INSTRUCTIONS/SECOND)
MHz
=1
X
3. MAXQ
MIPS
mA/MHz
(DC)
= MIPS ( / )
15
MIPS/mA
MIPS MHz MIPS/MHz (
) MIPS/MHz mA/MHz MIPS/mA
MIPS/MHz MIPS/mA
MIPS/mA
( MIPS / MHz 1 ) 3 (MIPS / MHz = 0.33)
MIPS/mA
DEVICETYPICALmA/MHz
MAXmA/MHz SOURCE
PIC16C55X 0.7 1.25PIC16C55X data sheet: DC Table 10.1, D010 (VCC = 3V, 2MHz);XT or RC
PIC16C62X 0.7 1.25PIC16C62X data sheet: DC Table 12.1, D010 (VCC = 3V, 2MHz);XT or RC
PIC16LC71 0.35 0.625PIC16C71X data sheet: DC Table 15.2, D010 (VCC = 3V, 4MHz);XT or RC
PIC16F62X 0.15 0.175 PIC16F62X data sheet: DC Table 17.1, D010 (VCC = 3V, 4MHz)
PIC16LF870/1 0.15 0.5PIC16F870/1 data sheet: DC Table 14.1, D010 (VCC = 3V, 4MHz);XT or RC
sizeof(struct sockaddr));timeStamp = *(unsigned long*)(&buffer[40]);timeStamp = timeStamp - NTP_UNIX_TIME_OFFSET;// now we have time since Jan 1 1970formatTimeString(timeStamp, "London",