Microcontroller based system design

Microcontroller based system design

Asst. Prof. Dr. Alper ŞİŞMAN

Cortex Microcontroller Software Interface Standart (CMSIS)

• CMSIS is developed by ARM in close co-operation with various silicon and software vendors and provides a common approach to interface to peripherals, real-time operating systems, and middleware components.

• CMSIS defines the basic requirements to achieve software re-usability and portability

• The aims of CMSIS are to:– Improve software portability and re-usability.– Allow developers to write software quicker through an easy

to use and standardized software interface– Allow embedded software to be used on multiple compiler

products.

The area of standardization includes:• Hardware Abstraction Layer (HAL) for Cortex-M processor registers

with standardized definitions for the SysTick, NVIC, System Control Block registers, MPU registers, and core access functions.

• Standardized methods to organize header files that makes it easy to learn new Cortex-M microcontroller products and improve software portability.

• Common methods for system initialization to be used by each MCU vendor. For example, the standardized SystemInit() function, provided in each device driver library, is essential for configuring the clock.

• Standardized intrinsic functions that are normally used to produce instructions that cannot be generated by IEC/ISO C. By having standardized intrinsic functions, software re-usability and portability is greatly improved.

• Standardized ways to determine the system clock frequency through a software variable, SystemFrequency, defined in the device driver. Allows RTOS to setup the SysTick unit based on the system clock frequency.

CMSIS Organization

CMSIS Usage

• Core Peripheral Access Layer, Core intrinsic Functions (i.e. system clock configuration), Start up code:– System_stm32f4xx.c must be included– startup_stm32f40xx.s must be included

• Device specific interrupt and peripheral register definitions.– stm32f4xx.h must be included

• Periph. driver files: i.e. stm32f4xx_adc.c• Header files of the drivers

Required Settings on Project:

The System Tick Timer

• SYSTICK Timer is a simple 24-bit down counter. The timer can be started and configured with an automatic reload value. If the timer is running and it's IRQ is enabled, it generates periodic interrupts

• When used with CMSIS, the System Tick timer is started and setup with the following function:– SysTick_Config (numberOfTicks)

The code that uses the systick:/*----------------------------------------------------------------------------- SysTick_Handler*----------------------------------------------------------------------------*/void SysTick_Handler (void) { msTicks++; // Increment counter}

/*----------------------------------------------------------------------------- MAIN function*----------------------------------------------------------------------------*/int main (void) {

SystemInit (); // Initialize clocks SysTick_Config (SystemFrequency/1000); // Configure the SYSTICK

while (1) { ... }

}

Nested Vectored Interrupt Controller

• The Nested Vectored Interrupt Controller (NVIC) offers very fast interrupt handling and provides the vector table as a set of real vectors (addresses)

• The module is MISC function.

NVIC Init Structure definition

http://www.disca.upv.es/aperles/arm_cortex_m3/curset/STM32F4xx_DSP_StdPeriph_Lib_V1.0.1/html/group___m_i_s_c.html

GPIO Functions

http://www.disca.upv.es/aperles/arm_cortex_m3/curset/STM32F4xx_DSP_StdPeriph_Lib_V1.0.1/html/group___g_p_i_o___group2.html

GPIO Init Structure

http://www.disca.upv.es/aperles/arm_cortex_m3/curset/STM32F4xx_DSP_StdPeriph_Lib_V1.0.1/html/struct_g_p_i_o___init_type_def.html

ADC Functions

Initialization and Configuration functions- Initialize and configure the ADC Prescaler- ADC Conversion Resolution (12bit..6bit)- Scan Conversion Mode (multichannels or one channel) for regular group- ADC Continuous Conversion Mode (Continuous or Single conversion) for regular group- External trigger Edge and source of regular group, - Converted data alignment (left or right)- The number of ADC conversions that will be done using the sequencer for regular channel group - Multi ADC mode selection - Direct memory access mode selection for multi ADC mode - Delay between 2 sampling phases (used in dual or triple interleaved modes) - Enable or disable the ADC peripheral

http://www.disca.upv.es/aperles/arm_cortex_m3/curset/STM32F4xx_DSP_StdPeriph_Lib_V1.0.1/html/group___a_d_c___group1.html

Regular channels conf. functions

http://www.disca.upv.es/aperles/arm_cortex_m3/curset/STM32F4xx_DSP_StdPeriph_Lib_V1.0.1/html/group___a_d_c___group4.html

DMA configuration funct.

http://www.disca.upv.es/aperles/arm_cortex_m3/curset/STM32F4xx_DSP_StdPeriph_Lib_V1.0.1/html/group___a_d_c___group5.html

ADC Structures

• ADC Common Init structure

• ADC Init structure

Direct Memory Access (DMA)

DMA init structures