Memory Management 1. Describe the sequence of instruction-execution life cycle? • A typical instruction-execution life cycle: • Fetches (load) an instruction from specific memory address. • Decode the instruction and fetch operands from specific memory address. • Execute the instruction on the operands. • Store the results back in memory. 2. Memory unit only sees a stream of addresses + read requests during READ Operation and A stream of address + data and write requests during Write Operation. 3. What two registers can be used to provide a simple form of memory protection? Base register Limit Register 4. List the three different times at which address binding may occur. - Compile Time - Load Time - Execution Time 5. Compare between logical address and physical address? Logical address Physical address Does not refer to an actual existing address. it refers to an abstract address A logical address is generated by the CPU Refers to an actual physical address in memory. Physical addresses are generated by the MMU. 6. Consider a system in which a program can be separated into two parts: code and data. The CPU knows whether it wants an instruction (instruction fetch) or data (data fetch or store). Therefore, two base-limit register pairs are provided: one for instructions and one for data. The instruction base–limit register pair is automatically read-only, so programs can be shared among different users. Discuss the advantages and disadvantages of this scheme. Answer: Advantages Disadvantages An effective mechanism for code and data sharing. For example, only one copy of an editor or a compiler needs to be kept in memory, and this code can be shared by all processes needing access to the editor or compiler code. Protection of code against modification the code and data must be separated 7. Why memory page sizes are always powers of 2? It is most efficient to break the address into X page bits and Y offset bits, rather than perform arithmetic on the address to calculate the page number and offset. Because each bit position represents a power of 2, splitting an address between bits results in a page size that is a power of 2.
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Memory Management
1. Describe the sequence of instruction-execution life cycle?
• A typical instruction-execution life cycle:
• Fetches (load) an instruction from specific memory address.
• Decode the instruction and fetch operands from specific memory address.
• Execute the instruction on the operands.
• Store the results back in memory.
2. Memory unit only sees a stream of addresses + read requests during READ Operation and A
stream of address + data and write requests during Write Operation.
3. What two registers can be used to provide a simple form of memory protection?
Base register
Limit Register
4. List the three different times at which address binding may occur.
- Compile Time
- Load Time
- Execution Time
5. Compare between logical address and physical address?
Logical address Physical address
Does not refer to an actual existing address.
it refers to an abstract address
A logical address is generated by the CPU
Refers to an actual physical address in memory.
Physical addresses are generated by the MMU.
6. Consider a system in which a program can be separated into two parts: code and data. The
CPU knows whether it wants an instruction (instruction fetch) or data (data fetch or store).
Therefore, two base-limit register pairs are provided: one for instructions and one for data.
The instruction base–limit register pair is automatically read-only, so programs can be shared
among different users. Discuss the advantages and disadvantages of this scheme.
Answer:
Advantages Disadvantages
An effective mechanism for code and data
sharing. For example, only one copy of an
editor or a compiler needs to be kept in
memory, and this code can be shared by all
processes needing access to the editor or
compiler code.
Protection of code against modification
the code and data must be separated
7. Why memory page sizes are always powers of 2?
It is most efficient to break the address into X page bits and Y offset bits, rather than perform arithmetic
on the address to calculate the page number and offset. Because each bit position represents a power of
2, splitting an address between bits results in a page size that is a power of 2.
8. Consider a logical address space of 64 pages of 1024 words each, mapped onto a physical
memory of 32 frames.
a. How many bits are there in the logical address?
b. How many bits are there in the physical address?
Answer:
a. Logical address: 16 bits
b. Physical address: 15 bits
9. Describe a mechanism by which one segment could belong to the address space of two different
processes.
Answer:
Since segment tables are a collection of base–limit registers, segments can be shared when entries in the
segment table of two different jobs point to the same physical location. The two segment tables must
have identical base pointers, and the shared segment number must be the same in the two processes.
10. In a multiprogramming environment, many processes may be active. What are the tasks that
the OS must accomplish in order to manage the memory requirements of active processes?
The OS must keep track of where and how a program resides in memory and convert logical program
addresses into actual memory addresses.
11. Distinguish between logical addresses and physical addresses.
A physical address is an actual address in the computer's main memory device. A logical address is an
address relative to the program. A logical address is sometimes called a relative address for obvious
reasons.
12. What is address binding?
Address binding is the mapping of a logical address into a physical address.
13. Name two memory management techniques and give the general approach taken in each?
Single contiguous memory management:
- Only the OS and one application program are loaded into memory at the same time.
Paging:
- Main memory is divided into fixed-sized blocks called frames and processes are divided into
fixed-sized blocks called pages. Any number of programs can be loaded with the OS, but a
process does not necessarily have to be in contiguous memory and not all of a process need be in
memory at the same time.
14. When is a logical address assigned to a variable?
When the program is compiled.
15. When does address binding occur?
When the program is loaded into memory.
16. How is memory divided in the single contiguous memory management approach?
Memory is divided into two sections, one for the operating system and one for the application program.
17. When a program is compiled, where is it assumed that the program will be loaded into
memory? That is, where are logical addresses assumed to begin?
At location 0.
18. In a single contiguous memory management approach, if the logical address of a variable is L
and the beginning of the application program is A, what is the formula for binding the logical
address to the physical address?
L + A
19. If, in a single contiguous memory management system, the program is loaded at address 30215,
compute the physical addresses (in decimal) that correspond to the following logical addresses:
A. 9223 39438 (30215 + 9223)
B. 2302 32517 (30215 + 2302)
C. 7044 37259 (30215 + 7044)
20. If, in a fixed partition memory management system, the current value of the base register is
42993 and the current value of the limit register is 2031, compute the physical addresses that
correspond to the following logical addresses:
A. 104 43097
B. 1755 44748
C. 3041 Address out of bounds of partition. Because the generated address is greater than Base + limit.
21. Examples of allocating partitions in memory some requests
22. For the following state of memory.
Operating System
Process 1
Empty 60 blocks
Process 2
Process 3
Empty 52 blocks
Empty 100 blocks
If the partitions are fixed and a new job arrives requiring 52 blocks of main memory, show
memory after using each of the following partition selection approaches:
A. First fit
B. Best fit
C. Worst fit
First Fit Best Fit Worst Fit
Operating System
Process 1
New Process
Process 2
Process 3
Empty 52 blocks
Empty 100 blocks
Operating System
Process 1
Empty 60 blocks
Process 2
Process 3
New Process
Empty 100 blocks
Operating System
Process 1
Empty 60 blocks
Process 2
Process 3
Empty 52 blocks
New process
23. If a logical address in a paged memory management system is <2, 133>, what do the values
mean?
This address means the 133 byte on page 2.
24. For the following page table ( assume frame size=1024):
Page Frame
0 5
1 2
2 7
3 3
a. What is the physical address associated with the logical address <2, 85>?