MCS51 ASSEMBLY Language

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MCS51 ASSEMBLY Language

Resources http://atmel.com/dyn/products/


Pin configuration


Block Diagram


Memory addresses• with 5 address spaces

• Program memory/Code address space up to 64 K bytes• Data Memory

• Directly addressable• Normally 128 bytes low address (0-07FH)• Expand to 256 bytes depend on CPU type (0-0FFH)

• Indirectly addressable• for address 0-0x7f is the same page of direct address• for 0x80-0xff is the another page

• External data address – up to 64K• Bit address space

• same location to data memory address 0x20 – 0x2F• 16 bytes: 128 bit address (0x00 – 0x7f)


Program memory address space

• 2 configuration controlled by /EA pin (External Address)

Internal + external

EA = “1”

External Only

EA = “0”


4 REGISTER BANKS

RAM BIT ADDRESS

SPACE

ON-CHIP RAM

HARDWARE REGISTER MAPPING

NOT AVAILABLE

FOR THE 8031

7

0

255

127

47

31

DIRECTLY/INDIRECTLY ADDRESSABLE ON-CHIP

RAM

Internal data memory allocation

Data Memory


Direct addressing area

• 2 pages : 128 bytes each• lower area : 0x00-0x7f

• general purpose

• address 0x20 – 0x2F is bit addressable

• able to use both direct and indirect addressing mode

• higher area : 0x80 – 0xff with 2 pages• 1st page is conserved for SFR (Special Function Register) area

• use direct addressing mode

• 2nd page is general purpose, access with indirect addressing


Basic internal data memoryextra page of internal memory for other version of MCS51 (8052 etc): use indirect addressing mode


External data memory

• MCS51 able to expand the data memory called external data memory

• up to 64K bytes• use both direct and indirect addressing

mode• not prefer when CPU operate in 1 chip

mode


External data memory configuration

MCS51 data memory, the external and internal are independent

AT89S8252 PROGRAM MEMORY CONFIGURATION

EXTERNAL DATA MEMORY CONFIGURATION


Bit addressable layout


The Registers• locate at 0x80 – 0xff address except register R0-R7 at 4 banks of lower

address 0x00 – 0x1f• 2 type of register• General Purpose registers

• Auxiliary/ Accumulator register (Acc or A) • Multiplication/Scratch Pad Register (B)• Stack pointer (SP)• Data Pointer DPH/DPL -> DPTR • Program Status Word – PSW

• Special Function Registers• SBUF, SCON…TMOD• Interrupt Enable/Priority (IE/ IP)• Port register P0,P1,P2 and P3• etc.

• Both type bit addressable or not depend on register duty• see more detail for each register


Register layout

No name box is empty and conserve for future version


Register layout bit addressable display


General Purpose registers

• 8 registers with 4 banks 8 bytes/bank• R0-R7• location 00H-1FH• 4 banks selection controlled by RS0,RS1 bit

in PSW• often used in couple such as R0:R2, R1:R3

formed as 16 bit register


Stack Pointer (SP)

• initialize set to RAM location 07H• Last In First Out (LIFO) mechanism• store Program Counter, PSW etc. • not exceed 127• increment when use


PSW – Program Status Word

• For operation checking or status such as carry flag, overflow flag

Status for ALU operation


The SFR

• Port: P0 – P3 perform 32 bit addressable independent I/O port

• Timer/Counter : T0 – T2 • 8 bit, timer/counter with internal/external input

• SBUF, SCON• Serial communication buffer and control

• etc.


Instruction group of MCS51 assembly language

• Operation• Arithmetic • logical• boolean

• Data transfer• Program control


Arithmetic operation• Effect PSW register

• OV, CY and AC flag• Command set

• ADD, ADDC : ADD, with Carry• SUB, SUBB : SUBtract, with Borrow• MUL : Register Multiplication• DIV : Register Division• INC : Increment• DEC : Decrement• DAA : Decimal Adjust

• example• ADDC A, #07FH ; add register a with 07f and carry and

; store in A• Question: Show the event that effect OV, CY and AC


Logical Operation

• ANL : AND with accumulator• ORL : logical OR with accumulator• XRL : logical XOR with accumulator• CLR : CLeaR accumulator to zero• CPL : Complement• RL, RLC : Rotate Left, with Carry flag• RR, RRC : Rotate Right, with Carry flag• SWAP : Swap nibble within accumulator


Boolean Manipulation

• manipulate bit or flag• use Carry flag as bit accumulator

• CLR C, bit; clear carry or bit• SETB C or bit; set carry or bit to “1”• CPL C or bit, bit complement• ANL C, bit; C=C and bit• ORL• MOV C, bit; move with carry


Data transfer

• MOV A, <source> ; copy with Accumulator• MOVC A, <indirect>; move code with acc• MOVX A, <indirect>; move external with

; acc• PUSH & POP ; push and pop to stack• XCH A, <source> ; exchange with acc• XCHD A, Rn ; exchange register with A,

; low nibble digit


Machine control• Jump

• with condition• JZ/JNZ ; Jump if Zero flag/non zero flag• JC/JNC ; Jump if carry flag/non carry flag• JB/JNB direct; Jump if direct bit/not direct bit• CJNE ; compare jump if not equal• DJNZ; Decrement and Jump if non zero

• no condition• AJUP/LJMP/SJMP• JMP @A+DPTR ; jump indirect

• CALL• ACALL, LCALL with 11bit, 16 bit address

• Return• RET ; return• RETI ; return from interrupt

• NOP ; no operation


The addressing mode• Register addressing

• source can be either register R0 – R7• MOV A, R0

• Direct addressing• Source is represented with memory location• MOV A, 07FH

• Indirect • source is register and its content is index point to the data location• source is used together with “@” sign• MOV A, @R0; copy to A with the content of R0 point to

• Immediate • source is numeric value• precede with “#” sign• MOV A, #07FH


Indirect Addressing

• register contain the address of memory instead

• normally affect the on-chip RAM• use at sign “@” in the instruction• example

• MOV A, @Rn• MOV @Rn, #07fh


Bit Addressing

• affect the bit addressable area• may name or define the bit address

• eg. SETB TR1 ; set bit Timer reset of Timer1

• SETB 88H.6 ; set the bit at address 88H bit 6


For external data memory• Indirect access only• Use with data transfer instruction group• add C for Code, X for external data memory to the

operation• Use register DPTR (DPH:DPL) for point to either code

and data • example

• MOVX A, @DPTR; • MOVX A, @A+DPTR;

• move the content the dptr is point to register A• MOVC A, @A+DPTR


Instruction SummaryARITHMETIC OPERATIONSADD A,Rn Add register to AccumulatorADD A,direct Add direct byte to ADD A,@Ri Add indirect RAM to AccumulatorADD A,#data Add immediate data to AccumulatorADDC A,Rn Add register to Accumulator with CarryADDC A,direct Add direct byte to Accumulator with CarryADDC A,@Ri Add indirect RAM to Accumulator with CarryADDC A,#data Add immediate data to Acc with CarrySUBB A,Rn Subtract Register from Acc with borrowSUBB A,direct Subtract direct byte from Acc with borrowSUBB A,@Ri Subtract indirect RAM from ACC with borrowSUBB A,#data Subtract immediate data from Acc with borrowINC A Increment AccumulatorINC Rn Increment registerINC direct Increment direct byteINC @Ri Increment direct RAMDEC A Decrement AccumulatorDEC Rn Decrement RegisterDEC direct Decrement direct byteDEC @Ri Decrement indirect RAMINC DPTR Increment Data PointerMUL AB Multiply A & BDIV AB Divide A by BDA A Decimal Adjust AccumulatorLOGICAL OPERATIONSANL A,Rn AND Register to AccumulatorANL A,direct AND direct byte to AccumulatorANL A,@Ri AND indirect RAM to AccumulatorANL A,#data AND immediate data to AccumulatorANL direct,A AND Accumulator to direct byteANL direct,#data AND immediate data to direct byteORL A,Rn OR register to AccumulatorORL A,direct OR direct byte to AccumulatorORL A,@Ri OR indirect RAM to AccumulatorORL A,#data OR immediate data to AccumulatorORL direct,A OR Accumulator to direct byteORL direct,#data OR immediate data to direct byteXRL A,Rn Exclusive-OR register to AccumulatorXRL A,direct Exclusive-OR direct byte to AccumulatorXRL A,@Ri Exclusive-OR indirect RAM to AccumulatorXRL A,#data Exclusive-OR immediate data to AccumulatorXRL direct,A Exclusive-OR Accumulator to direct byteXRL direct,#data Exclusive-OR immediate data to direct byteCLR A Clear AccumulatorCPL A Complement AccumulatorRL A Rotate Accumulator LeftRLC A Rotate Accumulator Left through the CarryRR A Rotate Accumulator RightRRC A Rotate Accumulator Right through the CarrySWAP A Swap nibbles within the AccumulatorDATA TRANSFERMOV A,Rn Move register to AccumulatorMOV A,direct Move direct byte to AccumulatorMOV A,@Ri Move indirect RAM to AccumulatorMOV A,#data Move immediate data to AccumulatorMOV Rn,A Move Accumulator to registerMOV Rn,direct Move direct byte to register

MOV Rn,#data Move immediate data to registerMOV direct,A Move Accumulator to direct byteMOV direct,Rn Move register to direct byteMOV direct,direct Move direct byte to directMOV direct,@Ri Move indirect RAM to direct byteMOV direct,#data Move immediate data to direct byteMOV @Ri,A Move Accumulator to indirect RAMMOV @Ri,direct Move direct byte to indirect RAMMOV @Ri,#data Move immediate data to indirect RAMMOV DPTR,#data16 Load Data Pointer with a 16-bit constantMOVC A,@A+DPTR Move Code byte relative to DPTR to AccMOVC A,@A+PC Move Code byte relative to PC to AccMOVX A,@Ri Move External RAM (8-bit addr) to AccMOVX A,@DPTR Move External RAM (16-bit addr) to AccMOVX @Ri,A Move Acc to External RAM (8-bit addr)MOVX @DPTR,A Move Acc to External RAM (16-bit addr)PUSH direct Push direct byte onto stackPOP direct Pop direct byte from stackXCH A,Rn Exchange register with AccumulatorXCH A,direct Exchange direct byte with AccumulatorXCH A,@Ri Exchange indirect RAM with AccumulatorXCHD A,@Ri Exchange low-order Digit indirect RAM with AccBOOLEAN VARIABLE MANIPULATIONCLR C Clear CarryCLR bit Clear direct bitSETB C Set CarrySETB bit Set direct bitCPL C Complement CarryCPL bit Complement direct bitANL C,bit AND direct bit to CARRYANL C,/bit AND complement of direct bit to CarryORL C,bit OR direct bit to CarryORL C,/bit OR complement of direct bit to CarryMOV C,bit Move direct bit to CarryMOV bit,C Move Carry to direct bitJC rel Jump if Carry is setJNC rel Jump if Carry not setJB bit,rel Jump if direct Bit is setJNB bit,rel Jump if direct Bit is Not setJBC bit,rel Jump if direct Bit is set & clear bitPROGRAM BRANCHINGACALL addr11 Absolute Subroutine CallLCALL addr16 Long Subroutine CallRET Return from SubroutineRETI Return from interruptAJMP addr11 Absolute JumpLJMP addr16 Long JumpSJMP rel Short Jump (relative addr)JMP @A+DPTR Jump indirect relative to the DPTRJZ rel Jump if Accumulator is ZeroJNZ rel Jump if Accumulator is Not ZeroCJNE A,direct,rel Compare direct byte to Acc and Jump if Not EqualCJNE A,#data,rel Compare immediate to Acc and Jump if Not EqualCJNE Rn,#data,rel Compare immediate to register and Jump if Not EqualCJNE @Ri,#data,rel Compare immediate to indirect and Jump if Not EqualDJNZ Rn,rel Decrement register and Jump if Not ZeroDJNZ direct,rel Decrement direct byte and Jump if Not ZeroNOP No Operation


Application with SFR

• I/O PORT• TIMER/Counter• Serial communication• Interrupt control


Port P0 – P3

• 4 Ports, 32 bits• all bits can assign as input/output independently, • alternate function

• P0: address (a0-a7) bus/data bus • P2: high address (a8-a15) bus• P3: control and i/o of Timer/counter and interrupt


Timer/counter

• 2 timer (timer0 and time1) for standard, the same structure

• SFR TCON and TMOD• container is TH:TL• 3 mode • able to use interrupt


Mode 0:13 bit timer/counterMode 1: 16 bit timer/counter


Mode 2: 8 bit auto reload


TMOD & TCON


Serial communication

• MCS51 provide serial communication channel• component need

• timer for communication clock (timer 1 auto reload mode)

• tx : transmit channel and rx : receive channel• control register

• SCON: serial control• content register

• SBUF : data transmit or receive at SBUF register


SCON: Serial Control Register


Baud rate generating


Assembly exampleTwo Byte Decimal Add with Registers and Constants; BCDADD ADD THE CONSTANT 1,234 (DECIMAL) TO THE; CONTENTS OF REGISTER PAIR (R3)(R2);(ALREADY A 4 BCD-DIGIT VARIABLE);BCDADD MOV A, R2

ADD A, #34HDA AMOV R2, AMOV A, R3ADDC A, #12HDA AMOV R3, ARET


Case Statements Using CJNECHAR EQU R7 ; CHARACTER CODE VARIABLE;INTERP CJNE CHAR, #7FH, INTP_1; (SPECIAL ROUTINE FOR RUBOUT CODE)

RETINTP_1 CJNE CHAR, #07H, INTP_2; (SPECIAL ROUTINE FOR BELL CODE)

RETINTP_2 CJNE CHAR, #0AH, INTP_3

(SPECIAL ROUTINE FOR LFEED CODE)RET

INTP_3 CJNE CHAR, #0DH, INTP_4(SPECIAL ROUTINE FOR RETURN CODE)

RETINTP_4 CJNE CHAR, #1BH, INP_5

(SPECIAL ROUTINE FOR ESCAPE CODE)RET

INTP_5 CJNE CHAR, #20H, INTP_6(SPECIAL ROUTINE FOR SPACE CODE)

INTP_6 JC PRINTC ; JUMP IF CODE > 20HMOV CHAR, #0 ; REPLACE CONTROL CHARACTERS WITH

; NULL CODEPRINTC ; PROCESS STANDARD PRINTING

CHARACTERRET


Implementation of Boolean function


Interrupt program

• program that interrupt the main program• ask for service routine• 2 source of interrupt

• internal such as activate by timer overflow flag• external signal source

• when interrupting happen• program counter is load with corresponding address• the address contain interrupt vector point to the routine


concerned register


interrupt source and default value

• default priority• IE0, TF0, IE1, TF1, RI OR TI

• source address

interrupt architecture


References

• Wharton, J., An Introduction to the Intel MCS-51 Single-chip Microcontroller family, Application Notes, AP-69, May 1980, pdf document 01502a01.pdf

• MCS51 microcontroller family user manual, February 1994

• 8-bit micro controller with 8 k bytes flash, Atmel 89s8252 data sheet, doc0401.pdf

MCS51 ASSEMBLY Language

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