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SumTerm HighestWeight BinaryNumberSumTerm
=SumTermHighestWeight
392 256 100000000 136
136 128 110000000 8
8 8 110001000 0
TABLE1.1BCONVERTINGDECIMALTOBINARYUSINGSUMOFWEIGHTSMETHOD
TheSumofweightsmethodrequiresmentalarithmeticandisaquickwayofconvertingsmalldecimal
numbersintobinary.WithpracticelargeDecimalnumberscanbeconvertedintoBinaryequivalents.
RepeatedDivisionMethodAns: Youcanworkout123bytakingoffthreesuntilyougettozero.
Likethis:
12 3 3 3 3=0
Thatmeanstherearefour3sin12.
Usethesamemethodtoworkouttheanswerstothesequestions.
1.
2.
3.
155
204
355
4.
5.
6.
6010
183
244
7.
8.
9.
164
3612
284
Sometimeswhenyouworkoutadivisionusingrepeatedsubtraction,youareleftwitharemainder.
Likethis:
174
17 4 4 4 4=1(Icanttakeanother4awaysotheanswerto174is:4remainder1)
Haveagoatthesequestionswhichallhavearemainder.
1.
2.
3.
195
264
375
4.
5.
6.
6410
173
294
7.
8.
9.
294
3812
414
E X T E N S I O N
Haveagoatthesetrickierdivisionsusingrepeatedsubtraction.
1.
2.
3.
3515
6012
6813
4.
5.
6.
5317
7932
12040
7.
8.
9.
13013
9512
1238
RepeatedMultiplicationmethodAns: Multiplication(symbol"")isthemathematicaloperationofscalingonenumberbyanother.Itisone
ofthefourbasicoperationsinelementaryarithmetic(theothersbeingaddition,subtractionand
division).
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Becausetheresultofscalingbywholenumberscanbethoughtofasconsistingofsomenumberof
copiesoftheoriginal,wholenumberproductsgreaterthan1canbecomputedbyrepeatedaddition;
forexample,3multipliedby4(oftensaidas"3times4")canbecalculatedbyadding4copiesof3
together.
3 x 4 = 3 + 3 + 3 =12
3 x 4 = 4 + 4 + 4 =12
Therearedifferencesamongsteducationalistswhichnumbershouldnormallybeconsideredasthe
numberofcopiesorwhethermultiplicationshouldevenbeintroducedasrepeatedaddition.[1]
Multiplicationofrationalnumbers(fractions)andrealnumbersisdefinedbysystematic
generalizationofthisbasicidea.
Multiplicationcanalsobevisualizedascountingobjectsarrangedinarectangle(forwholenumbers)
orasfindingtheareaofarectanglewhosesideshavegivenlengths(fornumbersgenerally).Thearea
ofarectangledoesnotdependonwhichsideismeasuredfirstwhichillustratesthattheorderin
whichnumbersaremultipliedtogetherdoesnotmatter.
Repeatedmultiplicationofarealnumberbyitselfcanbewritteninexponentialform.
Example:RepeatedMultiplication:222
ExponentialForm:23
Example:RepeatedMultiplication:bbbb
ExponentialForm:b4
DefinitionofExponentialNotation:
Letabearealnumber,avariableoranalgebraicexpression,andletnbeapositiveinteger.
Thenan=aaaa...a(nfactorsofa)
Wherenisthe
exponent
and
aisthe
base.
Theexpressionanisreadas"atothenthpower"orsimplyatothenth".
Note:Exponentsareusedin"exponentialnotation"whichisashortwayofwritingproductswiththe
samefactorrepeatingacertainnumberoftimes.
Note:Thebasecouldbeanynumberbutonlycountingnumberscanbeusedasexponents.
Example:25=22222=32wherethebaseis2andtheexponentis5.
Example:(3)4=(3)(3)(3)(3)=81wherethebaseis(3)andtheexponentis4.
Example: 34= (3 3 3 3)= 81wherethebaseis3andtheexponentis4.
Note:Noticethat isnotapartofthebaseinthelastexample.
Workwithexponentscanbesimplifiedbyusingtherules(properties)ofexponents.PropertiesofExponents:Forallintegersmandnandallrealnumbersaandbthen:
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2. DescribetheapplicationsofBooleanrulesindigitalsystems.Ans: CombinationalLogic
InthesecondlectureyouwereintroducedtoBooleanLogicandtheLogicalOperationsof AND, OR,
NOT, XOR,NAND,andNOR. ThislogicaloperationsaswellasothersarecommonlyimplementedelectronicallyusingDigitalLogicChips.
Tounderstandtheuseofdigitallogicchips,itsmosthelpfultodevelopagraphicrepresentationof
BooleanLogicoperationsusingLogicGates.
LogicGates:
DigitalElectronicsusesymbolstorepresentthedigitallogicorcircuitrywhichareusedtoperform
theselogicaloperations. Theselogicgatesformthebasicconstructiontoolsfordigitalelectronics:
ANDGate: ORGate: Inverter(NOTgate):
A B A B A B A+B A A
0 0 0 0 0 0 0 1
0 1 0 0 1 1 1 0
1 0 0 1 0 1
1 1 1 1 1 1
Othercommonlyusedtypesoflogicaloperationsandelectricallogicgatesinclude:
NANDgate: thecombinationofanANDgatefollowedbyaNOT.
A B A B
0 0 1
0 1 1
1 0 1
1 1 0
NORgate: acombinationofanORgatefollowedbyaNOTgate.
A B A+B
0 0 1
0 1 0
1 0 0
1 1 0
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ExclusiveORgatealsocalledXOR: apairofANDswithoneinvertedinputintoanORgate.
A B or A B
A B A B A B A B+A B
0 0 0 0 00 1 0 1 1
1 0 1 0 1
1 1 0 0 0
Rule20oftheBooleanlogic(DeMorganTheorem)arestatementsthatshowrelationshipsbetween
NANDandNORgatestructures.
NOR NAND
( )X+Y =X Y and
( )X Y =X+Y
ExaminetheTruthTableforeachformof theNOR:
A B A+B0 0 1
0 1 0
1 0 0
1 1 0
A B A B A B 0 0 1 1 1
0 1 1 0 0
1 0 0 1 0
1 1 0 0 0
AsimilarrelationshipisalsotruefortheNANDgate.
ExaminetheTruthTableforeachformof theNOR:
A B A B A B A+B
0 0 1 1 1 1
0 1 1 1 0 1
1 0 1 0 1 1
1 1 0 0 0 0
InSummary:
= =
A
B
=
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ANORmaybecreatedbyeither ANANDmaybecreatedbyeither
invertingtheoutputofanORgate invertingtheoutputofanANDgate
or or
invertingallinputsofanANDgate invertingallinputsofanORgate.
ThereareNANDandNOR(aswellasANDandOR)gateswhichhave3ormoreinputs.
MultipleinputNANDgate:
A B C A+B+CQ = =
MultipleinputNORgate:
A+B+C A B CQ = =
NANDsandNORshaveauniqueandrobustability. Ifyoucouldonlyhaveasinglekindofgate,you'd
probablywanttohaveeitherallNANDsorallNORs. Tounderstandwhy,determinethelogicalresults
ofthecircuitsbelow.
A A A0 1
1 0
A BA B A B A B
0 0 1 0
0 1 1 0
1 0 1 0
1 1 0 1
A B A A B B A A B B 0 0 1 1 0
0 1 1 0 1
1 0 0 1 1
1 1 0 0 1
WhatdotheresultsoftheaboveTruthTablestellyouabouttheNANDgate?
B
A?
A
?B
A ?
= =
orABC
AB
C
Q Q
orAB
C
A
B
C
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AnyotherkindoflogicgatemaybesetupusingonlyNANDintherightnumberandconfiguration.
ItispossibletomakeanyothertypeofcommonlogicgateorlogicgatecircuitoutofallNANDs. In
otherwords,youcouldconstructthecompletelogiccircuitofacomputeroutofonlyonetypeofgate
ifyouwantedto. Thisisnotthemostefficientuseofthegates,andthiswon'tproducethemost
efficientuseofsemiconductordensityorpowerusage, butitcouldbedone.
Inthesameway,theNORcouldalsobeusedtocreateallotherlogicgatesandlogiccircuitry.
Inthespace below,canyoucreatealogicgatestructureusingonlyNORswhichcanbeusedto
replaceanANDgate.
Usingthe20Booleanreductionrulesitispossibletoshowthatthelogicalgatesystemsbelow
producethesamelogicalresults..
(X+Z) (Z+W Y)+(V Z+W X) (Y+Z) isequalto Z W+Z Y
Thegatestructuresareshownbelow. Whichwouldyourathersetupasadigitalcircuitandwhy?
____________________________________________________________________
Youshouldalsohavetheabilitytowriteoutthelogicequationorexpressionfromanexistinggate
diagram.
Whatisthelogicalexpressionshownbythefollowinggatecircuits?
V W X Y Z W Y Z
What are the two
types of gate shown
in the shorter version?
NOR and OR
A
B
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a)
A B+B C DX =
b)
( )A (B C) (C D) DY = +
c)
Canyousimplifyanyofthesethreecircuits? X: Xissimplified
Y: Ycanbesimplifiedto Y=1
Z: Zcanbesimplifiedto DBAZ =
A
B
C
D
Y
A
B
C
D
Z
)()()()( DBACDCBAZ+=
A
B
C
D
X
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DigitalICchips:
Upuntilnow,we'vebeentalkingabouttheselogicgates
asusefulbutvaguelogicalorgraphicalabstractions.
Eachofthelogicgatesdiscussedisavailable
asaneasytouseintegratedcircuit(suchasintheDIP(DualInlinePackage)chipshowntotheright).
Therearetwocommonfamiliesofchip
TTL transistortransistorlogic
and
CMOScomplimentarymetaloxidesemiconductor
SomeofthecommonlyavailableTTLchipsinclude:
7400 Quad2InputNANDGate
7402 Quad2InputNORGate
7404 HexInverter(NOTGate)
7408 Quad2InputANDGate
7410 Triple3InputNANDGate
7411 Triple3InputANDGate
7420 Dual4InputNANDGate
7421 Dual4InputANDGate
7427 Triple3InputNORGate
7430 8InputNANDGate
7432 Quad2InputORGate
7442 BCDtoDecimal4to10LineDecoder
7446 BCDto7SegmentDecoder/Driver
7454 4wideANDORInvertGate
7473 DualJKFlipFlopswithClear
7474 DualDFlipFlopwithClearandPreset7486 Quad2InputXORGate
7489 64bitRead/WriteMemories
7490 DecadeCounters
7491 8bitShiftRegisters
7493 4bitBinaryCounters
74138 3to8LineDecoder/Multiplexer
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3. ExplainKarnaughmapswithyourownexamplesillustratingtheformationAns: AKarnaughMapisamethodofmappingtruthtablesontoamatrixthatidentifiesplaceswheretwo
ormoredifferentcombinationsoftheinputvariablesyieldthesameresult.Inadditiontoidentifying
redundant terms, the K map also cancels them, leaving only the minimized Boolean algebra
expressionsthatwillyieldthesametruthtableoutputsastheunreducedterms.
ThebestwaytounderstandKmapsistogothroughanactualsimplificationprocessusingaKmap.
We will start with a three variable truth table. Three variables have 2 to the 3rd, or 8 possible
combinationsof1sand0s.This means that theKmapmusthave8 cells,one foreverypossible
combinationofinputvariables.TheinputvariablescanbemappedinanyorderontheKmap,butit
mustfollowthesameorganizationasthetruthtablebeingmapped.WewillassignthelettersR,S,&
Ttotheinputvariablesofourtruthtable,andXtotheoutput.
TheKarnaughmapislaidoutsothatfromcelltocellandfromedgetoedge,thereisonlyaonebit
change in thevariablesatanygiven time.Thisaccounts for thecolumn tocolumnand row torow
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orderof 0001 1110. The column variables are assignedacross the top of themap,and the row
variablesareassignedtotheleftsideofthemap.Eachcellcontainstheresultofthevariablesforthe
binarycombinationgivenbytheintersectingrowandcolumn.IfthecolumnvariablesareRSandthe
rowvariablesareTUfora16cellorfourvariablemap,thecombination0110isthesameas(notRS
TnotU)orcell6.Ifthetruthtableshowsa1fortheoutputattheposition0110,thentheKarnaugh
mapwillcontaina1inthatparticularcell.Asanexample,letssimplifythe3bitKmapabove.Noticethefourthreevariableexpressionsreduce
downtothreetwovariableexpressions.Thisisasubstantialsavingsincircuitry,andtheequationwill
doexactlythesamethingastheoriginalunsimplifiedexpressionfromthetruthtable.
ThesamemethodappliestolargerKmapsof4,5,and6variables.FourvariableKmapshavesixteen
cells,since2tothe4this16.FivevariableKmapsaremappedastwo,sixteencellmapssidebyside.
Itislikemappingonemapabovetheother,withthesamenumberedcellsbeingredundant.Six
variableKmapsresultinfour,sixteencellmapstogetherinasquarepattern.Toptobottomandside
byside,redundanciesarecancelledinthesamenumberedcells.MorethanfourvariableKmapsare
rarelyusedbecausetheyaremoredifficulttofollowwithoutgettinglost.
4. Withaneatlabeleddiagramexplaintheworkingofbinaryhalfandfulladders.Ans: Ahalfadder is a logical circuit thatperformsanadditionoperation on two binary digits.The half
adderproducesasumandacarryvaluewhicharebothbinarydigits.
A fulladder isa logical circuit thatperformsanadditionoperationon threebinarydigits.The full
adderproducesasumandcarryvalue,whicharebothbinarydigits.Itcanbecombinedwithotherfull
addersorworkonitsown.
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At the very least,mostpeopleexpect computers todo some kindofarithmetic computation,and
thus,mostpeopleexpectcomputerstoadd.
We'regoingtoconstructcombinationallogiccircuitsthatperformbinaryaddition.Thefirstquestion
you should ask when adding binary numbers, given all the time we've spent talking about
representationis"whatrepresentationarewetalkingabout"?
Clearly the choice of representation is going to affect how we perform the addition. Certain
representationsallowus toadd in thewayweaddbase tennumbers.So, initially,weassumeUB
representation.
First,let'sconsideraddingtwo3bitUBnumbers.
1 1 0
+ 0 1 1
Mostofaddnumbersrighttoleft.Westartattherightmostcolumn(theleastsignifcantbit)andwork
ourwaytotheleft.
1 1 0
+ 0 1 1
1
Asweadd,wemayneedtocarry.Weadd0to1.Whatshouldwecarry?Youmightanswer"Nothing".
Technically,youdon'thavetocarryanything.However,hardwareisn'tsosimple.Ingeneral,onceyou
decide there isanoutput (suchascarry),youneed togenerate thatoutputall the time.Thus,we
needtofindareasonablecarry,evenwhenthere's"noneed"tocarry.
Inthiscase,areasonablecarryistocarrya0,intothenextcolumn,andthenaddthatcolumn
0
1 1 0
+ 0 1 1
0 1
Thistime,whenweaddthemiddlecolumn,weget0+1+1whichsumsto0,withacarryof1.
1 0
1 1 0
+ 0 1 1
(1)0 0 1
Thefinal(leftmost)columnadds1+1+0,whichsumsto0,andalsogeneratesacarry.Weputthe
carryinparenthesesontheleft.
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Typically,whenweperformanadditionoftwokbitnumbers,weexpecttheanswertobekbits. If
thenumbersarerepresentedinUB,theresultcanbek+1bits.Tohandlethatcase,wehaveacarry
bit(theonewritteninparenthesesabove).
B U I L D I N G B L O C K S : HA L F AD D E R S
Asyou lookathownumbersareadded, itseems tobeaddedcolumnbycolumn.Whilewemight
createanadditioncircuitwhichaddstwo3bitvaluesatonce,itmightnotallowustogeneralizeto
addingtwokbitvalues.
Itmakessomesense todesignacircuit thatadds in"columns".Tobegin, let'sconsideradding the
rightmostcolumn.We'readding twobits.So, theadderwewant tocreateshouldhave two inputs
bits.Itgeneratesasumbitforthatcolumn,plusacarry.Sothereshouldbetwobitsofoutput.
Thisdevice iscalledahalfadder. Ihaveno ideawhy,except that itcan't reallybeused to (easily)
buildkbitadders.
Datainputs:2(callthemxandy)
Outputs:2(callthems,forsum,andc,forcarry)
Here'satruthtableforhalfadders.
Row x y c s
0 0 0 0 0
1 0 1 0 1
2 1 0 0 1
3 1 1 1 0
B U I L D I N G B L O C K S : FU L L A D D E R S
The problem with a halfadder is that there it doesn't handle carries. When you look at the left
columnoftheaddition
1 0
1 1 0
+ 0 1 1
(1)0 0 1
youseethatyouaddthreebits.Halfaddersonlyaddtwobits.Weneedacircuitthatcanaddthree
bits.Thatcircuitiscalledafulladder.Herearethecharacteristicsofafulladder.
Datainputs:3(callthemx,y,andcin,forcarryin)
Outputs:2(callthems,forsum,andcout,forcarryout)
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Noticewenowneed tomakeadistinctionwhether thecarry isan input (cin)oranoutput (cout).
Carryin'sincolumniareduetocarryoutsfromcolumni 1(assumingwenumbercolumnsrightto
left,startingatcolumn0attheleastsignificantbit).
Here'satruthtableforfulladders.
Row x y cin cout s
0 0 0 0 0 0
1 0 0 1 0 1
2 0 1 0 0 1
3 0 1 1 1 0
4 1 0 0 0 1
5 1 0 1 1 0
6 1 1 0 1 0
7 1 1 1 1 1
5. Withaneatlabeleddiagramexplaintheworkingof3X8decoder6. ExplaintheSumofProductsCanonicallogicformwithasuitableexample.Ans:SumofProductsForm:InBooleanalgebratheproductoftwovariablescanberepresentedwithAND
functionandthesumofanytwovariablescanberepresentedwithORfunction.ThereforeANDand
ORfunctionsaredefinedwithtwoormoreinputgatecircuitries.SumofProducts(SOP)expressionsis
twoormoreANDandOR functionsexpressedtogether.TheANDtermsareknownasminiterms.A
popular method of representation of SOP form is with miniterms. Since the miniterms are OR
functions,asummationnotationwiththeprefixmisusedtoindicateSOP.Ifnisnumberofvariables
used then theminitermsarenotedwithanumeric representation starting from0 to 2n. SOP isa
usefulformasitcanbeimplementedeasilywithlogicgates.Suchimplementationsarealways2level
gatenetworkmeaningasignalwillpassfromamaximumof2gatesfromtheinputtotheoutput.
Example:f=abc+abc+abc+abc
Here, the function has 4 miniterms. Each miniterms has 3 variables. Hence the miniterms can be
representedwiththeassociated3bitrepresentation.Representationofminitermswith3bitbinary
andequivalentdecimalnumbercanbenoted.Henceabc=101(2)=5,abc=011(2)=3,abc=110(2)
=6andabc=111(2)=7.
Hencef= (5,3,6,7)
m
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ProductofSumsForm:ProductofSum(POS)expression istheANDrepresentationoftwoormore
ORfunctionsTheORtermsareknownasmaxterms.POSisalsousefulasitcanbeimplementedeasily
with logicgates.Such implementationsarealways2levelgatenetworkmeaninga signalwillpass
from a maximum of 2 gates from the input to the output. Similar to SOP, a popular method of
representationofPOSformiswithmaxterms.SincethemaxtermsareANDedaproductnotationwith
theprefixMisused.Ifnisnumberofvariablesusedthenthemaxtermsarenotedwithanumericrepresentationstartingfrom0to2n.
Example:f=(a+b+c)(a+b+c)(a+b+c).
Thereare4maxtermscontaining3variableseach.Hencethemaxtermscanberepresentedwiththe
associated3bitrepresentation.Representationofmaxtermswith3bitbinaryandequivalentdecimal
numbercanbenoted.Hence(a+b+c)=010(2)=2,(a+b+c)=001(2)=1,(a+b+c)=100(2)=4.
Hencef= (2,1,4)
M
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BookID:B0684
7. Withappropriatediagramsexplainthestructureofacomputersystem.Ans: AgeneralpurposecomputersystemconsistsofaCPUandanumberofdevicecontrollers thatare
connectedthrough
acommon
bus
that
provides
access
tothe
shared
memory.
C O M P U T E R S Y S T E M O P E R A T I O N
Eachdevicecontrollerisinchargeofaparticulardevicetype(diskdrive,videodisplaysetc).
I/OdevicesandtheCPUcanexecuteconcurrently.
Eachdevicecontrollerhasalocalbuffer.
CPUmovesdatafrom/tomainmemoryto/fromlocalbuffers
I/Oisfromthedevicetolocalbufferofcontroller.
DevicecontrollerinformsCPUthatithasfinisheditsoperationbycausinganinterrupt.
S T E P S I N S T A R T I N G A N I / O D E V I C E A N D G E T T I N G I N T E R R U P T
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D E V I C E A N D D E V I C E C O N T R O L L E R
D E V I C E
C O N T R O L L E R
S O F T W A R E
R E L A T I O N S H I P
D E V I C E C O N T R O L L E R I N T E R F A C E
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Afterinterrupthandlerroutinecompletes,theprocessorchecksforadditionalinterrupts.
Assignprioritiestointerrupts.
Higherpriorityinterruptscauselowerpriorityinterruptstowait.
Causesalowerpriorityinterrupthandlertobeinterrupted.
Example:wheninputarrivesfromcommunicationline,itneedstobeabsorbedquicklytomakeroom
formoreinput.
T R A P S
A trap is a software-generated interrupt caused by an error, for example:
arithmetic overflow/underflow
division by zero
execute illegal instructionreference outside users memory space
8. ExplaintheVonNeumannArchitecturewithrelevantdiagramsAns: ThevonNeumannarchitecture isadesignmodel forastoredprogramdigitalcomputerthatusesa
central processing unit (CPU) and a single separate storage structure ("memory") to hold both
instructions and data. It is named after the mathematician and early computer scientist John von
Neumann.SuchcomputersimplementauniversalTuringmachineandhaveasequentialarchitecture.
Astoredprogramdigitalcomputerisonethatkeepsitsprogrammedinstructions,aswellasitsdata,
inreadwrite,randomaccessmemory(RAM).Storedprogramcomputerswereanadvancementoverthe programcontrolled computersof the1940s, such as the Colossus and theENIAC, which were
programmed by setting switches and inserting patch leads to route data and to control signals
between various functional units. In the vastmajority ofmodern computers, the samememory is
used for both data and program instructions. The mechanisms for transferring the data and
instructions between the CPU and memory are, however, considerably more complex than the
originalvonNeumannarchitecture.
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The terms "von Neumann architecture" and "storedprogram computer" are generally used
interchangeably,andthatusageisfollowedinthisarticle.
The earliest computing machines had fixed programs. Some very simple computers still use this
design,eitherforsimplicityortrainingpurposes.Forexample,adeskcalculator(inprinciple)isafixed
program computer. It can do basic mathematics, but it cannot be used as a word processor or a
gamingconsole.Changingtheprogramofafixedprogrammachinerequiresrewiring,restructuring,
orredesigningthemachine.Theearliestcomputerswerenotsomuch"programmed"astheywere
"designed". "Reprogramming", when it was possible at all, was a laborious process, starting with
flowchartsandpapernotes, followedbydetailedengineeringdesigns,and then theoftenarduous
process ofphysically rewiringand rebuilding themachine. It could take threeweeks to setup a
programonENIACandgetitworking.[1]
The ideaof the storedprogramcomputerchangedall that:a computer thatbydesign includesan
instruction set and can store in memory a set of instructions (a program) that details the
computation.
Astoredprogramdesignalso letsprogramsmodifythemselveswhilerunning.Oneearlymotivation
forsuchafacilitywastheneedforaprogramtoincrementorotherwisemodifytheaddressportion
of instructions,whichhad tobedonemanually inearlydesigns.Thisbecame less importantwhenindexregistersandindirectaddressingbecameusualfeaturesofmachinearchitecture.Selfmodifying
codehaslargelyfallenoutoffavor,sinceitisusuallyhardtounderstandanddebug,aswellasbeing
inefficientundermodernprocessorpipeliningandcachingschemes.
Ona large scale, theability to treat instructionsasdata iswhatmakesassemblers, compilersand
otherautomatedprogrammingtoolspossible.Onecan"writeprogramswhichwriteprograms".[2]On
asmallerscale,I/OintensivemachineinstructionssuchastheBITBLTprimitiveusedtomodifyimages
onabitmapdisplay,wereoncethoughttobeimpossibletoimplementwithoutcustomhardware.It
wasshownlaterthattheseinstructionscouldbeimplementedefficientlyby"ontheflycompilation"
("justintimecompilation") technology,e.g.codegeneratingprogramsone formofselfmodifying
codethathasremainedpopular.
TherearedrawbackstothevonNeumanndesign.AsidefromthevonNeumannbottleneckdescribed
below, program modifications can be quite harmful, either by accident or design. In some simple
storedprogramcomputerdesigns,amalfunctioningprogramcandamage itself,otherprograms,or
theoperatingsystem,possibly leadingtoacomputercrash.Memoryprotectionandother formsof
accesscontrolcanusuallyprotectagainstbothaccidentalandmaliciousprogrammodification.
9. Explaintheorganizationof8085processorwiththerelevantdiagrams
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Ans: InternalArchitectureof8085Microprocessor
The8085A isacomplete8bitparallelcentralprocessor. Itrequiresasingle+5voltsupply. Itsbasic
clockspeed is3MHzthus improvingonthepresent8080'sperformancewithhighersystemspeed.
Also it isdesigned to fit intoaminimumsystemof three IC's:TheCPU,aRAM/ IO,andaROMor
PROM/IOchip.
The8085AusesamultiplexedDataBus.Theaddressissplitbetweenthehigher8bitAddressBusand
the lower8bitAddress/DataBus.During the firstcycle theaddress issentout.The lower8bitsare
latchedintotheperipheralsbytheAddressLatchEnable(ALE).Duringtherestofthemachinecycle
theDataBusisusedformemoryorl/Odata.
The8085AprovidesRD,WR,andlO/Memorysignalsforbuscontrol.AnInterruptAcknowledgesignal
(INTA) isalsoprovided.Hold,Ready,andall Interrupts are synchronized.The8085Aalsoprovides
serialinputdata(SID)andserialoutputdata(SOD)linesforsimpleserialinterface.
Inadditiontothesefeatures,the8085Ahasthreemaskable,restartinterruptsandonenonmaskable
trapinterrupt.The8085AprovidesRD,WRandIO/MsignalsforBuscontrol.
T H E 8 0 8 5 P R O G R A M M I N G M O D E L
Intheprevioustutorialwedescribedthe8085microprocessorregisters inreferencetothe internal
data operations. The same information is repeated here briefly to provide the continuity and the
context to the instruction set and to enable the readers who prefer to focus initially on the
programmingaspectofthemicroprocessor.
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The8085programmingmodelincludessixregisters,oneaccumulator,andoneflagregister,asshown
inFigure.Inaddition,ithastwo16bitregisters:thestackpointerandtheprogramcounter.Theyare
describedbrieflyasfollows.
T H E 8 0 8 5 A D D R E S S I N G M O D E S
TheinstructionsMOVB,AorMVIA,82Haretocopydatafromasourceintoadestination.Intheseinstructionsthesourcecanbearegister,aninputport,oran8bitnumber(00HtoFFH).Similarly,a
destinationcanbearegisteroranoutputport.Thesourcesanddestinationareoperands.Thevarious
formatsforspecifyingoperandsarecalledtheADDRESSINGMODES.For8085,theyare:
1.Immediateaddressing.
2.Registeraddressing.
3.Directaddressing.
4.Indirectaddressing.
I M M E D I A T E A D D R E S S I N G
Dataispresentintheinstruction.Loadtheimmediatedatatothedestinationprovided.
Example:MVIR,data
R E G I S T E R A D D R E S S I N G
Dataisprovidedthroughtheregisters.
Example:MOVRd,Rs
D I R E C T A D D R E S S I N G
Usedtoacceptdatafromoutsidedevicestostoreintheaccumulatororsendthedata
storedintheaccumulatortotheoutsidedevice.Acceptthedatafromtheport00Hand
storethemintotheaccumulatororSendthedatafromtheaccumulatortotheport
01H.
Example:IN00HorOUT01H
I N D I R E C T A D D R E S S I N G
ThismeansthattheEffectiveAddressiscalculatedbytheprocessor.Andthecontentsoftheaddress
(and theone following) isused to formasecondaddress.Thesecondaddress iswhere thedata is
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stored.Notethatthisrequiresseveralmemoryaccesses;twoaccessestoretrievethe16bitaddress
andafurtheraccess(oraccesses)toretrievethedatawhichistobeloadedintotheregister.
10. DescribetheinstructioncycleofaCPUwithasuitablenumericalexampleAns: Intoday'stimeaCPUmayonlystayonthemarketfor24months,someevenlessbeforeitisreplaced
bysomethingnewandgreater.Morefeatures,morecache,today'smarketbegs,evencriesformore,
andCPUmanufacturersarequicktojumpinwithsomethingnew,butnotalwaysgreat.Thiswasnot
alwaysso.
Therewasatimenotsolongagowhenpeoplebeggedformore,andCPUmanufacturersstrainedto
producebutwerenotalwayssuccessful.OftennewdesignsWEREcreatedthatWEREbetter,butthe
pricewasabsolutelyinsane.ThisledtotheolderCPUscontinuedproductionanduse.Sometimesfor
many,manyyearspastitsreleasedate.Speedswouldincrease(ornot),powerconsumptionanddie
sizewouldbereduced,oftenthesupplyorI/Ovoltageswouldbedesignedtoworkatlowerlevelsbut
stillbe'tolerant'totheoriginalspecifications.
ItisimportanttoseethislifecycleofCPUsastheymaturedinthemarkettorealizetheimportanceof
someofthesehistoricchips.Chipsdesignedinthe1970sareSTILLbeingmade.Whereassomechips
designedinthe1990slastedforbutafewmonths.Iwillstartwiththe1970swithsuchfamouschips
astheIntel4004andtheMOS6502andslowlywewilllookforwardtothe1990's.
It isveryapparentwhat ishappeninghere.CPUs introduced inthe late1970'sandearly1980'sare
often still in use today. Why is this so? Certainly today'sdesigns are much more robust however,
whenyoudesignaprinterorasewingmachineyoudonotwantaP4oraAMDK6topowerit.You
wantsomethingsimple,cheapandeasytouse.SomethinglikeaZilogZ80,MOS6502orNEC7810is
ALLmanyapplicationsneed.Theyhave theaddedbenefitofhavingHUGE codebases (amountof
softwareALREADYwrittenforthem).Inotherwords,ifitaintbroke,don'tfixit.
Ifyou lookcloselyatthetypesofCPUsmade late inthe lifecycleyouwillseeashift inproduction
fromcommercialspecchipstochipsthatareT,IandMspec.ExtendedTemperature,Industrial,and
Military.Allareaswhereonewantssomethingtoworkthesamewayalways.Thesemarketsaresome
ofthebiggestfor 'old'CPUs. Itworksfineforthem,and isnotnearassensitiveasmodernCPUsto
variations involtageand temperature.A lotof these industrialchipswillallowa15% fluctuation in
voltage,attemperaturesfrom 50Cto125C.TryTHATwithaP4.
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Today'smodernCPUsareVERYspecialized.Yesyoucanrunabout100,000applicationsonanAMDK6
onyourPC,butwhereelsedoyouseeAMDK6CPUs?That'sright,theyONLYexistincomputers(or
computerizedrouters).MostallcomputingneedsareNOTsittingonyourdesksoyoucansurfeBay
andplayDoom III, they are in your car, your cell phone, your printers and even yourmicrowave.
Controlapplicationsaccountfor90%oftheCPUmarket.
InthelastfewyearsIntelhasbeenworkinghardtogainbackalotoftheembeddedcustomersthey
oncehad.WiththeirnewCPUs(Atometc)theywillhaveseveralspecsthattheyguarenteeanEndOf
Lifenoearlierthen7years fromwhen it firstcomesout.Thisgivesengineersabitmorebreathing
roomintheirdesignlifeanalysis.
IfIplacedtheARMcoreoranyoftheMIPScores inthis listyouwouldseethemstillinproduction.
Why? because they are simple (RISC based in most cases) CPUs that lend themselves to MANY
differentapplications.TheyareuselessforthePC(AskAcorncomputersaboutARMdevicesinthePC
;))butforanythingelseintheworldtheyworkgreat.
Somethingelseofinterestingnote:Speed
Orthelackof,manyofthe'old'CPUsstillinproductionarebeingmadeatexactlythesamespeedas
theywerewhentheywereintroduced,ornotmuchfaster.The6502madenowbyWDCisclockedat
theSAMEspeedas30yearsago.TheZilogZ80hasbeenclockedupto20MHzbutisstillavailableat
6Mhz.TheInteli186istheexactsamething,stillavailableatitsinitialspeed.
11. DescribethefollowingelementsofBusDesignA)BusTypes
Ans: Thefunctionalunitsareinterconnectedtoenabledatatransport(e.g.,writeCPUregisterdatacontent
toacertainaddressinmemory)
Theunit !unitinterconnectionsarereferredtoasabusses Bus:abundleofconductors(wires/tracks)layedoutonthemotherboard(buswidth=numberofconductorsinbundle)
Data and addresses are communicated on separate dataand address busses (history:e.g., Intel8086usedshareddata/addressbus)
B U S T Y P E S:
databus(movedata)addressbus(selectaddressinmemory,selectportinI/Ounit)controlbus(synchronizeunits,requestactionfromunit,unitstate)Thebussesprovidean infrastructure that issharedbyallunits.Thereareno individualunit !unit
(pointtopoint)interconnections(exception:interruptrequestlines)
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B)ArbitrationMethodsBus Arbitrationanelaborate system for resolvingbus control conflictsandassigningpriorities to the
requestsforcontrolofthebus.
Bus Mastering amethod of enablingdifferentdevice controllers on the bus to talk toonean
other,withouthavingtogothroughtheCPU.DMA(Direct Memory Access) a method of transferring data from a hard disk to main memory
withouthavingtogothroughtheCPU.
C E N T R A L I Z E D
Centralizedbusarbitrationrequireshardware(arbiter)thatwillgrantthebustooneoftherequesting
devices.ThishardwarecanbepartoftheCPUoritcanbeaseparatedeviceonthemotherboard.
D E C E N T R A L I Z E D
Decentralized arbitration there isn'tanarbiter, so thedeviceshave todecidewhogoesnext.This
makesthedevicesmorecomplicated,butsavestheexpenseofhavinganarbiter.
C E N T R A L I Z E D
O N E
L E V E L
B U S
A R B I T E R
Thismethodofarbitrationusesonecentralizedbuscontrollerthatalldevicescanquery.
Thismethodofarbitrationusesonecentralizedbuscontrollerthatalldevicescanquery. Thereare2
linesthatareused:
BusRequestLineAwiredORthatthecontroller knows a request was made, butdoesnotknowwhichdevicemadethe request.
BusGrantLineFirstasignalispropagatedtoalldevices.TheBus Grant Line is asserted tothefirstdeviceinthechain.Ifthatdevicemade therequest it takesaholdof thebusand
leavestheBusGrantLinenegatedforthenextdeviceinthechain.Ifthatdevicedidntmakethe
requestthentheBusGrantLineisassertedforthenextdeviceinthechain.Iftwodevicesmakea
requestforthebusatthesametimethenthedeviceclosertothecontrollergetsthebus.Thisiscalleddaisychaining
C E N T R A L I Z E D T W O L E V E L B U S A R B I T E R
UsesaBusRequestLineandBusGrantLineforeachLevel
CentralizedTwoLevelBusArbiter
BusRequestline:oneforeachlevelBusGrantline:oneforeachlevelThisHelpstoalleviatetheproblemoftheclosestdevicetothecontrollergettingcontrolofthebus.If
more than one request comes in at one time, control is granted based on priority. One major
advantage to this is when a lower priority device has control of the bus, a higher priority device
cannotstealthebusfromthatdevice.
C)BusTimingAns: Thewiderangeofdevelopmenttoolsfortimetriggeredbussystemshasbeenextendedbytwonew
software products for validating timetriggered functions. This article illustrates the changes
necessaryin
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testingandvalidating timetriggeredbussystems, the reasonbeing that thedesignof thenetwork
andthe
subsequentconfigurationofthecommunicationhardwarecovermanyfunctionsandfaultdetection
mechanismsofthebussystemandapplication.Thetechnicalpropertiesofthetimetriggeredsystem
ruleoutcertainfaultystatesthatcanbetestedbyusingexplicittestmethodssuchasstressandbitfault
generationinaneventtriggeredsystem.
TTTechprovidessoftwaretoolssuitedfortestingthecommunicationsystemandvalidatingthedata
interface
of control units in TTPbased networks. These tools canmonitor and calibrate the properties of a
timetriggered
bussystemsuchasstrictlycyclictransmissionofmessages,detectionofdroppedoutmessages,
behavior of the remaining net at high load and with interrupted transmissions as well as the
functional
behaviorofthesoftware.
12. Explainthefollowingtypesofoperations:TypesofOperations
Ans: Severaltypesofoperationsmaybeconducted:
O F F E N S I V E
destroy,defeatandimposeUSwillontheenemytoachievedecisivevictory
D E F E N S I V E
defeatanenemyattack,buy time,economize forces,ordevelopconditions favorable foroffensive
operations.Normallynotdecisive.
S T A B I L I T Y
promote and protect US national interests through a combination of peacetime developmental,
cooperativeactivitiesandcoerciveactionsinresponsetocrisis.
S U P P O R T
employArmyforcestoassistcivilauthorities,foreignordomestic,astheypreparefororrespondto
crisisandrelievesuffering.
V O I C E : TheArmy achieves full spectrum dominance by balancing 4 types ofoperations: offensive,
defensive,stability,andsupport.Therelativemixofoperationsvariesacrossthespectrumofconflict.
For instance, offensive operations dominate during war but might not occur at all during peace
operations. You probably understand offensive and defensive operations. During periods of
peacetimemilitaryengagementandotheroperationsotherthanwar,twoothertypesofoperations
dominate and may be decisive. Stability operations promote and protect U.S. national interests
through a combination of peacetime developmental, cooperative activities and coercive actions in
response to crises. Support operations employ Army forces to assist civil authorities, foreign or
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domestic,as theyprepare fororrespond tocrisisandrelievesuffering.Youcanreview thepopup
informationbyrollingyourcursoroveritinthediagram.
DatatransferAns: Data transmission,digital transmissionordigital communications is thephysical transferofdata (a
digitalbitstream)overapointtopointorpointtomultipointcommunicationchannel.Examplesofsuchchannelsarecopperwires,opticalfibres,wirelesscommunicationchannels,andstoragemedia.
The data is represented as an electromagnetic signal, such as an electrical voltage, radiowave,
microwaveorinfraredsignal.
While analog communications is the transfer of continuously varying information signal, digital
communications is the transfer of discrete messages. The messages are either represented by a
sequence of pulses by means of a line code (baseband transmission), or by a limited set of
continuously varying wave forms (passband transmission), using a digital modulation method. The
passbandmodulationand correspondingdemodulation (alsoknownasdetection) is carriedoutby
modemequipment.According to themostcommondefinitionofdigitalsignal,bothbasebandand
passbandsignalsrepresentingbitstreamsareconsideredasdigitaltransmission,whileanalternative
definitiononlyconsidersthebasebandsignalasdigital,andpassbandtransmissionofdigitaldataasaformofdigitaltoanalogconversion.
Datatransmittedmaybedigitalmessagesoriginatingfromadatasource,forexampleacomputerora
keyboard. Itmayalsobeananalogsignalsuchasaphonecalloravideosignal,digitized intoabit
streamforexampleusingpulsecodemodulation(PCM)ormoreadvancedsourcecoding(analogto
digitalconversionanddatacompression)schemes.Thissourcecodinganddecodingiscarriedoutby
codecequipment.
ArithmeticAns: Arithmeticoperatorsareusedtoperformmanyofthefamiliararithmeticoperationsthatinvolvethe
calculation of numeric values represented by literals, variables, other expressions, function and
propertycalls,andconstants.
Youcanaddtwovaluesinanexpressiontogetherwiththe+operator,orsubtractonefromanother
withtheoperator,asshowninthefollowingexamples:
DimxAsInteger
x=67+34
x=32 12
Negationalsousestheoperator,butwithsomewhatdifferentsyntax,asshownbelow:
DimxAsInteger=65DimyAsInteger
y= x
Multiplicationanddivisionusethe*and/operators,respectively,asintheseexamples:
DimyAsDouble
y=45*55.23
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y=32/23
Exponentiationusesthe^operator,asshownbelow:
DimzAsDouble
z=23^3 'zequalsthecubeof23.
Integerdivisioniscarriedoutusingthe\operator.Integerdivisionreturnsthenumberoftimesone
integercanevenlydivideintoanother.Onlyintegraltypes(Byte,Short,Integer,andLong)canbe
usedwiththisoperator.Allothertypesmustbeconvertedtoanintegraltypefirst.Thefollowingisan
exampleofintegerdivision:
DimkAsInteger
k=23\5 'k=4
ModulusarithmeticisperformedusingtheModoperator.Thisoperatorreturnstheremainderafter
thedivisorisdividedintothedividendanintegralnumberoftimes.Ifbothdivisoranddividendareintegraltypes,thereturnedvalueisintegral.Ifdivisoranddividendarefloatingpointtypes,the
returnedvalueisafloatingpointvariable.Twoexamplesillustratethisbehavior:
DimxAsinteger=100
DimyAsInteger=6
DimzAsInteger
z=xMody 'zequals4.
DimaAsDouble=100.3
DimbAsDouble=4.13
DimcAsDouble
c=aModb 'cequals1.18.