Microprocessor Microprocessor System System By By Engr.Shafiullah Soomro Engr.Shafiullah Soomro [email protected] [email protected] SESSION OF MOTOROLA 6800
Microprocessor Microprocessor SystemSystem
ByBy
Engr.Shafiullah SoomroEngr.Shafiullah [email protected]@gmail.com
SESSION OF MOTOROLA 6800
History of Motorola 6800History of Motorola 6800
► The 6800 ("sixty-eight-hundred") was an 8-bit microprocessor designed and first manufactured by Motorola in 1974.
► The 6800 has a 16-bit address bus that could directly access 64 KB of memory and an 8-bit bi-directional data bus.
► It has 72 instructions with seven addressing modes for a total of 197opcodes. The original MC6800 could have a clock frequency of up to 1 MHz. Later versions had a maximum clock frequency of 2 MHz.
Other Motorola Other Motorola microprocessorsmicroprocessors
Short Description of Pin DiagramShort Description of Pin Diagram
Pin descriptionPin description
6800 Architecture6800 Architecture
Register Set and Programmers Model►The 6800 has six internally accessible
registers. These are two 8-bit accumulators or general purpose register (A and B),
► three 16-bit registers PC, SP, and► Index register - X) ►and an 8-bit condition code or status
register which has 6 flags in total.
A 8 bit accumulators,
general purpose registers
16 bit registers
8 bit status register
B
Program Counter - PC
Stack Pointer - SP
Index Register - X
H I N Z V C
► The Accumulators A and B:► Each stores and manipulates one 8-bit word under program
control.► ► The Index register - X► Is a 2-byte register. It holds memory addresses when using
indexed-addressing mode instructions. ► ► The Program Counter - PC► Is a 2-byte register which contains the address of the next byte of
the instruction to be fetched from memory (instructions can be from one to 3 bytes in length). When the current value of the program counter is placed on the address bus, the PC is updated to the value of the next instruction for execution.
► Stack pointer - SP► A 2-byte register which holds the starting address
of sequential memory locations in RAM where the contents of the CPU registers may be stored and retrieved. The 6800 uses RAM for its stack.
► Status Register or Condition Codes Register► This final register contains six flags which are set or
cleared in response to how the program executes. These flags are:
► Condition Code Register: Condition Code Register: It shows the conditions It shows the conditions occurs as a result of an Arithmetic Logic Unit occurs as a result of an Arithmetic Logic Unit
► Bit 0: carry from bit 7 of an arithmetic operation (C) Bit 0: carry from bit 7 of an arithmetic operation (C) ► Bit 1: Overflow flag (V) Bit 1: Overflow flag (V) ► Bit 2: Zero flag (Z) Bit 2: Zero flag (Z) ► Bit 3: Negative flag (N) Bit 3: Negative flag (N) ► Bit 4: Interrupt Mask (I) Bit 4: Interrupt Mask (I) ► Bit 5: Half carry from bit 3 of an arithmetic operation Bit 5: Half carry from bit 3 of an arithmetic operation
(H) (H) ► Bit 6: Unused Bit 6: Unused ► Bit 7: Unused Bit 7: Unused ► These bits of the Condition Code Register are used as These bits of the Condition Code Register are used as
testable conditions for the conditional branch testable conditions for the conditional branch instructions. Bit 4 of the CCR is the interrupt mask bit instructions. Bit 4 of the CCR is the interrupt mask bit (I). The unused bits of the Condition Code Register (bit (I). The unused bits of the Condition Code Register (bit 6 and bit 7) are 1. 6 and bit 7) are 1.
ADDRESSING MODES ADDRESSING MODES ► The 6800 uses a 16-bit address bus allowing access to
65,536 8-bit words within memory. The 16-bit address can be split into a most significant (MS) byte, the first 8-bits of the address and the Least Significant (LS) byte the second 8-bits. For Input Output I/O a portion of memory space is used to access I/O ports.
► There are seven addressing modes available to a 6800 programmer.
► Accumulator Addressing Accumulator Addressing ► In accumulator addressing, either accumulator A or In accumulator addressing, either accumulator A or
accumulator B is specified. These are 1-byte accumulator B is specified. These are 1-byte instructions. instructions.
► Ex: ABA Ex: ABA adds the contents of accumulators and stores adds the contents of accumulators and stores the result in accumulator A the result in accumulator A
► Immediate Addressing Immediate Addressing ► In immediate addressing, operand is located immediately after the In immediate addressing, operand is located immediately after the
opcode in the second byte of the instruction in program memory (except opcode in the second byte of the instruction in program memory (except LDS and LDX where the operand is in the second and third bytes of the LDS and LDX where the operand is in the second and third bytes of the instruction). These are 2-byte or 3-byte instructions. instruction). These are 2-byte or 3-byte instructions.
► Ex: LDAA #25H Ex: LDAA #25H loads the number (25)H into accumulator A loads the number (25)H into accumulator A
► Direct Addressing Direct Addressing ► In direct addressing, the address of the operand is contained in the In direct addressing, the address of the operand is contained in the
second byte of the instruction. Direct addressing allows the user to second byte of the instruction. Direct addressing allows the user to directly address the lowest 256 bytes of the memory, i.e, locations 0 directly address the lowest 256 bytes of the memory, i.e, locations 0 through 255. Enhanced execution times are achieved by storing data in through 255. Enhanced execution times are achieved by storing data in these locations. These are 2-byte instructions. these locations. These are 2-byte instructions.
► Ex: LDAA 25H Ex: LDAA 25H loads the contents of the memory address (25)H into loads the contents of the memory address (25)H into accumulator A accumulator A
► Extended Addressing Extended Addressing ► In extended addressing, the address contained in In extended addressing, the address contained in
the second byte of the instruction is used as the the second byte of the instruction is used as the higher eight bits of the address of the operand. The higher eight bits of the address of the operand. The third byte of the instruction is used as the lower third byte of the instruction is used as the lower eight bits of the address for the operand. This is an eight bits of the address for the operand. This is an absolute address in the memory. These are 3-byte absolute address in the memory. These are 3-byte instructions. instructions.
► Ex: LDAA 1000H Ex: LDAA 1000H loads the contents of the loads the contents of the memory address (1000)H into accumulator A memory address (1000)H into accumulator A
► Indexed Addressing Indexed Addressing ► In indexed addressing, the address contained in the In indexed addressing, the address contained in the
second byte of the instruction is added to the index second byte of the instruction is added to the index register’s lowest eight bits. register’s lowest eight bits.
► The carry is then added to the higher order eight bits The carry is then added to the higher order eight bits of the index register. This result is then used to of the index register. This result is then used to address memory. The modified address is held in a address memory. The modified address is held in a temporary address register so there is no change to temporary address register so there is no change to the index register. These are 2-byte instructions. the index register. These are 2-byte instructions.
► Ex: LDX #1000H Ex: LDX #1000H ► LDAA 10H,X LDAA 10H,X ► Initially, LDX #1000H instruction loads 1000H to the Initially, LDX #1000H instruction loads 1000H to the
index register (X) using immediate addressing. Then index register (X) using immediate addressing. Then LDAA 10H,X instruction, using indexed addressing, LDAA 10H,X instruction, using indexed addressing, loads the contents of memory address (10)H + loads the contents of memory address (10)H + X=1010H into accumulator A.X=1010H into accumulator A.
► Implied (Inherent) Addressing Implied (Inherent) Addressing ► In the implied addressing mode, the instruction In the implied addressing mode, the instruction
gives the address inherently (i.e, stack pointer, gives the address inherently (i.e, stack pointer, index register, etc.). Inherent instructions are used index register, etc.). Inherent instructions are used when no operands need to be fetched. These are 1- when no operands need to be fetched. These are 1- byte instructions. byte instructions.
► Ex: INX Ex: INX increases the contents of the Index increases the contents of the Index register by one. The address information is register by one. The address information is "inherent" in the instruction itself. "inherent" in the instruction itself.
► INCA INCA increases the contents of the accumulator A increases the contents of the accumulator A by one. by one.
► DECB DECB decreases the contents of the accumulator B decreases the contents of the accumulator B by one. by one.
► Relative Addressing Relative Addressing ► The relative addressing mode is used with most of the The relative addressing mode is used with most of the
branching instructions on the 6802 microprocessor. The first branching instructions on the 6802 microprocessor. The first byte of the instruction is the opcode. The second byte of the byte of the instruction is the opcode. The second byte of the instruction is called the instruction is called the offsetoffset. The offset is interpreted as a . The offset is interpreted as a signed 7-bit numbersigned 7-bit number. .
► If the MSB (most significant bit) of the offset is 0, the number is If the MSB (most significant bit) of the offset is 0, the number is positive, which indicates a forward branch. If the MSB of the positive, which indicates a forward branch. If the MSB of the offset is 1, the number is negative, which indicates a backward offset is 1, the number is negative, which indicates a backward branch. This allows the user to address data in a range of -126 branch. This allows the user to address data in a range of -126 to +129 bytes of the present instruction. These are 2-byte to +129 bytes of the present instruction. These are 2-byte instructions. instructions.
► Ex: PC Hex Label Instruction Ex: PC Hex Label Instruction ► 0009 2004 BRA 0FH 0009 2004 BRA 0FH
Flags Flags