www.jmic.com.tw Low Temperature Co-fired Ceramic (LTCC) Design Guidelines for RF 3D Package Module Design Purpose The purpose of this document is to give an overview of design guidelines for LTCC (Low Temperature Co-fired Ceramic) material set. Scope This document covers assembly and substrate design guidelines for LTCC and substrates for use with SMD, chip and wire, and flip chip assembly. Process Overview The ceramic modules are built by first placing the chip components using an SMT line. After the surface mount devices are mounted to the module, the final assembly is done on the ceramic back-end manufacturing line. The ceramic back-end process capability includes: -chip attach and underfill arking Depending on the module design, some or all of these process steps may be required. For many features, both standard and advanced design rules are given. The standard rules are generally applicable to designs using LTCC materials. The advanced design rules may not apply to all types of materials and approval by Amkor product management is required before advanced rules are used. Material Properties The following table lists typical material properties for LTCC substrates MATERIAL CTE THERMAL CONDUCTIVITY [ 10-6/K] SPECIFIC HEAT YOUNG'S MODULUS [GPa] SHRINKAGE (X, Y) SHRINKAGE (Z) Yamamula GCS71EAS 5.3 2.2 17% 23% Hereaus 51555W 5.2 TBD 17% 23% MATERIAL BENDING STRENGTH [MPa] DIELECTRIC CONSTANT @ 1MHz,R.T. DIELECTRIC CONSTANT @ 10GHz,R.T. DIELECTRIC LOSS @ 1MHz,R.T. DIELECTRIC LOSS @ 10GHz,R.T. VOLUME RESISTIVITY [Ohmm] Yamamula GCS71EAS 250 7.1 TBD <30 TBD Hereaus 51555W TBD 7.5 TBD <10 TBD
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Low Temperature Co-fired Ceramic
(LTCC) Design Guidelines for RF 3D
Package Module Design
Purpose The purpose of this document is to give an overview of design guidelines for LTCC (Low
Temperature Co-fired Ceramic) material set.
Scope This document covers assembly and substrate design guidelines for LTCC and substrates for use
with SMD, chip and wire, and flip chip assembly.
Process Overview The ceramic modules are built by first placing the chip components using an SMT line. After the
surface mount devices are mounted to the module, the final assembly is done on the ceramic
back-end manufacturing line. The ceramic back-end process capability includes:
-chip attach and underfill
arking
Depending on the module design, some or all of these process steps may be required. For many
features, both standard and advanced design rules are given. The standard rules are generally
applicable to designs using LTCC materials. The advanced design rules may not apply to all
types of materials and approval by Amkor product management is required before advanced
rules are used.
Material Properties The following table lists typical material properties for LTCC substrates
MATERIAL CTE THERMAL
CONDUCTIVITY
[ 10-6/K]
SPECIFIC
HEAT
YOUNG'S
MODULUS
[GPa]
SHRINKAGE
(X, Y)
SHRINKAGE
(Z)
Yamamula
GCS71EAS
5.3 2.2 17% 23%
Hereaus
51555W
5.2 TBD 17% 23%
MATERIAL BENDING
STRENGTH
[MPa]
DIELECTRIC
CONSTANT
@
1MHz,R.T.
DIELECTRIC
CONSTANT
@
10GHz,R.T.
DIELECTRIC
LOSS
@
1MHz,R.T.
DIELECTRIC
LOSS
@
10GHz,R.T.
VOLUME
RESISTIVITY
[Ohmm]
Yamamula
GCS71EAS
250 7.1 TBD <30 TBD
Hereaus
51555W
TBD 7.5 TBD <10 TBD
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The coefficient of the thermal change of dielectric constant for GCS series is approximately 50ppm.
The following table lists resistivity values for common conductor materials. Ag and PdAg are
typically used for conductor traces in LTCC substrates. Au is used in plating of the co-fired top
"D" Die Thickness <10 330 / 13 250 / 10 Down Bond Length + 100 300 / 12
"D" Die Thickness >100 - 200 380 / 15 250 / 10 Down Bond Length + 100 300 / 12
"D" Die Thickness >200 - 300 430 / 17 250 / 10 Down Bond Length + 100 300 / 12
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EMBEDDED COMPONENTS
A、Inductor Designs:Minimum space acceptable up to 100um
B、Layout Drawing Dimensions for Embedded Capacitors Capacitor plates, as large areas of conductors, are acceptable up to 5mm square. Adjacent capacitor
plates at maximum size, must be separated by a space equal to the size of the capacitor plate.
Maximum conductor coverage is 50% of substrate area.
Capacitors are processed using standard screen printing techniques and fired directly onto any layer
of the substrate.
They may also be buried within or on top of multilayer structures. Electrodes must be of the same
material.
Typical dielectric thickness is 40 um(minimum). Capacitor tolerance is typically ± 30%. Design
options are available to reduce tolerances.
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C、Layout Drawing Dimensions for Embedded Resistors Embedded resistors are available with fired tolerances of 30%, with good tracing to adjacent
resistors. The following table is a list of available materials for buried resistors.
Ink for Printing Ohms per Square
Level R 1 50 Ω
Level R 2 100 Ω
Level R 3 1K Ω
Level R 4 10K Ω
Level R 5 100K Ω
All Dimension
Unit : um / mil
LENGTH
MAXIMUM
LENGTH
Minimum
WIDTH
MAXIMUM
WIDTH
Minimum
Overlap
Minimum
10,000 / 400 200 / 8 10,000 / 400 200 / 8 100 / 4
Standard resistor materials are made from glasses and metal oxides of ruthenium metal. Sheet
resistivities are available from milliohms to gigaohms and can be combined on a single substrate.
Standard trim tolerances are 10% through 1%, and in some cases to 0.5%. Large numbers of
minimum size resistors on a substrate may limit the tolerance to 5% to 10% due to yield considerations.