LNA Lowers Noise, Raises OIP3 at 3.5 GHz

8/10/2019 LNA Lowers Noise, Raises OIP3 at 3.5 GHz

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LNA Lowers Noise,Raises OIP3 At 3.5GHz

The goal of this amplifier desig wasto maitai oise fig!re "elow # d$while a%hie&ig high gai ad aro"!st o!tp!t third'order iter%eptpoit for "ase'statio appli%atios at3.5 GHz.Jul 14, 2011(hi'Leog Lim| Microwavesand RF

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Low-noise amplifiers (LNAs)

improve the sensitivity of a receiver.

When designed for high intercept

point, they can also expand its

dynamic range. What follows is the

design of an LNA with su-!-d"

noise figure at #.$ %&' and #$ d"m

output third-order intercept point,

ased on a low-cost gallium arsenide

(%aAs) enhancement-mode

pseudomorphic high-electron-

moility-transistor (e&*+) monolithic-microwave-integrated-circuit (++)

process.

he sensitivity of a receiver practically hinges on the system noise figure (/),

ecause andwidth ("W) is predetermined y the parameters set forth in a

communications standard0!

1eceive sensitivity (d"m) 2

-!34 !5log "W (&') the minimum (!)

signal-to-noise ratio (d") /

An LNA, as its name implies, improves receiver sensitivity y reducing the system

noise figure. he /riss e6uation shows that the noise figure (/!) of the first receiver

1. The schematic diagram (a) and the circuit

layout (b) represent the cascade configuration

and the external components needed to

fabricate the 3.5-GH !"#.

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stage dominates and suse6uent stages (i.e. /7, /#) have progressively smaller

impact0

/ 2 /! (/7!)8%! (/#!)8%!%7 (7)

where %n2 the gain of the nth stage in the receive chain.

n a wireless system, a single antenna may e shared y oth the transmitter and

receiver through either a fre6uency-selective diplexer or an 1/ switch in fre6uency-

division-duplex (/99) time-division-duplex (99) operation, respectively.

Additionally, a andpass filter may e inserted efore the LNA to prevent loc:ing

or desensiti'ation y a strong out-of-and interferer. ;nfortunately, oth the

duplexer and the filter, eing passive components, have 1/ losses. As these losses

occur efore the LNA, they have a large impact on the overall receivesensitivity.7herefore, the duplexer

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n some receiver implementations, the gain stages following the LNA are ypassed

y 1/ switches when the incoming signals are strong. he change in the LNA load

match (%L) due to switching is propagated ac: to the input match (=!!) ecause the

device is non-unilateral (i.e., =!7> 5). "ecause the antenna and the input filter are

very termination-sensitive, they can e detuned y the =!!shift. =!!is less

susceptile to load changes when =!7approaches 'ero, as shown y0

(when =!75)

=ince the cascode reverse isolation is !8755 to !87555 that of the =, 4this is the

second reason for choosing the former topology. 9irect-conversion receivers,ecause of their sensitivity to local oscillator self-mixing, also stand to enefit from

the enhanced isolation of the cascade configuration.$

*ach /* in the cascode received one-half of the total supply voltage, ?dd. As a

result, the cascode configuration may have less gain and linearity than the =

configuration under low-voltage operation.@he e&*+ technology is ideal for a

cascode implementation since it can maintain gain and linearity even when ?dsis

reduced to 7 ?.3he cascode output is cascaded with a series resistive-capacitive

(1) networ: to improve the staility aove the operating fre6uency.

he ++ is faricated on a mature

and cost-effective 5.7$ m processthat

has a gain-andwidth product, f, of

over #5 %&'. "esides minimi'ing the

numer of stages re6uired to achieve

the target gain, the high falso

contriutes to a low noise

figure.BAdditionally, Cohnson noise

generated in the circuit interconnects is

minimi'ed y douling the metal

thic:ness compared to the previous

process amplifier iteration. he 5.@4 x 5.@4-mm chip fits inside an -pin, 7 x 7 x

5.3$-mm 6uad flat no-lead (D/N) plastic pac:age.

he internal ias regulator allows the LNA

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+F= families, and it may e possile to switch the LNA using $-? logic in 99

applications (switching off the LNA prevents metal migration due to gate current

increase during transmit.!5,!!he device threshold voltage (?), forward

transconductance (gm), and drain-source resistance, 19=(on) can vary across

temperature and etween wafers to adversely shift the operating point. &aving the

ias regulator and LNA on one chip staili'es the operating point, ecause ?"A=and

?%=voltages will GmirrorG each other to compensate for thermal drift!7and

gmvariations etween different wafer atches.

welve off-chip components were re6uired for matching, 1/ decoupling, and

iasing, as these functions were not feasile to integrate on the chip. apacitors #

and @ and inductor L! provide 1/ decoupling of the gate ias. he !-L# L-

networ: transforms active device =!! to H5as shown in /ig. 7.he input midand is

delierately offset from perfect match so that it can Gwrap aroundG the center of the

=mith chart for wider andwidth.!#he highpass topology rolls off low-fre6uency

(L/) content, and was chosen due to concern that rising gain elow the operating

fre6uency, f5, due to the @ d"8octave slope, may cause L/ instaility.

ontinue on age #

Page Title

he device output impedance, HF;, isalready close to $5 I at f5, so no

further matching was necessary.

apacitor 7 and inductor L7

function as a 9 loc: and cho:e,

respectively. hey also impart a

highpass characteristic to further

enhance the L/ staility. n the first

design iteration, a wire-wound 5457

inductor was used for L7, and this

resulted in a 1ollett staility factor

(:) of 5.B4 at the lowest fre6uency

point (!! %&'). When L7 was replaced with a multilayer 5457 inductor in a

suse6uent prototype, the lowest : marginally improved to !.7 at !5 %&' (see /ig.

B). t was hypothesi'ed that the multilayer inductor

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his precaution will ensure the inductors ehave predictaly at

#.$ %&'.

As the output and input pins are iased from the same voltage

supply (?dd), a portion of the output signals may detrimentallytravel ac: to the input y conduction along the shared 9

path. he phasor addition of output and input signals can

create gain ripple and even oscillation elow f5. o ward off

inadvertent output-input feedac: over the power supply,

decoupling capacitors # through @ shunt the A signals to ground. omining

small and large capacitances enale suppression over a roader fre6uency

spectrum.

9espite the input match

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he evaluation-oard printed-circuit

oard ("), which measures 7!.$ x

! mm, uses microstrip transmission

lines with a coplanar ground on !5-

mil-thic: 1F4#$5 laminate material

from 1ogers orporation. his mid-

priced sustrate has modest 1/

performance and is compatile with

/1-4 farication processing for ease

of producing multilayer

designs.!4=ince the thin 1F4#$5

" is too flexile on its own, an

additional !.7-mm-thic: /1-4 layeris glued to the 1F4#$5

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o facilitate the design of the matching circuitry, the ++

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worth noting that many manufacturer-supplied .s7p files are also fre6uency

limitede.g., most +urata chip capacitors are characteri'ed only to @ %&'.

he inductor model employed the typical D;Lvalues specified at the fre6uency

nearest to f5 as pulished in the data sheet (usually !.3 or !. %&' depending onmanufacturer) and then extrapolated to #.$ %&' and aove using a D proportional

to (f)5.$relationship. An inductor

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-!@ d", F1L 2-!7 d", and =F 2 -#7 d". he 1L minimum occurred aout #55

+&' this was a lower fre6uency than intended, ut no attempt was made to retune

the input match ecause the other re6uirements had already een met. "esides, it

would have re6uired L values of a finer granularity than the common *!7 to shift

the mid-and to exactly #.$ %&'. mmunity to matching components< tolerances

should e good, as the andwidth at the !5-d" 1L points was in excess of ! %&' for

oth input and output sides. he measured =F is aout !# d" etter than the

similar-si'e single e&*+.$9iscrepancies occurred etween simulated and

measured results, particularly for 1L. his is li:ely a limitation of the simple "

models and the passive devices used.

he noise figure was measured at slightly less than ! d" at #.$ %&' the minimum

was offset to # %&' due to the aforementioned input matching error. he minimum

noise figure is aout 5.! d" worse than the reference single &*+. +aximum gain

of !3.@ d" occurred at 7.@ %&', ut sufficient gain of !$.@ d" is still maintained at

the design fre6uency.

ontinue on age @

Page Title

he finished LNA was thoroughly

investigated for potential instailities,and the results are graphically

portrayed in/ig. . "eyond the

passand, the gain decreases

monotonically with minor inflection

points at !4 and ! %&'. roale

causes of the pea:s are component

resonances and input-output coupling,

ut as these pea:s are elow unity

gain, the ris: of cavity resonance in an

inopportunely-dimensioned metal

enclosure is small. he graph also

shows the 1ollett staility factor, : 2 (! O=!!=77-=!7=7!O7- O=!!O7- O=77O7)8 (7 O=!7=7!O)

and the staility measure, 9 2 O=!!=77-=!7=7!O oth of these were computed from

measured oard-level .s7p files. As measurements indicate : M ! and 9 75 oor

agreement etween the measured and simulated results aove !5 %&' is li:ely due

to model limitations.

7. These cures sho& gain , and stabilitymeasure ersus freuency.

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9ue to receiver component nonlinearities, adJacent-channel signals can create

third-order intermodulation distortion (+9#). he nonlinearity defined y the 7f!-

f7or 7f7-f!relationship is impossile to filter as they are very close to the desired

signal. A :ey measure of linearity, the third-order intercept point, F#, is defined

as the point where the fundamental signal power (fund) and the +9# power

theoretically intersect. n the linear region, F# can e calculated from the +9#

amplitude using *6. #0

F# 2 fund P+87 (#)

where P+ is the difference etween the fundamental and the intermodulation

product power in d".

wo input tones at #$55 and #$5! +&'were used to evaluate the +9 of this

design however, other fre6uency

spacings should not change the results

significantly. As shown in /ig. !5, in the

linear operating region enclosed y

input power (i) of less than -4 d"m,

the F# is 2#$ d"m this is aout !

d" worse than the single &*+, and

is remar:ale ecause ?9= is one-half

the value of the single &*+ in the

cascade configuration. he null, or

sweet spot, in the +9 at around -@

d"m input drive is indicative of lass

A" operation. he null was caused y

the small-signal +9 and large-signal

+9 eing out-of-phase at the onset of

saturation.7!

"loc:ing, which desensiti'es the receiver y lowering the gain and increasing the

noise figure,77can e caused y either a nonsynchronous interferer, such as a

powerful transmitter sharing the same tower, or y a synchronous source, such as

the transmission that lea:s past the circulator or duplexer in a transceiver with

simultaneous transmit and receive capaility.7#A component with a high gain-

compression threshold can therefore resist loc:ers more effectively.

/igure !5shows an output !-d" compression point (!d") of !B d"msimilar to the

reference single e&*+. 9espite the cascode

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otained ecause of less heat loss due to the low ul: conductivity of %aAs, as well

as the low :nee voltage (5.# ?) of the

e&*+ permitting a larger voltage

swing efore clipping.74ermitting

current dto follow the s6uare of the

1/ power (i.e., dproportional to o7)

li:e a lass A" power amplifier, also

contriutes to a higher !d"a 4-d"

improvement at 7.4 %&' has een

shown in a similar design.7$

n summary, a #.$-%&' LNA with

good noise figure, gain, and linearity

was designed around a low-cost, D/N-

pac:aged ++. ncorporation of ias

regulator, electrostatic-discharge

(*=9) protection, and staility networ: at the chip level reduces the external

component count to !7. A proprietary %aAs e&*+ process from Avago

echnologies enaled !$-d" single-stage gain without the usual performance

sacrifices, due to cascode transistors operating at one-half ?99.

Acknowledgments

he author would li:e to than: +.9. =uhai'a and =. unithevathi for circuit

assemly, .. Loh for proJect management, =.A. Asrul for reviewing the article,

and the management of Avago echnologies for approving the pulication of this

wor:.

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