lmh6611

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L M H 66 11, L M H 66 1

www.ti.com SNOSB00K NOVEMBER 2007 REVISED OCTOBER 2013

L M H 66 11 /L M H 66 12 S in g le S u p p ly 345 M H z R a il -to -R a il O uCheck for Samples: LMH6611 , LMH6612

1FEATURES DESCRIPTIONThe LMH6611 (single, with shutdown) and LMH661223 VS = 5V, R L = 1 k, T A = 25C and A V = +1,(dual) are 345 MHz rail-to-rail output amplifiersUnless Otherwise Specified.consuming just 3.2 mA of quiescent current per

Operating Voltage Range 2.7V to 11V channel and designed to deliver high performance in Supply Current Per Channel 3.2 mA power conscious single supply systems. The

LMH6611 and LMH6612 have precision trimmed Small Signal Bandwidth 345 MHzinput offset voltages with low noise and low distortion

Open Loop Gain 103 dB performance as required for high accuracy video, test Input Offset Voltage (Limit at 25C) 1.5 mV and measurement, and communication applications.

The LMH6611 and LMH6612 are members of the Slew Rate 460 V/sPowerWise family and have an exceptional power-to- 0.1 dB Bandwidth 45 MHz performance ratio.

Settling Time to 0.1% 67 nsWith a trimmed input offset voltage of 0.022 mV and

Settling Time to 0.01% 100 nsa high open loop gain of 103 dB the LMH6611 and SFDR (f = 100 kHz, A V = 2, VOUT = 2 VPP ) 102 LMH6612 meet the requirements of DC sensitive high

dBc speed applications such as low pass filtering inbaseband I and Q radio channels. These Low Voltage Noise 10 nV/ Hzspecifications combined with a 0.01% settling time of

Output current 100 mA 100 ns, a low noise of 10 nV/ Hz and better than 102 CMVR 0.2V to 3.8V dBc SFDR at 100 kHz make these amplifiers

particularly suited to driving 10, 12 and 14-bit high Rail-to-Rail Outputspeed ADCs. The 45 MHz 0.1 dB bandwidth (A V = 2) 40C to +125C Temperature Range driving 2 V PP into 150 allows the amplifiers to beused as output drivers in 1080i and 720p HDTV

APPLICATIONS applications. ADC Driver The input common mode range extends from 200 mV DAC Buffer below the negative supply rail up to 1.2V from the

positive rail. On a single 5V supply with a ground Active Filtersterminated 150 load the output swings to within 49

High Speed Sensor Amplifier mV of the ground, while a mid-rail terminated 1 k Current Sense Amplifier load will swing to 77 mV of either rail. 1080i and 720p Analog Video Amplifier STB, TV Video Amplifier Video Switching and Muxing

1

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2WEBENCH is a registered trademark of Texas Instruments.3 All other trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date. Copyright 20072013, Texas Instruments IncorporatedProducts conform to specifications per the terms of the TexasInstruments standard warranty. Production processing does not

necessarily include testing of all parameters.
http://www.ti.com/product/lmh6611?qgpn=lmh6611http://www.ti.com/product/lmh6612?qgpn=lmh6612http://www.ti.com/http://www.ti.com/product/lmh6611#sampleshttp://www.ti.com/product/lmh6612#sampleshttp://www.ti.com/product/lmh6612#sampleshttp://www.ti.com/product/lmh6611#sampleshttp://www.ti.com/http://www.ti.com/product/lmh6612?qgpn=lmh6612http://www.ti.com/product/lmh6611?qgpn=lmh6611

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LMH6611 ADC121S101

0.1 F 10 F0.1 F 10 F

0.1 F

V+

0.01 F R614.3 k

0.1 F1 F

GND

5V

R51.24 k

C21 nF

C5150 pF

R2549

V+

-

+

RL22

CL390 pF

R1549

IN1 F

V+

R714.3 k

5.6 F U1

L M H 66 11, L M H 66 12

SNOSB00K NOVEMBER 2007REVISED OCTOBER 2013 www.ti.com

DESCRIPTION (CONTINUED)The amplifiers will operate on a 2.7V to 11V single supply or 1.35V to 5.5V split supply. The LMH6611 singleis available in 6-Pin SOT and has an independent active low disable pin which reduces the supply current to 120A. The LMH6612 is available in 8-Pin SOIC. Both the LMH6611 and LMH6612 are available in 40C to+125C extended industrial temperature grade.

Typical Application

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foamduring storage or handling to prevent electrostatic damage to the MOS gates.

Absolute Maximum Ratings (1)(2)

For input pins only 2000VHuman Body Model

For all other pins 2000VESD Tolerance (3)

Machine Model 200V

Charge Device Model 1000VSupply Voltage (V S = V+ V

) 12V

Junction Temperature (4) 150C max

(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but specific performance is not ensured. For ensured specifications and the testconditions, see the Electrical Characteristics.

(2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability andspecifications.

(3) Human Body Model, applicable std. MIL-STD-883, Method 3015.7. Machine Model, applicable std. JESD22-A115-A (ESD MM std. of JEDEC)Field-Induced Charge-Device Model, applicable std. JESD22-C101-C (ESD FICDM std. of JEDEC).

(4) The maximum power dissipation is a function of T J(MAX) , JA . The maximum allowable power dissipation at any ambient temperature isP D = (TJ(MAX)) T A)/ JA . All numbers apply for packages soldered directly onto a PC Board.

Operating Ratings (1)

Supply Voltage (V S = V+ V) 2.7V to 11V Ambient Temperature Range (2) 40C to +125C

6-Pin SOT 231C/WPackage Thermal Resistance ( JA)

8-Pin SOIC 160C/W

(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but specific performance is not ensured. For ensured specifications and the testconditions, see the Electrical Characteristics.

(2) The maximum power dissipation is a function of T J(MAX) , JA . The maximum allowable power dissipation at any ambient temperature isP D = (TJ(MAX)) T A)/ JA . All numbers apply for packages soldered directly onto a PC Board.

2 Submit Documentation Feedback Copyright 20072013, Texas Instruments Incorporated

Product Folder Links: LMH6611 LMH6612
http://www.ti.com/product/lmh6611?qgpn=lmh6611http://www.ti.com/product/lmh6612?qgpn=lmh6612http://www.ti.com/http://www.go-dsp.com/forms/techdoc/doc_feedback.htm?litnum=SNOSB00K&partnum=LMH6611http://www.ti.com/product/lmh6611?qgpn=lmh6611http://www.ti.com/product/lmh6612?qgpn=lmh6612http://www.ti.com/product/lmh6612?qgpn=lmh6612http://www.ti.com/product/lmh6611?qgpn=lmh6611http://www.go-dsp.com/forms/techdoc/doc_feedback.htm?litnum=SNOSB00K&partnum=LMH6611http://www.ti.com/http://www.ti.com/product/lmh6612?qgpn=lmh6612http://www.ti.com/product/lmh6611?qgpn=lmh6611

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L M H 66 11, L M H 66 1


+3V Electrical CharacteristicsUnless otherwise specified, all limits are specified for T J = +25C, V + = 3V, V

= 0V, V S = V+ V, DISABLE = 3V, V CM = VO =

V+/2, AV = +1, R F = 0, when A V +1 then R F = 560 , RL = 1 k. Boldface limits apply at temperature extremes. (1)

Symbol Parameter Condition Min (2) Typ (3) Max (2) Units

Frequency Domain Response

SSBW 3 dB Bandwidth Small Signal A V = 1, R L = 1 k, VOUT = 0.2 V PP 305MHz AV = 2, 1, R L = 1 k, VOUT = 0.2 V PP 115

GBW Gain Bandwidth A V = 10, R F = 2 k, RG = 221 , RL = 1 k, 115 135(LMH6611) V OUT = 0.2 V PP

MHzGain Bandwidth A V = 10, R F = 2 k, RG = 221 , RL = 1 k, 130(LMH6612) V OUT = 0.2 V PP

LSBW 3 dB Bandwidth Large Signal A V = 1, R L = 1 k, VOUT = 1.5 V PP 90MHz

AV = 1, R L = 150 , VOUT = 2 VPP 85Peak Peaking A V = 1 1.0 dB

0.1 0.1 dB Bandwidth A V = 1, VOUT = 0.5 V PP , RL = 1 k 33dBBW AV = 2, VOUT = 0.5 V PP , RL = 1 k 65

RF = RG = 560 MHz AV = 2, VOUT = 1.5 V PP , RL = 150 , 47R

F = R

G = 510

DG Differential Gain A V = 2, 4.43 MHz, 0.6V < V OUT < 2V, 0.03 %RL = 150 to V+/2

DP Differential Phase A V = 2, 4.43 MHz, 0.6V < V OUT < 2V, 0.06 degRL = 150 to V+/2

Time Domain Response

tr /tf Rise & Fall Time 1.5V Step, A V = 1 2.8 ns

SR Slew Rate 2V Step, A V = 1 330 V/ sts_0.1 0.1% Settling Time 2V Step, A V = 1 74

nsts_0.01 0.01% Settling Time 2V Step, A V = 1 116Noise and Distortion Performance

SFDR Spurious Free Dynamic Range f C = 100 kHz, A V = 1, VOUT = 2 VPP 109f C = 1 MHz, A V = 1, VOUT = 2 VPP 97 dBcf C = 5 MHz, A V = 1, VOUT = 2 VPP 80

e n Input Voltage Noise f = 100 kHz 10 nV/ Hzin Input Current Noise f = 100 kHz 2 pA/ HzCT Crosstalk (LMH6612) f = 5 MHz, V IN = 2 VPP 71 dB

Input, DC Performance

VOS Input Offset Voltage (LMH6611) V CM = 0.5V 0.022 1.52

mVInput Offset Voltage (LMH6612) V CM = 0.5V 0.015 1.5

2

TCVOS Input Offset Voltage Average Drift See (4) 4 V/CIB Input Bias Current V CM = 0.5V 5.9 10.1 A11.1

IO Input Offset Current 0.01 0.5 A0.7C IN Input Capacitance 2.5 pF

R IN Input Resistance 6 M CMVR Input Voltage Range DC, CMRR 76 dB 0.2 1.8 V

(1) Boldface limits apply to temperature range of 40C to 125C(2) Limits are 100% production tested at 25C. Limits over the operating temperature range are ensured through correlations using the

Statistical Quality Control (SQC) method.(3) Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary

over time and will also depend on the application and configuration. The typical values are not tested and are not ensured on shippedproduction material.

(4) Voltage average drift is determined by dividing the change in V OS by temperature change.

Copyright 20072013, Texas Instruments Incorporated Submit Documentation Feedback 3


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L M H 66 11, L M H 66 12


+3V Electrical Characteristics (continued)Unless otherwise specified, all limits are specified for T J = +25C, V + = 3V, V


V+/2, AV = +1, R F = 0, when A V +1 then R F = 560 , RL = 1 k. Boldface limits apply at temperature extremes. (1)

Symbol Parameter Condition Min (2) Typ (3) Max (2) Units

CMRR Common Mode Rejection Ratio V CM Stepped from 0.1V to 1.7V 79 98 dB AOL Open Loop Gain R L = 1 k, VOUT = 2.7V to 0.3V 89 101

dBRL = 150 , VOUT = 2.5V to 0.5V 78 85Output DC Characteristics

VO Output Swing High (LMH6611) R L = 1 k to V+/2 59 72(Voltage from V + Supply Rail) 76

RL = 150 to V+/2 133 169182

Output Swing Low (LMH6611) R L = 1 k to V+/2 59 74(Voltage from V Supply Rail) 80

RL = 150 to V+/2 133 171188

RL = 150 to V 42 5256

mVOutput Swing High (LMH6612) R L = 1 k to V+/2 58 68(Voltage from V + Supply Rail) 73

RL = 150 to V+/2 131 157172


RL = 150 to V+/2 139 168187

RL = 150 to V 43 5156

IOUT Linear Output Current V OUT = V+/2 (5) 70 mA

RO Output Resistance f = 1 MHz 0.07 Enable Pin Operation

Enable High Voltage Threshold Enabled (6) 2.0 V

Enable Pin High Current V DISABLE = 3V 0.001 AEnable Low Voltage Threshold Disabled (6) 1.0 V

Enable Pin Low Current V DISABLE = 0V 0.8 A

ton Turn-On Time 18 ns

toff Turn-Off Time 50 ns

Power Supply Performance

PSRR Power Supply Rejection Ratio DC, V CM = 0.5V, V S = 2.7V to 11V 81 96 dB

IS Supply Current (LMH6611) R L = 3.0 3.43.8

mASupply Current (LMH6612) R L = 2.95 3.45(per channel) 3.9

ISD Disable Shutdown Current DISABLE = 0V 101 132 A(LMH6611)

(5) Do not short circuit the output. Continuous source or sink currents larger than the I OUT typical are not recommended as they maydamage the part.

(6) This parameter is ensured by design and/or characterization and is not tested in production.



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L M H 66 11, L M H 66 1


+5V Electrical CharacteristicsUnless otherwise specified, all limits are specified for T J = +25C, V + = 5V, V


V+/2, AV = +1, R F = 0, when A V +1 then R F = 560 , RL = 1 k. Boldface limits apply at temperature extremes.Symbol Parameter Condition Min Typ Max Units

(1) (2) (1)


SSBW 3 dB Bandwidth Small Signal A V = 1, R L = 1 k, VOUT = 0.2 V PP 345 MHz AV = 2, 1, R L = 1 k, VOUT = 0.2 V PP 112

GBW Gain Bandwidth (LMH6611) A V = 10, R F = 2 k, RG = 221 , RL = 1 k, 115 135VOUT = 0.2 V PP

MHzGain Bandwidth (LMH6612) A V = 10, R F = 2 k, RG = 221 , RL = 1 k, 130

VOUT = 0.2 V PPLSBW 3 dB Bandwidth Large Signal A V = 1, R L = 1 k, VOUT = 2 VPP 77

MHz AV = 2, R L = 150 , VOUT = 2 VPP 85

Peak Peaking A V = 1 0.3 dB


RF = RG = 680 MHz A

V = 2, V

OUT = 2 V

PP, R

L = 150 , 45

RF = RG = 665 DG Differential Gain A V = 2, 4.43 MHz, 0.6V < V OUT < 2V, 0.05 %

RL = 150 to V+/2DP Differential Phase A V = 2, 4.43 MHz, 0.6V < V OUT < 2V, 0.06 deg

RL = 150 to V+/2Time Domain Response

tr /tf Rise & Fall Time 2V Step, A V = 1 3.6 ns


nsts_0.01 0.01% Settling Time 2V Step, A V = 1 100Distortion and Noise Performance

SFDR Spurious Free Dynamic Range f C = 100 kHz, A V = 2, VOUT = 2 VPP 102

f C = 1 MHz, AV = 2, VOUT = 2 VPP 96 dBcf C = 5 MHz, AV = 2, VO = 2 VPP 82


Input, DC Performance



2

TCVOS Input Offset Voltage Average Drift See(3) 4 V/C

IB Input Bias Current V CM = 0.5V 6.3 10.1 A11.1IO Input Offset Current 0.01 0.5 A0.7C IN Input Capacitance 2.5 pF


(1) Limits are 100% production tested at 25C. Limits over the operating temperature range are ensured through correlations using theStatistical Quality Control (SQC) method.

(2) Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may varyover time and will also depend on the application and configuration. The typical values are not tested and are not ensured on shippedproduction material.




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L M H 66 11, L M H 66 12


+5V Electrical Characteristics (continued)Unless otherwise specified, all limits are specified for T J = +25C, V + = 5V, V


V+/2, AV = +1, R F = 0, when A V +1 then R F = 560 , RL = 1 k. Boldface limits apply at temperature extremes.Symbol Parameter Condition Min Typ Max Units

(1) (2) (1)

CMRR Common Mode Rejection Ratio V CM Stepped from 0.1V to 3.7V 81 98 dB

AOL Open Loop Gain R L = 1 k, VOUT = 4.6V to 0.4V 92 103 dBRL = 150 , VOUT = 4.4V to 0.6V 80 86

Output DC Characteristics

VO Output Swing High (LMH6611) R L = 1 k to V+/2 76 90(Voltage from V + Supply Rail) 93

RL =150 to V+/2 195 239256


RL =150 to V+/2 193 243265

RL = 150 to V 48 6064

mVOutput Swing High (LMH6612) R L = 1 k to V+/2 75 86(Voltage from V + Supply Rail) 91

RL =150 to V+/2 195 223241


RL =150 to V+/2 202 234261

RL = 150 to V 49 5864

IOUT Linear Output Current V OUT = V+/2 (4) 100 mA


Enable High Voltage Threshold Enabled(5)

3.0 VEnable Pin High Current V DISABLE = 5V 1.2 A

Enable Low Voltage Threshold Disabled (5) 2.0 V

Enable Pin Low Current V DISABLE = 0V 2.8 A




PSRR Power Supply Rejection Ratio DC, V CM = 0.5V, V S = 2.7V to 11V 81 96 dB

IS Supply Current (LMH6611) R L = 3.2 3.64.0

mASupply Current (LMH6612) R L = 3.2 3.7(per channel) 4.25

ISD

Disable Shutdown Current DISABLE = 0V 120 162 A(LMH6611)





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L M H 66 11, L M H 66 1


5V Electrical CharacteristicsUnless otherwise specified, all limits are specified for T J = +25C, V + = 5V, V

= 5V, V S = V+ V, DISABLE = 5V, V CM = VO= 0V, A V = +1, R F = 0, when A V +1 then R F = 560 , RL = 1 k. Boldface limits apply at temperature extremes.

Symbol Parameter Condition Min Typ Max Units(1) (2) (1)


SSBW 3 dB Bandwidth Small Signal A V = 1, R L = 1 k, VOUT = 0.2 V PP 365 MHz AV = 2, 1, R L = 1 k, VOUT = 0.2 V PP 110

GBW Gain Bandwidth (LMH6611) A V = 10, R F = 2 k, RG = 221 , RL = 1 k, 115 135VOUT = 0.2 V PP

MHzGain Bandwidth (LMH6612) A V = 10, R F = 2 k, RG = 221 , RL = 1 k, 130

VOUT = 0.2 V PPLSBW 3 dB Bandwidth Large Signal A V = 1, R L = 1 k, VOUT = 2 VPP 85

MHz AV = 2, R L = 150 , VOUT = 2 VPP 87

Peak Peaking A V = 1 0.01 dB


RF = RG = 750 MHz A

V = 2, V

OUT = 2 V

PP, R

L = 150 , 45

RF = RG = 680 DG Differential Gain A V = 2, 4.43 MHz, 0.6V < V OUT < 2V, 0.05 %

RL = 150 to V+/2DP Differential Phase A V = 2, 4.43 MHz, 0.6V < V OUT < 2V, 0.05 deg

RL = 150 to V+/2Time Domain Response

tr /tf Rise & Fall Time 2V Step, A V = 1 3.5 ns


nsts_0.01 0.01% Settling Time 2V Step, A V = 1 100Noise and Distortion Performance

SFDR Spurious Free Dynamic Range f C = 100 kHz, A V = 2, VOUT = 2 VPP 102

f C = 1 MHz, AV = 2, VOUT = 2 VPP 100 dBcf C = 5 MHz, AV = 2, VOUT = 2 VPP 81


Input DC Performance



2

TCVOS Input Offset Voltage Average Drift See(3) 4 V/C

IB Input Bias Current V CM = 4.5V 6.5 10.1 A11.1IO Input Offset Current 0.01 0.5 A0.7C IN Input Capacitance 2.5 pF


(1) Limits are 100% production tested at 25C. Limits over the operating temperature range are ensured through correlations using theStatistical Quality Control (SQC) method.

(2) Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may varyover time and will also depend on the application and configuration. The typical values are not tested and are not ensured on shippedproduction material.




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L M H 66 11, L M H 66 12


5V Electrical Characteristi cs (continued)Unless otherwise specified, all limits are specified for T J = +25C, V + = 5V, V

= 5V, V S = V+ V, DISABLE = 5V, V CM = VO= 0V, A V = +1, R F = 0, when A V +1 then R F = 560 , RL = 1 k. Boldface limits apply at temperature extremes.

Symbol Parameter Condition Min Typ Max Units(1) (2) (1)

CMRR Common Mode Rejection Ratio V CM Stepped from 5.1V to 3.7V 81 98 dB

AOL Open Loop Gain R L = 1 k, VOUT = +4.6V to 4.6V 96 103 dBRL = 150 , VOUT = +4.3V to 4.3V 80 87

Output DC Characteristics

VO Output Swing High (LMH6611) R L = 1 k to GND 107 125(Voltage from V + Supply Rail) 130

RL = 150 to GND 339 402433

Output Swing Low (LMH6611) R L = 1 k to GND 103 123(Voltage from V Supply Rail) 132

RL = 150 to GND 332 404445

RL = 150 to V 54 7074

mVOutput Swing High (LMH6612) R L = 1 k to GND 107 118(Voltage from V + Supply Rail) 125

RL = 150 to GND 340 375407

Output Swing Low (LMH6612) R L = 1 k to GND 108 120(Voltage from V Supply Rail) 135

RL = 150 to GND 348 389434

RL = 150 to V 56 6674

IOUT Linear Output Current V OUT = GND (4) 120 mA


Enable High Voltage Threshold Enabled(5)

0.5 VEnable Pin High Current V DISABLE = +5V 17.0 A

Enable Low Voltage Threshold Disabled (5) 0.5 VEnable Pin Low Current V DISABLE = 5V 18.6 A




PSRR Power Supply Rejection Ratio DC, V CM = 4.5V, V S = 2.7V to 11V 81 96 dBIS Supply Current (LMH6611) R L = 3.3 3.8

4.4mA

Supply Current (LMH6612) R L = 3.45 4.05(per channel) 4.85

ISD

Disable Shutdown Current DISABLE = 5V 160 212 A(LMH6611)





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OUT B

1

2

3

4 5

6

7

8OUT A

-IN A

+IN A

V-

V+

-IN B

+IN B

- +

+ -

A

B

VOUT

V -

+IN

V+

-IN

+ -

1

2

3

6

4

5 DISABLE

L M H 66 11, L M H 66 1


Connection Diagram

Figure 1. 6-Pin SOT Figure 2. 8-Pin SOICTop View Top View



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1 10 100 1000

FREQUENCY (MHz)

-18

-15

-12

-9

-6

-3

0

3

6

G

A I N

( d B )

V+

= +2.5V

V- = -2.5V

VOUT = 0.2V

RL = 150

CL = 6 pFA = +1

125C25C

-40C

1 10 100 1000

FREQUENCY (MHz)

-18

-15

-12

-9

-6

-3

0

3

6

9

G

A I N

( d B )

V+

= +2.5V

V- = -2.5V

VOUT = 0.2V

RL = 1 k

CL = 6 pFA = +1

125C

25C

-40C

1 10 100 1000FREQUENCY (MHz)

-21

-18

-15

-12

-9

-6

-3

0

3

N O R M A L I Z E D G A I N ( d B )

A = +2VOUT = 0.2V

RL = 150

RF = 560

3V 5V

10V


-15

-12

-9

-6

-3

0

3

G A I N

( d B )

A = +1VOUT = 0.2V

RL = 150

3V5V

10V

1 10 100 1000

FREQUENCY (MHz)

-21

-18

-15

-12

-9

-6

-3

0

3

G A I N

( d B )

A = +1VOUT = 0.2V

RL = 1 k

1.5V

2.5V5V


-18

-15

-12

-9

-6

-3

0

3


A = +2VOUT = 0.2V

RL = 1 k

1.5V

5V2.5V

L M H 66 11, L M H 66 12


Typical Performance Characteristics At TJ = 25C, A V = +1 (R F = 0), otherwise R F = 560 for AV +1, unless otherwise specified.

Cl osed Loop Frequency Response for Closed Loop Frequency Response for Various Supplies Various Supplies

Figure 3. Figure 4.

Cl osed Loop Frequency Response for Closed Loop Frequency Response for Various Supplies Various Supplies (Gain = +2)

Figure 5. Figure 6.

Closed Loop GainClosed Loop Gain vs.

vs. Frequency for Frequency for Various Temperatures Various Temperatures

Figure 7. Figure 8.



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1 10 100-1.0-0.9-0.8-0.7-0.6-0.5-0.4-0.3-0.2-0.10.00.10.20.30.40.50.60.70.80.91.0

N O

R M A L I Z E D G A I N ( d B

FREQUENCY (MHz)

5V, R F = R G = 750

2.5V, R F = R G = 680

1.5V, R F = R G = 560

A = +2VOUT = 0.5V

RL = 1 k

1 10 100-1.0

-0.8

0.0

0.3

G A I N

( d B )

0.20.1

-0.6

-0.7

-0.9

-0.4-0.3-0.2-0.1

FREQUENCY (MHz)

-0.5

A = -1VOUT = 2V

RL = 150

10V, R F = 750

5V, R F = 604

3V, R F = 560

1 10 100 1000

FREQUENCY (MHz)

-18

-15

-12

-9

-6

-3

0

3


2.5V, = A = +2

5V, A = +2

1.5V, A = -1

VOUT = 2V

RL = 150

1 10 100 1000-1.0-0.9-0.8-0.7-0.6-0.5-0.4-0.3-0.2-0.10.00.10.20.30.40.50.60.70.80.91.0

G A I N

( d B

FREQUENCY (MHz)

A = +1VOUT = 0.5V

RL = 1 k

1.5V2.5V

5V

1 10 100 1000

FREQUENCY (MHz)

-18

-15

-12

-9

-6

-3

0

3

G A I N

( d B )

1.5V, V OUT = 1.5V

A = +1RL = 1 k

2.5V, V OUT = 2V

5V, V OUT = 2V

1 10 100 1000

FREQUENCY (MHz)

-18

-15

-12

-9

-6

-3

0

3


V+

= +2.5V

V- = -2.5V

RL = 1 k

VOUT = 0.2V

A = 1

A = 2

A = 5

A = 10

L M H 66 11, L M H 66 1


Typical Performance Characteristics (continued) At TJ = 25C, A V = +1 (R F = 0), otherwise R F = 560 for AV +1, unless otherwise specified.

Closed Loop Gainvs .

Frequency for Various Gains Large Signal Frequency Response

Figure 9. Figure 10.

L arge Si gn al Fr eq uen cy Res po ns e 0.1 d B Gai n Fl at ness fo r Var io us Su pp li es


0.1 d B Gain Fl atnes s f or Var ious Supp li es 0.1 dB Gain Fl atnes s f or Var ious Supp li es




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0.1 50

FREQUENCY (MHz)

-120

-80

-40

0

D I S T O R T I O N ( d B c

)

101

-20

-60

-100-110

-90

-70

-50

-30

-10VOUT = 2 V PPRL = 1 kA = +1

HD2V

+ = +2.5V

V- = -2.5V

HD3V

+ = +2.5V

V- = -2.5V

HD3V

+ = +5V

V- = -5V

HD2V

+ = +5V

V- = -5V

0.1 50

FREQUENCY (MHz)

-120

-80

-40

0


)

101

-20

-60

-100-110

-90

-70

-50

-30

-10

HD2

HD3 RL = 1 k

RL = 150

V+

= +2.5V

V- = -2.5V

VOUT = 2 V PPA = +1

-12

-9

-6

-3

0

3

6

9

G A I N

( d B )

1 10 100 1000

FREQUENCY (MHz)

V+

= +2.5V

V- = -2.5V

A = +1VOUT = 0.2V

RL = 1 k

CL = 10 pF

CL = 7 pF

CL = 5.5 pF

CL = 3.3 pF

CL = 2 pF

-21

-18

-15

-12

-9

-6

-3

0

3

6

9

G A I N

( d B )

1 10 100 1000

FREQUENCY (MHz)

V+

= +2.5V

V- = -2.5V

AV = +1

VOUT = 0.1V

CL = 100 pF

RL = 1 k

RISO = 10

RISO = 20

RISO = 25

RISO = 30

1 10 100 1000

FREQUENCY MHz

-1.0

-0.8

0

0.3


0.2

0.1

-0.6-0.7

-0.9

-0.4

-0.3

-0.2-0.1

-0.5

3V, R F = 510 ,

VOUT = 1.5V

10V, R F = 680 ,

VOUT = 2V5V, R F = 665 ,

VOUT = 2V

A = +2

R L = 150

1 10 100 1000-1

-0.8

0

0.30.20.1

-0.6-0.7

-0.9

-0.4-0.3-0.2-0.1

-0.5

A = +1VOUT = 2V

RL = 150

5V

10V

3V

FREQUENCY (MHz)

G A I N

( d B )

L M H 66 11, L M H 66 12



0.1 dB Gain Flatness for Various Supplies 0.1 dB Gain Flatness for Various Supplies (Gain = +2)


Smal l Si gn al Fr equ en cy Res po ns e wi th Sm al l Si gn al Fr eq uen cy Res po ns e w it hVarious Capacitive Load Capacitive Load and Various R ISO


HD2 and HD3 HD2 and HD3vs. vs.

Frequency and Supply Voltage Frequency and Load



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120

1k 100k 10M 1G

FREQUENCY (Hz)

-40

0

60

G

A I N

( d B )

100M1M10k

100

80

40

20

-20

GAIN

PHASE

V+

= +2.5V

V- = -2.5V

RL = 1 k

120

-120

-60

30

90

60

0

-30

-90

P H A S E ( )

0 1 2 3 4 5-120

-110

-100

-90

-80

-70

-60

-50

-40

-30

-20


)

VOUT (VPP )

-10V

+ = +2.5V

V- = -2.5V

A = -1RL = 1 k

50 MHz

20 MHz

10 MHz

5 MHz2 MHz

1 MHz

0.1 50

FREQUENCY (MHz)

-120

-80

-40

0


)

101

-20

-60

-100-110

-90

-70

-50

-30

-10 V+

= +2.5V

V- = -2.5V

VOUT = 2 V PPRL = 1 k

RF = 560

G = +1, HD2

G = +2, HD2

G = +10, HD2

0.1 50

FREQUENCY (MHz)

-120

-80

-40

0


)

101

-20

-60

-100-110

-90

-70

-50

-30

-10 V+

= +2.5V

V- = -2.5V

VOUT = 2 V PPRL = 1 k

RF = 560

G = +1, HD3

G = +2, HD3

G = +10, HD3

0 1 2 3 4 5 6 7 8 9 10-110

-100

-90

-80

-70

-60

-50


)

INPUT COMMON MODE VOLTAGE

HD2

V+

= +2.5V

V- = -2.5V

HD3

V+

= +2.5V

V- = -2.5V

HD3

V+

= +5V

V- = -5V

HD2

V+

= +5V

V- = -5V

f = 1 MHz

0 1 2 3 4 5 6 7 8 9 10-110

-100

-90

-80

-70

-60

-50


)

INPUT COMMON MODE VOLTAGE

HD2

V+

= +2.5V

V- = -2.5V

HD3

V+

= +2.5V

V- = -2.5V

HD3

V+

= +5V

V- = -5V

HD2

V+

= +5V

V- = -5V

f = 5 MHz

L M H 66 11, L M H 66 1



HD2 and HD3 HD2 and HD3vs. vs.

Common Mode Voltage Common Mode Voltage


HD2 HD3vs. vs.

Frequency and Gain Frequency and Gain


HD2vs.

Open Loop Gain and Phase Output Swing




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0 0.5 1 1.5 2 2.5 3 3.5 4 4.50

10

20

30

40

50

60

70

80

90

S E T T L I N G

T I M E ( n s

)

OUTPUT SWING (V PP )

V+

= +2.5V

V- = -2.5V

AV = -1

RISING, 0.1%

FALLING, 0.1%

0 1 2 3 4 5-120-110

-100-90

-80-70

-60

-50

-40

-30

-20


)

VOUT (VPP )

-100

50 MHz

20 MHz

10 MHz5 MHz

2 MHz

1 MHz

V+

= +2.5V

V- = -2.5V

A = +2RL = 150

0 1 2 3 4 5-120

-110

-100

-90

-80

-70

-60

-50

-40

-30

-20


)

VOUT (VPP )

-10V

+ = +2.5V

V- = -2.5V

A = +2RL = 150

50 MHz

20 MHz

10 MHz 5 MHz

2 MHz

1 MHz

0 1 2 3 4 5-120

-110

-100

-90

-80

-70

-60

-50

-40

-30

-20


)

VOUT (VPP )

-10V

+ = +2.5V

V- = -2.5V

A = +2RL = 1 k

50 MHz

20 MHz

10 MHz

5 MHz

2 MHz

1 MHz

0 1 2 3 4 5-110

-100

-90

-80

-70

-60

-50

-40

-30

-20


)

VOUT (VPP )

-10V

+ = +2.5V

V- = -2.5V

A = -1RL = 1 k

50 MHz

20 MHz

10 MHz

5 MHz

2 MHz

1 MHz

0 1 2 3 4 5-120

-110

-100

-90

-80

-70

-60

-50

-40-30

-20


)

VOUT (VPP )

-10V

+ = +2.5V

V

-

= -2.5VA = +2RL = 1 k

50 MHz

20 MHz

10 MHz

5 MHz2 MHz

1 MHz

L M H 66 11, L M H 66 12



HD3 HD2vs. vs.

Output Swing Output Swing


HD2 HD3vs. vs.

Output Swing Output Swing


HD3 Settling Timevs. vs.

Output Swing Input Step Amplitude



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-0.5 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0-0.6

-0.5

-0.4

-0.3

-0.2

-0.1

0.0

0.1

V O S

( m V )

VCM (V)

125C

-40C

25C

VS = 5V

0 2 4 6 8 10 12

VS (V)

-0.5

-0.4

-0.3

-0.2

-0.1

0

0.1

0.2

V O

S ( m V )

-40C

25C

125C

V- = -0.5V

VS = V+

- V-

VCM = 0V

-2.5 - 2.0 - 1.5 - 1.0 - 0.5 0 0.5 1.0 1.5 2.0 2.5-6.0

-4.0

-2.0

0

2.0

4.0

6.0

V O S

( m V )

VOUT (V)

V+

= +2.5V

V- = -2.5V

RL = 1 k

125C

-40C 25C

-2.5 - 2.0 - 1.5 - 1.0 - 0.5 0 0.5 1.0 1.5 2.0 2.5-6.0

-4.0

-2.0

0

2.0

4.0

6.0

V O S

( m V )

VOUT (V)

V+

= +2.5V

V- = -2.5V

RL = 150

125C

-40C 25C

0 0.5 1 1.5 2 2.5 3 3.5 4 4.50

20

40

60

80

100

120

140

S E T T L I N G

T I M E ( n s

)

OUTPUT SWING (V PP )

FALLING, 0.01%

RISING, 0.01%

V+

= +2.5V

V- = -2.5V

AV = -1

10 1k 100k 10M

FREQUENCY (Hz)

1

10

100

1000

1M10k100

V O L T A G E N O I S E ( n V / H z )

1

10

100

1000

C U R R E N T N O I S E ( p A / H z )

VOLTAGE NOISE

CURRENT NOISE

V+

= +2.5V

V-

= -2.5V

L M H 66 11, L M H 66 1



Settling Time Input Noisevs. vs.

Input Step Amplitude Frequency


VOS VOSvs. vs.

VOUT VOUT


VOS VOSvs. vs.VCM VS




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2 3 4 5 6 7 8 9 10 11 12150

100

50

0

50

100

150

V O U T

( m V )

VS (V)

VOLTAGE V OUT IS

BELOW V+

SUPPLY

VOLTAGE V OUT IS

ABOVE V- SUPPLY

RL = 1 k toMID-RAIL

125C25C-40C

2 3 4 5 6 7 8 9 10 11 12500

400

300

200

100

0

100

200

300

400

500

V O U T

( m V )

VS (V)

VOLTAGE V OUT IS

BELOW V+

SUPPLY

VOLTAGE V OUT IS

ABOVE V- SUPPLY

RL = 150 to MID-RAIL

-40C 25C 125C

0 2 4 6 8 10 12-6.6

-6.4

-6.2

-6.0

-5.8

-5.6

-5.4

-5.2

-5.0

-4.8

-4.6

I B I A S

(

A )

VS (V)

V- = -0.5

VS = V+

- V-

VCM = 0V

25C125C

-40C

4.24.0

3.83.63.43.2

3.02.82.62.42.22.01.81.6

I S ( m A )

0 2 4 6 8 10 12

VS (V)

125C

25C

-40C

V- = -0.5

VS = V+

- V-

VCM = 0.5V

-150 -100 -50 0 50 100 150

IOUT (mA)

-1.2

-1.0

-0.8

-0.6

-0.4

-0.2

0

0.2

0.4

V O S

( m V )

V+

= +2.5V

V- = -2.5V

-40C

25C

125C

-1.0 -0.6 -0.2 0.2 0.6 1.0-0.8 -0.4 V os (mv) 0.4 0.8

0

.5

1.0

1.5

.0

.5

.

L M H 66 11, L M H 66 12



VOSvs .

IOUT VOS Distribution


IB ISvs. vs.VS VS


VOUT VOUTvs. vs.VS VS



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10 1k 100k 100M

FREQUENCY (Hz)

0

30

80

120

- P S R R

( d B )

10M100

110

100

60

50

10

1M10k

90

70

40

20

V+

= +2.5V

V- = -2.5V

V+

= +5V

V- = -5V V

+ = +1.5V

V- = -1.5V

VIN = 225 mV PPRF = 560

LMH6611

-

+

V O

0.1 F 1000 FR F

560

R G

560

0.1 F 1000 F

CABLE

0.1 F

50

+

1000 F

-

503

4 6

2

V IN

-

+

-+

1

V+

V-

10 100 1M 100M0

30

50

90

110

+ P S R R

( d B )

FREQUENCY (Hz)

1k 10k 100k 10M

10

20

40

60

70

100

80

V+

= +2.5V

V- = -2.5V

V+

= +5V

V- = -5V

V+

= +1.5V

V- = -1.5V

VIN = 225 mV PPR

F = 560

LMH6611

-

+

0.1 F 1000 F

V O

0.1 F 1000 F

CABLE

0.1 F

1000 F50

50

V IN

R F

560

R G

560

+ -

+

-

V+

V-

2 3 4 5 6 7 8 9 10 11 1270

65

60

55

50

45

40

35

30

25

20

V O U T

( m V )

VS (V)

VOLTAGE V OUT IS

ABOVE V- SUPPLY

V- = 0V

RL = 150 TO GND

125C

-40C

25C

0.0001 0.01 1 100

FREQUENCY (MHz)

0.001

1

100

O U T P U T I M P E D A N C E ( )

100.10.001

10

0.01

0.1

V+

= +2.5V

V- = -2.5V

L M H 66 11, L M H 66 1



VOUT Closed Loop Output Impedancevs. vs.VS Frequency A V = +1


+PSRRvs.

Circuit for Positive (+) PSRR Measurement Frequency


PSRRvs.

Circuit for Negative ( ) PSRR Measurement Frequency




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5 0 m

V / D I V

12.5 ns/DIV

V+

= +5V

V- = -5V

A = +1

V OUT = 0.2V

RL

= 1 k

5 0 m

V / D I V

12.5 ns/DIV

V+

= +1.5V

V- = -1.5V

A = -1

R F = 560

V OUT = 0.2V

R L = 1 k

5 0 m

V / D I V

12.5 ns/DIV

V+

= +1.5V

V- = -1.5V

A = +1

V OUT = 0.2V

R L = 1 k

5 0 m

V / D I V

12.5 ns/DIV

V+

= +2.5V

V- = -2.5V

A = +1

V OUT = 0.2V

R L = 1 k

100k 1M 10M 100MFREQUENCY (Hz)

-110

-100

-90

-80

-70

-60

-50

-40

C R O S S T A L K ( d B )

V+

= +2.5V

V

-

= -2.5VA = +1RL = 1 k

VOUT = 2 V PP

140

0.0001 0.01 1 100

FREQUENCY (MHz)

0

40

80

C M R R ( d B )

100.10.001

120

100

60

20

V+

= +2.5V

V

-

= -2.5V

L M H 66 11, L M H 66 12



CMRR Crosstalkvs. vs.

Frequency Frequency


Small Signal Step Response Small Signal Step Response






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5 0 m

V / D I V

12.5 ns/DIV

V+

= +5V

V- = -5V

A = +2

R F = 560

V OUT = 0.2V

R L = 150

5 0 0 m

V / D I V

12.5 ns/DIV

V+

= +2.5V

V- = -2.5V

A = +1

V OUT = 2V

R L = 1 k

5 0 m

V / D I V

12.5 ns/DIV

V+

= +1.5V

V- = -1.5V

A = +2

R F = 560

V OUT = 0.2V

R L = 150

5 0 m

V / D I V

12.5 ns/DIV

V+

= +2.5V

V- = -2.5V

A = +2

R F = 560

V OUT = 0.2V

R L = 150

5 0 m

V / D I V

12.5 ns/DIV

V+

= +2.5V

V- = -2.5V

A = -1

R F = 560

V OUT = 0.2V

R L = 1 k

5 0 m

V / D I V

12.5 ns/DIV

V + = +5VV - = -5VA = -1

R F = 560

V OUT = 0.2V

R L = 1 k

L M H 66 11, L M H 66 1







Small Signal Step Response Large Signal Step Response




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-2.5-2.0-1.5 -1.0-0.5 0 0.5 1.0 1.5 2.0 2.50

500

1000

1500

2000

2500

3000

3500

4000

I S (

A )

VDISABLE (V)

V+

= +2.5V

V- = -2.5V

125C

-40C

25C

5 0 0 m

V / D I V

12.5 ns/DIV

V+

= +2.5V

V- = -2.5V

A = +2

R F = 560

V OUT = 2V

R L = 150

1 V / D I V

25 ns/DIV

V OUT

V IN

V+

= +5V

V- = -5V

A V = +5

R F = 604

R L = 1 k

L M H 66 11, L M H 66 12



Large Signal Step Response Overload Recovery Response


ISvs.

VDISABLE

Figure 65.



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2 V / D I V

25 ns/DIV

V OUT

V IN

V+

= +2.5V

V- = -2.5V

A V = +1

R F = 560

R L = 1 k

L M H 66 11, L M H 66 1


APPLICATION INFORMATION

The LMH6611 and LMH6612 are based on proprietary VIP10 dielectrically isolated bipolar process. This devicefamily architecture features the following: Complimentary bipolar devices with exceptionally high f t ( 8 GHz) even under low supply voltage (2.7V) and

low bias current.

Common emitter push-push output stage. This architecture allows the output to reach within millivolts of either supply rail. Consistent performance with little variation from any supply voltage (2.7V - 11V) for the most important

specifications (BW, SR, I OUT , for example.) Significant power saving compared to competitive devices on the market with similar performance.

With 3V supplies and a common mode input voltage range that extends beyond either supply rail, the LMH6611is well suited to many low voltage/low power applications. Even with 3V supplies, the 3 dB BW (at A V = +1) istypically 305 MHz.

The LMH6611 and LMH6612 are designed to avoid output phase reversal. With input overdrive, the output iskept near the supply rail (or as close to it as mandated by the closed loop gain setting and the input voltage).Figure 66 shows the input and output voltage when the input voltage significantly exceeds the supply voltages.

Figure 66. Input and Output Shown with CMVR Exceeded

If the input voltage range is exceeded by more than a diode drop beyond either rail, the internal ESD protectiondiodes will start to conduct. The current flow in these ESD diodes should be externally limited.

SHUTDOWN CAPABILITY AND TURN ON/OFF BEHAVIOR

The LMH6611 can be shutdown by connecting the DISABLE pin to a voltage 0.5V below the supply midpointwhich will reduce the supply current to typically 120 A. The DISABLE pin is active low and can be connectedthrough a resistor to V + or left floating for normal operation. Shutdown is specified when the DISABLE pin is 0.5Vbelow the supply midpoint at any operating supply voltage and temperature. Typical turn on time is 20 ns and theturn off time is 60 ns.

In the shutdown mode, essentially all internal device biasing is turned off in order to minimize supply current flow

and the output goes into high impedance mode. During shutdown, the input stage has an equivalent circuit asshown in Figure 67 .



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1 10 100 1000

FREQUENCY (MHz)

-6

-3

0

3


RF = R G = 665

RF = R G = 1000

V+

= +2.5V

V- = -2.5V

VOUT = 0.2V

RL = 1 k

D1

D2D3

D4

NON-INVERTINGINPUT

INVERTINGINPUT

R S

50

L M H 66 11, L M H 66 12


Figure 67. Input Equivalent Circuit During Shutdown

When the LMH6611 is shutdown, there may be current flow through the internal diodes shown, caused by input

potential, if present. This current may flow through the external feedback resistor and result in an apparent outputsignal. In most shutdown applications the presence of this output is inconsequential. However, if the output isforced by another device, the other device will need to conduct the current described in order to maintain theoutput potential.

To keep the output at or near ground during shutdown when there is no other device to hold the output low, aswitch using a transistor can be used to shunt the output to ground.

SELECTION OF R F AND EFFECT ON STABILITY AND PEAKING

The peaking of the LMH6611 depends on the value of the R F. From the graph shown in Figure 68 , as the R Fvalue increases, the peaking increases.

For A V = 2, at R F = 1 k, the 3 dB bandwidth is 113 MHz and peaking is about 0.6 dB whereas at R F = 665 ,the 3 dB bandwidth is about 110 MHz and peaking is 0 dB. R F and the input capacitance form a pole in the

amplifiers response. If the time constant is too big, it will cause peaking and ringing.Except for A V = 1 when R F should be 0 , across all other gain settings it is recommended that R F remainbetween 500 and 1 k to ensure optimum performance.

Figure 68. Closed Loop Gain vs. Frequency and R F = RG


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L M H 66 11, L M H 66 1


RF = RG f 3 dB (MHz) Peaking (dB)

665 110 0

1000 113 0.6

MINIMIZING NOISE

With a low input voltage noise of 10 nV/ Hz and an input current noise of 2 pA Hz the LMH6611 and LMH6612are suitable for high accuracy applications. Still being able to reduce the frequency band of operation of thevarious noise sources (that is, op amp noise voltage, resistor thermal noise, input noise current) can further improve the noise performance of a system. In a non-inverting amplifier configuration inserting a capacitor, C G, inseries with the gain setting resistor, R G, will reduce the gain of the circuit below frequency, f = 1/2 RGCG. Thiscan be set to reduce the contribution of noise from the 1/f region. Alternatively applying a feedback capacitor, C F,in parallel with the feedback resistor, R F, will introduce a pole into your system at f = 1/2 RFCF and create a lowpass filter. This filter can be set to reduce high frequency noise and harmonics. Finally remember to keep resistor values as small as possible for a given application in order to reduce resistor thermal noise.

POWER SUPPLY BYPASS

Since the LMH6611 and LMH6612 are wide bandwidth amplifiers, proper power supply bypassing is critical for optimum performance. Improper power supply bypassing can result in large overshoot, ringing or oscillation. 0.1

F capacitors should be connected from the supply pins, V+

and V

, to ground, as close to the device as ispractical. Additionally, a 10 F electrolytic capacitor should be connected from both supply pins to groundreasonably close to the device. Finally, near the device a 0.1 F ceramic capacitor between the supplies willprovide the best harmonic distortion performance.

INTERFACING HIGH PERFORMANCE OP AMPS WITH ADCs

These amplifiers are designed for ease of use in a wide range of applications requiring high speed, low supplycurrent, low noise, and the ability to drive complex ADC and video loads.

The source that drives the modern high resolution analog-to-digital converters (ADCs) sees a high frequency ACload and a DC load of a few hundred ohms or more. Thus, a high performance op amp with high inputimpedance of a few mega ohms and low output impedance would be an ideal choice as an input ADC driver.The LMH6611/LMH6612 have the low output impedance of 0.07 at f = 1 MHz. The ADC driver acts as a buffer and a low pass filter to reduce the overall system noise. To utilize the full dynamic range of the ADC, the ADC

input has to be driven to full scale input voltage. As signals travel through the traces of a printed circuit board (PCB) and long cables, system noise accumulatesin the signals and a differential ADC rejects any signals noise that appears as a common mode voltage. Thereare a couple of advantages to using differential signals rather than single-ended signals. First, differential signalsdouble the dynamic range of the ADC and second, they offer better harmonic distortion performance. There areseveral ways to produce differential signals from a dual op amp configuration. One method is to utilize the single-ended to differential conversion technique and the other is the differential to differential conversion technique.The first method requires a single input source and the second method requires differential input source.

A real world input source can have non-ideal impedance thus the buffer amplifier, with very low outputimpedance, is required to drive the input of the ADC. To minimize the droop in the input voltage, external shuntcapacitance (C L) should be about ten times larger than the internal input capacitance of the ADC and externalseries resistance (R L) should be large enough to maintain the phase delay at the output of the op amp andhence maintain the stability (See Figure 69 ). Most applications benefit from the inclusion of a series isolationresistor connected between the op amp output and ADC input. This series resistor helps to limit the outputcurrent of the op amp. The value chosen for this series resistor is very important, as a higher value will increasethe load impedance seen by the op amp and improve the total harmonic distortion (THD) performance of the opamp; however, the ADC prefers a low impedance source driving it. Thus, the optimum value for this seriesresistor must be found so that it will offer the best performance in terms of THD, SNR and SFDR of the combinedop amp and ADC.



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=R 2

GAIN -R 1

=1

2x

1

R 2 x R 5 x C 2 x C 5

0

SINAD = 20 * LOG + 101010

THD10

-SNR

L M H 66 11, L M H 66 12


Important Specifications of Op Amp and ADC

When interfacing an ADC with an op amp it is imperative to understand the specifications that are important toget the expected performance results. Modern ADC AC specifications such as THD, SNR, settling time andSFDR are critical for filtering, test and measurement, video and reconstruction applications. The highperformance op amps settling time, THD, and noise performance must be better than that of the ADC it is drivingto maintain the proper system accuracy with minimal or no error.

Some system applications require low THD, low SFDR and wide dynamic range (SNR), whereas some systemapplications require high SNR and they may sacrifice THD and SFDR to focus on the noise performance.

Noise is a very important specification for both the op amp and the ADC. There are three main sources of noisethat contribute to the overall performance of the ADC: Quantization noise, noise generated by the ADC itself (particularly at higher frequencies) and the noise generated by the application circuit. The impedance of the inputsource affects the noise performance of the op amp. Theoretically, an ADCs signal to noise ratio (SNR) can befound from the equation:

SNR (in dB) = 6.02*N+1.72 (1)

where N is the resolution of the ADC. For example, according to this equation a 12-bit ADC has an SNR of 74dB. However, the practical SNR number would be about 72 dB. In order to achieve better SNR, the ADC driver noise should be as small as possible. The LMH6611/LMH6612 have the low voltage noise of only 10 nV/ Hz.The combined settling time of the op amp and the ADC must be within 1 LSB. The 0.01% settling time of theLMH6611/LMH6612 is 100 ns.

The ADC drivers THD should be inherently lower than that of the ADC. The LMH6611/LMH6612 have an SFDRof 96 dBc at 2 V PP output and 1 MHz input frequency.

Signal to Noise and Distortion (SINAD) is a parameter which is the combination of the SNR and THDspecifications. SINAD is defined as the RMS value of the output signal to the RMS value of all of the other spectral components below half the clock frequency, including harmonics but excluding DC. It can be calculatedfrom SNR and THD according to the equation:

(2)

Because SINAD compares all undesired frequency components with the input frequency, it is an overall measureof an ADCs dynamic performance. The following sections will discuss the three different ADC driver architectures in detail.

SINGLE TO SINGLE ADC DRIVER

This architecture has a single-ended input source connected to the input of the op amp and the single-endedoutput of the op amp is then fed to the single-ended input of the ADC. The low noise of only 10 nV/ Hz and awide bandwidth of 345 MHz make the LMH6611 an excellent choice for driving the 12-bit ADC121S101 500KSPS to 1 MSPS ADC, which has a successive approximation architecture with internal sample and holdcircuits. Figure 67 shows the schematic of the LMH6611 in a 2nd order multiple-feedback with gain of 1(inverting) configuration, driving an ADC121S101. The inverting configuration is preferred over the non-invertingconfiguration, as it offers more linear output response. Table 1 shows the performance data of the LMH6611combined with the ADC121S101. The ADC drivers cutoff frequency of 500 kHz is found from the equation:

(3)The op amps gain is set by the equation:

(4)



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LMH6611 ADC121S101

0.1 F 10 F0.1 F 10 F

0.1 F

V+

0.01 F R614.3 k

0.1 F1 F

GND

5V

R51.24 k

C21 nF

C5150 pF

R2549

V+

-

+

RL22

CL390 pF

R1549

IN

1 F

V+

R714.3 k

5.6 FU1

L M H 66 11, L M H 66 1


Figure 69. Single to Single ADC Driver

Table 1. Performance of the L MH6611 Combined with the ADC121S101

Amp li fier SINAD SNR THD SFDR ENOB NotesOutput/ADC Input (dB) (dB) (dB) (dBc)

4 70.2 71.6 75.7 77.6 11.4 ADC121S101 @ f = 200 kHz

When the op amp and the ADC are using the same supply, it is important that both devices are well bypassed. A0.1 F ceramic capacitor and a 10 F tantalum capacitor should be located as close as possible to each supplypin. A sample layout is shown in Figure 70 . The 0.1 F capacitors (C13 and C6) and the 10 F capacitors (C11and C5) are located very close to the supply pins of the LMH6611 and the ADC121S101.

The following are recommendations for the design of PCB layout in order to obtain the optimum high frequencyperformance:

Place ADC and amplifier as close together as possible. Put the supply bypassing capacitors as close as possible to the device (

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ADC121S625

0.1 F 10 F

V+

33

V+

560220 pF

560

-

+

0.1 F 10 F

V+

V+

560

560 33

560

220 pF

560

INPUT

10 F

-

+LM H6612

LMH6612

0.1 F 10 F

V+

U1

U2

L M H 66 11, L M H 66 12


Figure 70. LMH6611 and A DC121S101 Layout

SINGLE-ENDED TO DIFFERENTIAL ADC DRIVER

The single-ended to differential ADC driver in Figure 68 utilizes an LMH6612 dual op amp to buffer a single-ended source to drive an ADC with differential inputs. One of the op amps is configured as a unity gain buffer that drives the inverting (IN ) input of the op amp U2 and non-inverting (IN+) input of the ADC121S625. U2inverts the input signal and drives the inverting input of the ADC121S625. The ADC driver is configured for again of +2 to reduce the noise without sacrificing THD performance. The common mode voltage of 2.5V is set upat the non-inverting inputs of both op amps U1 and U2. This configuration produces differential 2.5 V PP outputsignals, when the single-ended input signal of 0 to V REF is AC coupled into the non-inverting terminal of the opamp and each non-inverting terminal of the op amp is biased at the mid-scale of 2.5V. The two output RC anti-aliasing filters are used between both the outputs of U1 and U2 and the input of the ADC121S625 to minimizethe effect of undesired high frequency noise coming from the input source. Each RC filter has the cutoff frequency of approximately 22 MHz.

Figure 71. Single-Ended to Differential ADC Driver


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LMH6612

0.1 F 10 F

0.1 F

V+

1.24 k

1 nF

150 pF

549

V+

-

+

22

390 pF

14.3 k

5.6 F

14.3 k

1 F 549

ADC121S705

0.1 F 10 F

V+

LMH6612

0.1 F 10 F

0.1 F

V+

1.24 k

1 nF

150 pF

549

V+

-

+

14.3 k

5.6 F

14.3 k

1 F 549 22

390 pF

+IN

-IN

L M H 66 11, L M H 66 1


The performance of the LMH6612 with the ADC121S625 is shown in Table 2 .



2.5 68.8 69 81.5 75.1 11.2 ADC121S625 @ f = 20 kHz

DIFFERENTIAL TO DIFFERENTIAL ADC DRIVER

The LMH6612 dual op amp can be configured as a differential to differential ADC driver to buffer a differentialsource to a differential input ADC as shown in Figure 72 . The differential to differential ADC driver can be formedusing two single to single ADC drivers. Each output from these drivers goes to a separate input of the differential ADC. Here, each single to single ADC driver uses the same components and is configured for a gain of -1(inverting).

Figure 72. Differential to Differential ADC Driver

The following table summarizes the performance of the LMH6612 combined with the ADC121S625 at twodifferent frequencies. In order to utilize the full dynamic range of the ADC, the maximum input of 2.5 V PP isapplied to the ADC input. Figure 73 shows the FFT plot of the LMH6612 and ADC121S625 combination tested atf = 20 kHz input frequency.



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L M H 66 11, L M H 66 12




2.5 72.2 72.3 87.7 92.1 11.7 ADC121S625 @ f = 20 kHz2.5 72.2 72.2 87.8 90.8 11.7 ADC121S625 @ f = 200 kHz

Figure 73. The FFT Plot of Differential to Differential ADC Driver



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+

-

V IN

R 1

R G R F

V OUTLMH6611

R 2

V+

V+

L M H 66 11, L M H 66 1


DC LEVEL SHIFTING

Often a signal must be both amplified and level shifted while using a single supply for the op amp. The circuit inFigure 74 can do both of these tasks. The procedure for specifying the resistor values is as follows.1. Determine the input voltage.2. Calculate the input voltage midpoint, V INMID = VINMIN + (VINMAX VINMIN)/2.

3. Determine the output voltage needed.4. Calculate the output voltage midpoint, V OUTMID = VOUTMIN + (VOUTMAX VOUTMIN )/2.5. Calculate the gain needed, gain = (V OUTMAX VOUTMIN )/(V INMAX VINMIN)6. Calculate the amount the voltage needs to be shifted from input to output, VOUT = VOUTMID gain x V INMID.7. Set the supply voltage to be used.8. Calculate the noise gain, noise gain = gain + VOUT /VS .9. Set R F.10. Calculate R 1, R1 = RF/gain.11. Calculate R 2, R2 = RF/(noise gain-gain).12. Calculate R G, RG= RF/(noise gain 1).

Check that both the V IN and V OUT are within the voltage ranges of the LMH6611.

Figure 74. DC Level Shifting

The following example is for a V IN of 0V to 1V with a V OUT of 2V to 4V.1. VIN = 0V to 1V2. VINMID = 0V + (1V 0V)/2 = 0.5V3. VOUT = 2V to 4V4. VOUTMID = 2V + (4V 2V)/2 = 3V5. Gain = (4V 2V)/(1V 0V) = 26. VOUT = 3V 2 x 0.5V = 27. For the example the supply voltage will be +5V.

8. Noise gain = 2 + 2/5V = 2.49. R F = 2 k10. R 1 = 2 k/2 = 1 k11. R 2 = 2 k/(2.4-2) = 5 k 12. R G = 2 k/(2.4 1) = 1.43 k



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+

-

LMH6611

1 k

51

51

0.1

0A to 1A

1 k

+5V

0.1 F 1 F

0.1 F 1 F

820 pF

1.02 k

62 pF

1.02 k

V+

-

+

V-

510

OUTPUT

0.1 F 1 F

0.1 F 1 F

330 pF

1.05 k

150 pF

V+

-

+

523

V-

INPUT

1.05 k

LMH6612

LMH6612

L M H 66 11, L M H 66 12


4 th ORDER MULTIPLE FEEDBACK LOW-PASS FILTER

Figure 75 shows the LMH6612 used as the amplifier in a multiple feedback low pass filter. This filter is set up tohave a gain of +1 and a 3 dB point of 1 MHz. Values can be determined by using the WEBENCH Active Filter Designer found at www.ti.com/amplifiers

Figure 75. 4 th Order Multiple Feedback Low-Pass Filter

CURRENT SENSE AMPLIFIER AND OPTIMIZING ACCURACY IN PRECESION APPLICATIONS

With its rail-to-rail output capability, low V OS , and low I B the LMH6611 is an ideal choice for a current senseamplifier application. Figure 76 shows the schematic of the LMH6611 set up in a low-side sense configurationwhich provides a conversion gain of 2V/A. Voltage error due to V OS can be calculated to be V OS x (1 + RF/RG) or 1.5 mV x 21 = 31.5 mV. Voltage error due to I O is IO x RF or 0.5 A x 1 k = 0.5 m

lmh6611

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