Literature survey presentation

A SURVEY ON EXPLORING MEMORY OPTIMIZATIONS IN

SMARTPHONES

-KARTHIKEYAN RAMKUMAR

ABSTRACT

• Exploring the applicability of the memory optimizations explored for computer systems, in smartphone

hardware.

• Memory technologies include Mobile RAM (M-RAM), Power Aware Virtual Memory (PAVM),

Dynamic RAM (DRAM) and On-demand mechanisms such as Immediate Power Down (IPD)

mechanism and Immediate Self Refresh (ISR) mechanism.

• Newly emerging technologies such as Phase Change Memory (PCM) and a hybrid PCM-M RAM

approach.

INTRODUCTION

• Additional features and improved user experience, provided by fast processors, copious memory,

resource demanding software, and power-hungry hardware makes energy a precious resource.

• With hardware continuously improving in performance and price, vendors are able to build systems

with higher-performance and higher power components trying to meet users’ ever increasing demands

and compete for customers.

• This results in systems that are over-provisioned with components that provide more capacity and as a

result, it is becoming more difficult to maintain long battery life in these devices.  

• While a smartphone contains many energy hungry components, such as CPU, display, and multiple

radios, energy consumed by memory subsystem has been given limited consideration.

• Therefore, we explore the efficiency of the existing energy management mechanisms on smartphones.

1. DYNAMIC RAM (DRAM)

• Dynamic random-access memory (DRAM) is a type of random-access memory that stores each bit of

data in a separate capacitor within an integrated circuit.

• As applications are becoming increasingly data-centric, we expect main memory to remain as a

significant energy consumer because achieving good overall system performance will be more likely to

depend on having higher-performance and larger-capacity DRAM.

• We use the terminology of the Double-Data Rate (DDR) memory simply because DDR is becoming

the most common type of memory used in today's PC and server systems. This approach is not limited

to only DDR but this technique can also be applied to other memory types, e.g., SDR and RDRAM.

1.1 MEMORY TRAFFIC RESHAPING

• Make memory access less random and more controllable.

• Use a 4-rank system and this creates small and medium sized idle periods.

• The concepts of hot and cold ranks are introduced.

• As Self Refresh can be more utilized, more valuable opportunities are created in cold ranks.

1.1 MEMORY TRAFFIC RESHAPING

In the experiments conducted, the average

interarrival time was elongated by almost 2

orders of magnitude on cold ranks.

An example showing that if memory traffic is left unshaped, power management cannot take full advantage of deeper power-saving states since most idle periods are too short.

1.2 EFFECT OF RESHAPING ON MEMORY TRAFFIC

• Compared the results of migrating 1%, 5%, and 10% of pages.

• Migrating 1 % of pages gives limited benefits in power reduction, migrating 10% of pages does not

give any additional energy benefit beyond migrating 5%.

• Therefore, migrating 5% of pages gives the best result.

1.2 EFFECT OF RESHAPING ON MEMORY TRAFFIC

• As we can see from the Figure, migrating 1% as

opposed to 5% of pages does not give much

benefit in reducing performance penalty.

• To solve the problem at its root, it calls for an

alternative main memory design, where we

should use high-performance, highly parallel

memory on hot ranks and low-performance low-

power memory on cold ranks.

• Results shows that a 35.63-38.87% additional

energy can be saved by complementing existing

power management techniques with this

technique.

Effects of actively reshaping memory traffic by migrating 1%, 5%, and 10% of pages for the low memory intensive workload (above) and high memory-intensive workload (below).

2. PHASE CHANGE MEMORY (PCM)

• It is a type of non-volatile random access memory.

• For a DRAM alternative, we must architect PCM.

• We examine the following:

Buffer Organization

Partial Writes.

2.1 BUFFER ORGANIZATION

• We examine PCM buffer organizations that satisfy DRAM imposed area constraints.

• PCM buffer reorganizations reduce application execution time and memory energy, relative to

DRAM-based systems.

Evaluation:

On optimizing average delay and energy across the workloads, we find four 512B-wide buffers most

effective. Although each PCM array write requires 43.1x more energy than a DRAM array write,

these energy costs are mitigated by narrow buffer widths and additional rows, which reduce the

granularity of buffer evictions and expose opportunities for write coalescing, respectively.

2.2 PARTIAL WRITES

• Partial write are utilized.

• We expect write coalescing and partial writes to deliver a memory module average lifetime of 5.6

years.

• Scaling improves PCM endurance.

Evaluation:

• In a baseline architecture with a single 2048B-wide buffer, average module lifetime is approximately

525 hours.

• For our memory intensive workloads, we observe 32.8 percent memory bus utilization.

• On average, the four 512B-wide buffers coalesce 38.9 percent of writes emerging from the memory

bus, which is 47.0 percent utilized.

PHASE CHANGE MEMORY (PCM)

• Collectively, these results indicate PCM is a viable DRAM alternative.

• It consumes more energy to perform I/O operations, particularly write operations.

• PCM consumes significantly less idle power than M-RAM.

• Therefore, we should leverage the tradeoffs between performance and energy efficiency to apply PCM

technology in mobile devices.

3. CHARACTERIZING MOBILE SOFTWARE

• Compared to the CPU speed, human interactions are extremely slow.

• Prior study has shown that human perception threshold is between 50ms and 100ms.

• Completing task execution earlier than the perception threshold is meaningless.

• The majority of tasks are very short as more than 90% of all tasks complete within 10ms.

• 95% of all tasks are shorter than 50ms, indicating that these tasks can be extended to the 50ms perception threshold deadline without any performance penalty.

• Similarly, for the remaining 5% of long tasks, any additional extension less than 50ms will not be noticed by the user, avoiding performance degradation.

3. CHARACTERIZING MOBILE SOFTWARE

The applications selected for this survey are shown in the table

This table lists 12 popular Android applications selected from the Android market along with their trace statistics. A T-Mobile G1 smartphone is used to collect the application traces. Each trace consists of task intervals with the task execution length and the number of memory I/Os

4. MECHANISM COMPARISON

• We will evaluate the effectiveness of various energy management mechanisms on M-RAM and PCM

under the same execution environment.

• For this survey, a simulator that models the system configuration of a T-Mobile G1 smartphone is used

• The memory subsystem consists of a memory controller and three 64MB ranks (192MB totally), for

either M-RAM or PCM. The simulator feeds with the traces and conducts task execution under the

current CPU and memory state. The memory controller conducts memory I/O operations, and executes

power state transitions for each rank based on the energy management mechanism

System Configuration of a T-Mobile G1

4.1 POWER AWARE VIRTUAL MEMORY (PAVM)

• Powering down the memory devices during the idle period can help in reducing the energy

consumption.

• Power-Aware Virtual Memory (PAVM) is a simple and efficient way to provide energy management

Memory energy consumption with a standard system (ON) and the PAVM mechanism. The left two bars for each application show the energy of M-RAM and PCM in standard system, while the right two bars show the energy for the PAVM mechanism.

5. ON-DEMAND MECHANISMS

• Despite PAVM’s benefits to the standard system, it fails to address the energy efficiency of the active

rank accessed during the process execution.

• Immediate Power Down (IPD) mechanism and Immediate Self Refresh (ISR) mechanism have been

proposed for RAM

• As soon as an I/O request arrives at the memory controller, the rank to be accessed is transitioned to

the PRE state, and transitioned back to a low-power immediately after the I/O completes.

5. ON-DEMAND MECHANISMS

• The two on-demand mechanisms outperform the PAVM mechanism on PCM.

• PCM’s inferior I/O efficiency cannot offset its energy savings from idle periods, except for lightly

loaded applications Amazon, Music and Twidroid.

• The PCM OFF mechanism completely eliminates the active idle energy, resulting in 44% energy

reduction over the PAVM mechanism on PCM.

• Compared to the IPD and ISR mechanisms on M-RAM, the PCM OFF mechanism offers 18% and

22% energy savings respectively.

Memory energy consumption for on-demand mechanisms normalized to the PAVM

mechanism on M-RAM

5. ON-DEMAND MECHANISMS

The distribution of extended tasks that expose delays for on-demand

mechanisms

• IPD mechanism achieves the best performance with negligible delays exposed. • The ISR and PCM OFF mechanisms, on the other hand, incur more evident degradation due to the

141.5ns long transition latency.• PCM technology with on-demand mechanism surpasses the traditional MRAM when memory energy is

the only concern.• However, when performance is considered, M-RAM still has the chance to beat PCM.• We therefore need an approach to balance energy and performance more efficiently than any standalone

memory technology.

6. HYBRID MEMORY ARCHITECTURE

• A hybrid memory consisting of M-RAM and PCM can improve both the energy efficiency and

performance.

• When an application is invoked and its image does not reside in M-RAM, it is loaded into M-RAM

either from secondary storage or PCM, and the corresponding process identifier is put at the head of

the LRU list.

• When an application is closed, its memory image will stay in M-RAM until it is swapped out.

• The hybrid approach achieves the best energy efficiency.

CONCLUSIONS

• This paper presents a survey of several memory optimization mechanisms that were originally

proposed for desktops and servers, on a mobile system.

• The mechanisms include improving energy efficiency by making the DRAM less randomly accessed,

architecting the novel PCM as a scalable DRAM alternative and, designing and implementing PAVM

in smartphones.

• The PAVM mechanism saves more than 90% energy as compared to the standard system with no

energy management.

• Additional energy savings are provided by the on-demand mechanisms.

• The energy efficiency can be improved further by a hybrid approach.

THANK YOU