LIC-manual.pdf

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LINEAR INTEGRATED CIRCUITS LABORATORY

MANUAL.

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S.NO. EXPERIMENT NAME

1. Inverting and Non inverting Amplifiers, Voltage Follower and differential amplifier

2. Differentiator and Integrator

3. Instrumentation amplifier

4. Active lowpass, bandpass and highpass filter

5. Astable and monostable multivibrators and Schmitt trigger using IC 741

6. Phase shift and Wein bridge oscillator using op amp

7. Astable and monostable multivibrators and Schmitt trigger using NE 555

8. PLL characteristics and its use as a frequency multiplier

9. DC Supply using LM 317 and LM 723

10. Study of SMPS

11. Simulation of experiments 3,4,5,6 and 7 using Pspice netlists

PIN DIAGRAM:

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Non-Inverting i/p

VOLTAGE FOLLOWER:

-12V

+12V

-

4

7

-

+

3

741

2

Vi

VO

6

Non-invert i/p

Inverting i/p

Offset Null

Offset Null

V+

V-

Output

NC

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INVERTING AMPLIFIER

NON -INVERTING AMPLIFIER

Rf

10kΩ

-12V

Ri

+12V

-

4

7

+

-

3 741

2

5kΩ Vi

V

O

6

5kΩ

Vi

+12V

2

7

+

-

741

RI

Rf

10kΩ

4 3

VO

6

-12V

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SUMMER:

+

-

7

+12V

3

-

+

Rf

10kΩ

V1=(0-32)V DC

2

10kΩ

-12V

4

R1

741

6

R2

10kΩ

V2=(0-32)V DC

VO(0-25)V DC v

Rf| | R1

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DIFFERENTIAL AMPLIFIER (DIFFERENCE AMPLIFIER)

7

+12V

3

+

-

Rf

10kΩ

V1

-

2

-

V2

10kΩ

-12V

4

Ri

741

6

-

10kΩ||10kΩ

-

VO 10kΩ

-

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DIFFERENTIATOR

Rf =15kΩ

R1 =10kΩ 2 6

+

C1

0.022µf 3

-15V

741

-

4

Vin

(500HZ)

+15V 7

15kΩ

Vo

Cf = 0.01µf

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INTEGRATOR

Vo

+15V

-15V

0.1µf

Vin

(1KHZ)

1.6k

3

6

1.6k

7

+

-

47k

4

2

741

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MODEL GRAPH

INVERTING AMPLIFIER

Vin

T

T

Vo

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MODEL GRAPH

NON INVERTING AMPLIFIER

Vin

T

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EX.NO:1. BASIC OPAMP CIRCUITS

AIM:

To design Voltage Follower,inverting, non-inverting ,Summer,differential

amplifier, Differentiator and Integrator using operational amplifier 741 and test the operation.

APPARATUS REQUIRED:

S.NO COMPONENTS RANGE QUANTITY

1 IC741 1

2 Function Generator 3MHZ 2

3 CRO 30MHZ 1

4 Dual Power Supply ±12V 1

5 Resistors

10KΩ,

15K

1.6KΩ,

47KΩ

3

1

2

1

6 Capacitors 0.1μf, 0.01 μf EACH ONE

Vo

T

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THEORY:

VOLTAGE FOLLOWER:

This circuit gives the input as output without amplification.It is used as buffer. Vo = Vin.

INVERTING AMPLIFIER:

It is the most widely used of all the op-amp circuits. The output

voltage Vo is fed back to the inverting input terminal through the Rf – R1 network where Rf is the feedback resistor. Input signal Vi is applied to the inverting input terminal

through R1 and non-inverting terminal of op-amp is grounded. The gain of the inverting amplifier is given by, ACL = Vo / Vi = - Rf / R1

The negative sign indicates a phase shift of 180o between Vi and Vo. The value of R1 should be kept large to avoid loading effect.

NON-INVERTING AMPLIFIER:

If the signal is applied to the non-inverting input terminal and

feedback is given to the inverting input terminal, the circuit amplifies without inverting the input signal. Such a circuit is called non-inverting amplifier. It is also a negative feedback system as output is being fed back to the inverting input terminal. The gain of

the non-inverting amplifier is given by, ACL = Vo / Vi = 1+ Rf / R1

The gain can be adjusted to unity (or) more, by proper selection of resistors Rf and R1. Compared to inverting amplifier, the input resistance of the non-inverting amplifier is extremely large as the op-amp draws negligible current

from the signal source.

SUMMER: An inverting Summing Amplifier amplifies the linear summation of input signals.

I=V1/R1+V2/R2 ……. VN/RN Vo = - RF I = - ( (RF /R1) V1+(RF /R2) V2……. (RF /RN) VN) . The Op-amp in non-linear inverting mode can be used to produce an output that is linear combination of inputs without sign change.

DIFFERENTIAL(DIFFERENCE) AMPLIFIER:

A circuit that amplifies the difference between two signals is called a differential amplifier. This type of the amplifier is very useful in instrumentation

circuits. The output voltage of the differential amplifier is given by, Vo = R2 / R1 (V1 – V2)

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Such a circuit is very useful in detecting very small differences in

signals, since the gain R2 / R1 can be chosen to be very large. DIFFERENTIATOR:

As the name suggests, the circuit performs the mathematical operation of differentiation. That is the output waveform is the derivation of input waveform. The gain

of the differentiator increases with increase in frequency, which makes the circuit unstable. The output voltage is expressed as, Vo = -RfC1(dVi/dt).

The op-amp differentiator is useful for signal wave shaping. The op-amp circuits that contain capacitor is the differentiating amplifier (or) differentiator. A

practical differentiator eliminates the problem of stability and high frequency noise. For good differentiation, one must ensure that the time period T of the input signal is larger than (or) equal to RfC1, that is,

T ≥ RfC1. The expression of the output voltage remains same as in the case of an ideal differentiator.

INTEGRATOR:

The op-amp integrator is useful for signal wave shaping. If we interchange the resistor and capacitor of the differentiator, we have the circuit of an integrator. A simple RC circuit can also work as an integrator when time constant is very large. This requires

very large values of R and C. The components R and C cannot be made infinitely large because of practical limitations. Thus integrator circuit does not have any high frequency

problem unlike a differentiator circuit. However, at low frequencies such as at dc, the gain becomes infinite.

The op-amp saturates, i.e., the capacitor is fully charged and it behaves like an open circuit. The gain of an integrator at low frequency can be limited to avoid the

saturation problem if the feedback capacitor is shunted by a resistance Rf. The parallel combination of Rf and Cf behaves like a practical capacitor which dissipates power unlike an ideal capacitor For this reason, this circuit is also called a lossy integrator. The resistor

Rf limits the low frequency gain to Rf/R1 and thus provides dc stabilization. The output voltage is expressed as,

Vo(t) = -1/R1Cf ∫Vi(t) dt + Vo(0). Vo = -1/R1Cf ∫Vi dt. Where Vo(0) is the initial output voltage. Thus the output is -1/R1Cf times the

integral of input and R1Cf is the time constant of the integrator.

PROCEDURE:

(i) The circuit connections are given as per the circuit diagram. (ii) The power supply is switched ON.

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(iii) The amplitude and time period of the input and output waveforms are

noted from CRO. (iv) The graph is plotted for the values which will be taken from the CRO.

RESULT:

Thus Basic Op-amp Circuits like the Voltage Follower, inverting, non-inverting ,Summer, differential amplifier, Differentiator and Integrator using operational

amplifier 741 were designed and tested.

DESIGN PROCEDURE:

INVERTING AMPLIFIER:

Vo / Vi = - Rf / Ri Gain =(Vo / Vi ) = -2 Put Ri = 5KΩ

-2 = -Rf /5 Rf = 10KΩ.

NON-INVERTING AMPLIFIER:

Vo / Vi = 1+Rf / Ri

Gain (Vo / Vi ) = 3 , for Ri = 5KΩ. 3= 1+Rf / 5K

Rf = 10KΩ. SUMMER:

Assume R1= R2 = RF =10K

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Vo = - ( (RF /R1) V1+(RF /R2) V2

= - (V1+V2) Volts

DIFFERENTIAL AMPLIFIER:

Vo = R2 / R1 ( V1 – V2 ) Put R2 = 100KΩ , R1 = 10KΩ.

DIFFERENTIATOR:

For differentiator f1 =1 / 2π RfC1 Assume f 1= 500 HZ, C1 = 0.022μf, Rf = / 2πf1C1 = / 2π ×500x0.022×10-6

Rf = 15KΩ. Let f2 =2 f 1 = 1KHz

= 1/2π R1C1 ; R1 =1/2π f2 C1 = 1/(2x π x 1K x0.022μ) = 10K ; R1C1 = RfCf;

Cf = R1C1 / Rf

= 10K x 0.022 μ / 15K = 0.01 μf

INTEGRATOR:

For integrator T = 2πR1C1.

Assume f = 1KHZ, C1 = 0.1μf. T = 1 / f = 1ms.

R1 = T / 2πfC1 = 1×10-3 / 2π ×0.1×10-6. R1 = 1.6KΩ.

MODEL GRAPH:

Input signal

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Differentiator

Integrator

Observation:

Voltage Follower:

T

Vin

T T

T

VO

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Vin= ---------------millivolts; Vo=--------------- millivolts at ---------- HZ.

Inverting amplifier: Vi= mV

S.No. Rf (KΩ) Ri (KΩ) Theoretical gain= -(Rf / Ri)Vin Practical gain= Vo / Vi

Non-Inverting amplifier: Vi= mV

S.No. Rf (KΩ) Ri (KΩ) Theoretical gain=(1+Rf / Ri)Vin Practical gain= Vo / Vi

Summer:

S.No.

V1(V)

V2(V)

Output Voltage (V)

Theoretical=-(V1 + V2) Practical

Difference amplifier:

S.No.

V1(V)

V2(V)

Output Voltage (V)

Theoretical= R2 / R1 ( V1 – V2) Practical

ZERO CROSSING DETECTOR

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SCHMITT TRIGGER:

DESIGN:

VUT = -VLT =R2 Vsat / (R1 + R2) = 10k/60k *15 = 2.5 V

-15V

R1 = 50k

+

-

-

741

R2 =10k

3

Vin > 2V

4

VO

+15V

2 7

6

+15V

-15V

741 2 -

+

7

Vin

VO 4

6 3

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MODEL GRAPH:

ZERO CROSSING DETECTOR

SCHMITT TRIGGER:

V V

T

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Vin

T

VUT

VLT

VO

T

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EX.NO:7 SCHMITT TRIGGER, ZERO CROSSING DETECTOR

AIM:

To design an Schmitt trigger, zero crossing detector and astable multivibrator using IC741 and test its output waveforms.

APPARATUS REQUIRED:


1 IC741 1


3 CRO 30MHZ 1


5 Resistors 50KΩ, 10KΩ Each one

THEORY:

SCHMITT TRIGGER:

The Schmitt Trigger is also known as Regenerative Comparator. If positive feedback is added to the comparator circuit, gain can be increased greatly. The transfer

curve of comparator becomes more close to ideal curve. Theoretically, if the loop gain –βAOL is adjusted to unity, then the gain with feedback, AVf becomes infinite. This result in an abrupt transition between the extreme values of output voltage. In practical circuits,

it may not be possible to maintain loop-gain exactly equal to unity for a long time because of supply voltage and temperature variations. So a value greater than unity is

chosen. This also gives an output waveform virtually discontinuous at the comparison voltage. This circuit exhibits a phenomenon called hysteresis (or) backlash. As long as input voltage is less than upper threshold voltage VUT, output voltage

remains constant at +Vsat. For Vi > VUT ; VO= -Vsat. As long as input voltage is greater than lower threshold voltage VUT, output voltage

remains constant at -Vsat. For Vi >VLT ; VO= +Vsat.

ZERO CROSSING DETECTOR:

The basic comparators can be used as a zero crossing detector provided

that Vref is set to zero. The zero crossing detector has two types, they are inverting zero crossing detector and non-inverting zero crossing detector. The inverting zero crossing detector provides a square wave output for a sine wave input. The circuit is also called a

sine to square wave generator. For input voltage greater than 0V, output voltage is -Vsat; for input voltages lesser than

0V the output voltage is +Vsat.

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PROCEDURE:

(i) The circuit connections are given as per the circuit diagram.

(ii) Switch ON the power supply. (iii) The output voltage waveforms are observed using the CRO. (iv) Plot the graph for the values which will be obtained from the CRO.

RESULT:

Thus the Schmitt trigger and zero crossing detector were designed and tested using IC741.

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ASTABLE MULTIVIBRATOR:

DESIGN PROCEDURE:

T = 2 RC ln((1+β) / (1-β));

β =R2/ (R1+ R2)

= 100K/150K =0.67 Let f=3 KHz

T=1/f =0.32mS.

0.32 =2*R*0.01µ ln5; R= 10KΩ

6

4

-

-15V

7

2

VO 741

R=10k

R2=100k

+15V

+

V+ V-

C=0.01µf

R1= 50k

3

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ASTABLE MULTIVIBRATOR USING IC 741

DESIGN:

T = RC ln [1+(VD/Vsat)/(1-β)]

β= R2/(R1+R2)=10K/(10K+10K)=0.5 T=10K*0.01μ* 0.692 =0.692 *10-4

f=1/T =14.4K

741

- - - +

-

-

10k

3

VO

800

10k

7

+15V

4

2

IN 4001 IN 4001

-

6

0.01mf

Trigger input

-15V

0.01mf

-

10K

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MODEL GRAPH ASTABLE MULTI VIBRATOR:

VO

T

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MONOSTABLE MULTIVIBRATOR:

Ex.No.3 ASTABLE MULTIVIBRATOR & MONOSTABLE MULTIVIBRATOR

USING IC 741

AIM:

To design an astable multivibrator and monostable multivibrator using IC741 and

test its output waveforms APPARATUS REQUIRED:


1 IC741 1

3 CRO 30MHZ 1


5 Resistors

50KΩ, 100KΩ

1.5KΩ, 800Ω,

10KΩ.

Each one

Each two


T

Vsat

βVsat

V0

T

Capacitor

wave form VD

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7 Capacitors 0.1μf, 0.01μf Each one

8 Diode IN4001 2

THEORY:

ASTABLE MULTIVIBRATOR

Astable Multivibrator is an electronic circuit which generates square wave of its own without any external triggering pulse. It is also called a free running oscillator, the

principle of generation of square wave output is to force an op-amp to operate in the saturation region. In fraction β = R2 / (R1 + R2) of the output is feedback to the non-

inverting input terminal. Thus the reference voltage Vref is βVo and may take values as +βVsat (or) –βVsat. The output is also feedback to the inverting input terminal after integrating by means of low pass RC combination. Whenever input at the inverting input

terminal just exceeds Vref, switching takes place resulting in a square wave output. In astable multivibrator, both the states are quasi stable.

MONOSTABLE MULTIVIBRATOR

Monostable multivibrator has one stable state and the other is quasi stable state.

The circuit is useful for generating single output pulse of adjustable time duration in response to a triggering signal. The width of the output pulse depends only on external

components connected to the op-amp. The monostable circuit is nothing but the modified form of the astable multivibrator. A diode D1 clamps the capacitor voltage to 0.7V when the output is at +Vsat. A negative going pulse signal of magnitude V1 passing through the

differentiator R4C4 and diode D2 produces a negative going triggering impulse and is applied to the non-inverting input terminal. This circuit can be modified to achieve

voltage to time delay conversion as in the case of square wave generator. The monstable multivibrator circuit is also referred to as time delay circuit as it generates a fast transition at a predetermined time T after the application of input trigger. It is also called a gating

circuit as it generates a rectangular waveform at a definite time and thus could be used to gate parts of a system.

PROCEDURE:

(i) The circuit connections are given as per the circuit diagram. (ii) Switch ON the power supply.

(iii) The output voltage (Vo) waveforms are observed using the CRO. (iv) Plot the graph for the values which will be obtained from the CRO.

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RESULT:

Thus the astable and monostable multivibrator was designed and tested using

IC 741. It is observed that

Astable multivibrator: Design Frequency = 3 KHz;

Observed Frequency = Hz;

monostable multivibrator:

Designed Time period = .0692 mS; Observed Time period = S;

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RC PHASE SHIFT OSCILLATOR USING OP-AMP

DESIGN PROCEDURE:

For op-amp type μA741, choose frequency less than 1 KHZ.

Let C = 0.1μf and fo = 200 HZ. Using the formula, fo = 0.065 / RC.

We get, R = 0.065 / (200 ×10-7) = 3.25 KΩ So use R = 3.3 KΩ.

To prevent the loading of the amplifier, because of RC networks, it is necessary that R1 ≥ 10R.

Hence R1 = 103 × 3.3 × 10 = 33 KΩ.

33K

CRO

3

6

-

3.3K

3.3K

3.3K

IM

+

-

0.1mf

C2

0.1mf

+15V

4

0.1mf

C1

2

741

-15V

-

3.3K

7

-

C3

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WEIN BRIDGE OSCILLATOR

DESIGN PROCEDURE:

For the Wein bridge oscillator the frequency Fr = 5.03 KHz and T = 0.2ms. Fr = 1 / (2πRC). Let C = 0.01μf

R = 1 / ((2πFrC). = 1 / ((2π × 5.03 × 103 ×0.01 × 10-6). =3.16 K

T = 1 / F. = 1 / (5000Hz) = 0.2 × 10-3 s

Av = -Rf /R1 ≥ 3

Let Rf = 6K R1 = Rf /3 = 2K

2K

3.3K

3.3k

7

+

- V-

741

5.6k

0.01

μf

-15V

6

+15V

0.01μf

6k

3

2

4

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MODEL GRAPH:

TABULATION:

AMPLITUDE(v) TIME PERIOD (ms) FREQUENCY(KHz) RC Phase Shift Oscillator:

Wein Bridge Oscillator:

T

V0

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EX.NO: RC PHASE SHIFT OSCILLATOR & WEIN BRIDGE

OSCILLATOR

AIM:

To design and test an RC phase shift oscillator and Wein Bridge using

operational amplifier 741.

APPARATUS REQUIRED:


1 IC741 1

2 CRO 30MHZ 1


4

Resistors

3.3 KΩ

10KΩ,, 5.6KΩ,

4.7KΩ.

5

Each one

5 Capacitors

0.1μf

0.01μf

3

2

RC PHASE SHIFT OSCILLATOR:

THEORY:

A phase shift oscillator, which consists of an op-amp as the amplifying stage

and three RC cascaded networks as the feedback circuit that provides feedback voltage from the output back to the input of the amplifier. The op-amp is used in the inverting mode. Therefore, any signal that appears at the inverting terminal is shifted by 180o phase

shift required for oscillation. Thus the total phase shift around the loop is 360o. The frequency of oscillation fo if this phase shift oscillator is given by

f = 1 / (2π√(6) RC). f = 0.065 / RC. At this frequency, the gain AV must be atleast 29. That is

Rf / R1= 29. (or) Rf = 29R1.

Rf = 29 × 33 × 103 = 957 KΩ. Use Rf = 1 MΩ potentiometer.

WEIN BRIDGE OSCILLATOR

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THEORY:

A commonly used frequency oscillator is a wein bridge oscillator. In this circuit the feedback signal is connected to the non-inverting input terminal so that the op-amp is working as a non-inverting amplifier. Therefore, the feedback network need

not provide any phase shift. The circuit can be viewed as a wein bridge with a series RC network in one arm and a parallel RC network in the adjoining arm. Resistors R1 and Rf

are connected in the remaining two arms. The condition of zero phase shift around the circuit is achieved by balancing the bridge. The wein bridge are the most commonly used sine wave oscillators for audio frequencies. The frequency of oscillation depends upon

RC components.

PROCEDURE:


(ii) Switch ON the power supply and measure the amplitude and time period of the output waveform using the CRO.

(iii) Calculate the frequency of oscillation using the time period and compare this value of frequency with the theoretical frequency fo. (iv) Plot the output waveform in graph.

RESULT:

Thus the RC Phase Shift Oscillator and Wein bridge oscillator was designed and tested for the given frequency.

RC Phase Shift Oscillator: The theoretical frequency = HZ

Observed Frequency= HZ. Wein bridge oscillator:

The theoretical frequency = HZ Observed Frequency= HZ

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ACTIVE BANDPASS FILTER

ACTIVE BAND PASS FILTER:

Band pass filter consists of UPF and LPF sections.

For LPF fH = 2KHZ fH = 1 / 2πR1C1 Let C1 = 0.01μf gives

R1 = 7.9 KΩ. For UPF fL = 400 HZ.

fL = 1 / 2 πR2C2. Let C2 = 0.01μf gives R2 = 39.8 KΩ.

Again fo = √(fHfL). = √(2000 × 400)

fo = 894.4 HZ.

+15

V

0.1m

f

2 7

C1

4

+15

V

-

V

o

-

+

-

V

+ V-

6 -

-

1.6

k

-

0.1m

f

1.6

k

- - 6

47

k

-

15V

8

k V

O

V

O

7

V

o

Vi

n

V

O

2

3 74

1 4

-

74

1

-

47

k

1.6

k

-

15V C

1

47

k

+

-

V

+ V-

3

-

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Q = fo / BW.

= fo / (fH - fL). = 894.4 / (2000 – 400) Q = 0.56.

ACTIVE LOW PASS FILTER (Butterworth)

DESIGN PROCEDURE:

ACTIVE LOW PASS FILTER(II Order Butterworth Filter)

For low pass filter fH = 1 / 2πfc. Assume fH = 1KHZ.

C = 0.1μf. R = 1 / 2πfLc.

3

5.86k

7

10k

VO

6

0.1µf

-15V

2

-

1.6k

Vin

(100Hz -

10KHz)

4

+15V

741

+

1.6k

0.1µf

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R = 1 / (2π ×1×103×0.1×10-6)

R = 1.6KΩ. For Butterworth Filter α = 1.414 A0 = 3- α = 3-1.414 =1.568

(1+Rf/R1 ) = 1.586 Let Rf = 5.86K R1 = 10K;

MODEL GRAPH ACTIVE LOW PASS (Butterworth)

Pass band

3db

Gain

in dB

fh =1KHz

Freq in Hz

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ACTIVE BAND

PASS

TABULATION:


Vin= volts

S.NO

FREQUENCY

( Hz)

OUTPUT VOLTAGE

( Volts)

GAIN IN dB

20 log Vo / Vin

fh

Gain in

db

3db

Freq in Hz fl

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ACTIVE LOW PASS FILTER:

Vin= volts

S.NO

FREQUENCY

( Hz)

OUTPUT VOLTAGE

( Volts)

GAIN IN dB

20 log Vo / Vin

EX.NO: ACTIVE LOW PASS AND BAND PASS FILTER

AIM:

To design and test an active low pass and band pass filter using operational amplifier.

APPARATUS REQUIRED:


1 IC741 1


3 CRO 30MHZ 1


5 Resistors

5.86K,10K

1.6KΩ,47KΩ

Each 1

Each 2

6 Capacitors 0.1μf 2

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THEORY:

ACTIVE LOW PASS FILTER:

Active filter are made of active devices like transistor (or) operational amplifier. Active filters are not only pass the required frequencies but provide gain also.

Because of the high input resistance and low output resistance of op-amps. Active filter which employ op-amps else not have loading problems. The amplitude response of

butterworth LPF is given by the expansion H(ω) = 1 / √(1+(f / fH)2n). Where n is order of the filter and fH is the frequency at which H(ω) becomes ½.

This means that the gain of the LPF falls to 70.7% of the maximum gain at f = fH. The frequency fH is also called down by 3dB ( C = 20 log 0.707) from the maximum gain .

The roll rate of the first order LPF is 20 dB/decade. The resistors R1 and Rf determines gain of the filter. WORKING OF THE CIRCUIT:

At low frequency, capacitor appears open and the circuit acts like a non-inverting amplifier. As the frequency increases.


A band pass filter passes a particular band of frequencies with zero

attenuation and attenuates all other frequencies. There are two types of band pass filter, which are classified as per the figure of merit (or) quality factor Q. (i) Narrow band pass filter (Q>10).

(ii) Wide band pass filter (Q<10). The following relationships are important

Q = fo / BW Q = fo / (fH – fL). Where fH → upper cut-off frequency.

fL → lower cut-off frequency. fo → center frequency.

BW → bandwidth. .

PROCEDURE:

(i) The circuit connections are given as per the circuit diagram. (ii) Switch ON the power supply and feed the 1KHZ square wave at the input and

observe the output and input simultaneously on CRO. (iii) Calculate the frequency of the input signal using the time period and compare this

value of frequency with the theoretical frequency. (iv) Plot the output waveform in graph.

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RESULT: Thus the active low pass and band pass filter are designed and tested using operational

amplifier:

Designed Cut-off Frequency = Observed Cut-off frequency =

EX.NO:6 ASTABLE AND MONOSTABLE MULTIVIBRATOR

USING 555 TIMER

AIM:

To design an astable and monostable multivibrator of frequency 1KHz using

IC555 and test its output waveforms.

APPARATUS REQUIRED:


1 IC 555 1

2 CRO 30MHZ 1

3 Regulated power supply 10V 1

4 Resistors

6.8KΩ, ,

1.1K,10KΩ.

2

Each one

5 Capacitors

0.1μf

0.01μf

2

1

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6 Diode IN4007 1

THEORY:


The 555timer is a highly stable device for generating accurate time delay (or) oscillation. 555timer can be used as a frequency divider and also as pulse stretcher.

Astable Multivibrator is one of the main applications of the 555timers. Astable multivibrator is an electronic circuit which generates square wave of its own without any

external triggering pulse. The 555timer is used to operate as astable multivibrator initially when the power supply is switched ON the external timing capacitor C charge towards Vcc through a resistor RA and RB when the capacitor voltage equal to (2/3)Vcc. The

capacitor C starts discharging towards ground through a resistor RB. During the discharge of the timing capacitor C, as it reaches Vcc/3 the capacitor C again charges towards

(2/3)Vcc. This charging and discharging of timing capacitor C is continuously repeated. So astable multivibrator is also called as free running multivibrator.


The monostable multivibrator has only one stable state. When trigger is

applied, it produces a pulse at the output and returns back to its stable state. The width of the pulse depends on the values of R and C. As it has only one stable state, it is called as one shot multivibrator. The three equal resistances R, inside the chip, establish the

reference voltages 2Vcc/3 and Vcc/3 for comparators C1 and C2 of timer respectively. Before the application of the trigger pulse, the voltage at the trigger input pin is high.

Sometimes, to prevent any possibilityof mistriggering the monostable multivibrator on positive pulse edges, a wave shaping circuit consisting of R1, C1 and diode D is connected between the trigger input pin and the Vcc pin. The monostable timing period

can be varied by voltage applied to the control terminal. It can be used in pulse width modulation, pulse stretcher and water level fill control.

PIN DIAGRAM:

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ASTABLE MULTI VIBRATOR

MONOSTABLE MULTIVIBRATOR

Control

Voltage

Trigger

Threshold

Ground

Discharge

3

555

1

4

8

7

6

2

Output

VCC Reset

5

5

6.8k

3

555

1

4 6.8K

8

7

6

2

Vo

0.1μf

VCC

0.01μf

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DESIGN PROCEDURE:


Let Vcc = 10V , thigh= 1ms, tlow = 0.5ms. We have thigh = 0.69( RA + RB)C and tlow = 0.69RBC.

Let C = 0.1μf. RB = tlow / 0.69C = 6.8KΩ

Then RA = (thigh / 0.69 C )- RB =(1ms/0.069μ) - 6.8K = 6.8KΩ Choose C1 = 0.01μf.


Let Vcc = 10V and T = 1ms.

We have T = 1.1RC. Let C = 0.1μf. Then R = 10KΩ.

Let Tt = 3ms and C1 = 0.01μf. Then Ri = 480Ω, choose C1 = 0.01μf.

Vc

Vo

IN4001

0.1μf

10k

0.1μf

6

7 2

3

VCC=5V

8

0.01μf

1.1K

4

5 1

555

Vt

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PROCEDURE:

(i) The circuit connections are given as per the circuit diagram. (ii) Switch ON the power supply.

(iii) The voltage across the capacitor(Vc) and the output voltage(Vo) waveforms are observed using the CRO.

(iv) Plot the graph for the values which will be obtained from the CRO.

RESULT:

Thus the astable and monostable multivibrator was designed and tested using IC 555 and also tested its output waveforms.

. It is observed that

Astable multivibrator: Design Frequency = KHz;

Observed Frequency = Hz;

monostable multivibrator: Designed Time period = mS;

Observed Time period = S;

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FREQUENCY MULTIPLIER

2.2k

4 NE 565

2 3

R7

2.2k

0.001Mf

3

2

10 Mf

7

0.01mf

10

-10V

11

10k

+10V

5

1

BC107

1

7

9 5

+10v

Fout = 2 Fin

6

7490

47k

10 8

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MODEL GRAPH

FREQUENCY MULTIPLIER

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EX.NO: FREQUENCY MULTIPLIER USING PLL

Fin

T

FO

T

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AIM:

To design and test a frequency multiplier using PLL chip to multiply the input frequency by a factor N.

APPARATUS REQUIRED:


1 IC 7490 1


3 CRO 30MHZ 1


5 Resistors 10KΩ, 2.2KΩ, 47KΩ. Each two

6 Capacitors 0.01μf, 10μf. Each one

7 PLL Chip 565 1

8 Transistor BC107 1

THEORY:

Frequency multiplication can also obtained by using PLL in its harmonic

locking mode. A divide by N network is inserted between the VCO output and the phase comparator input. In the locked state, the VCO output frequency fo is given by,

fo = Nfs. The multiplication factor can be obtained by selecting a proper scaling factor N of the counter. If the input signal is rich in harmonics e.g.: square wave, pulse

train etc., then VCO can be directly locked to the n-th harmonic of the input signal without connecting any frequency divider in-between. However, as the amplitudeof the

higher order harmonics becomes less, effective locking may not take place for high values of n. Typically n is kept less then 10. Since the VCO output is rich in harmonics, it is possible to lock the m-th harmonic of the

VCO output with the input signal fs. The output fo of VCO is given by, fo = fs / m.

PROCEDURE:


(ii) Set up the circuit after verifying the condition of the components. (iii) Feed the input frequency 5V, 1KHz pulses to the pin of 565 IC.

(iv) Observe the multiplid frequency at the pin 4. (v) Plot the graph for the values which will be taken from the CRO.

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RESULT:

Thus the frequency multiplier was designed and tested using PLL IC.

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DESIGN PROCEDURE:

For frequency multiplier let the input frequency be 2 KHz and the output frequency 10 KHz.

VCO should run at 5 KHz frequency fo = (1.2 / 4R1C1) Hz = 5 KHz. Let C1 = 0.01μf and then R1 = 6 KΩ put in series with 2.2KΩ.

R2 = (5-3) / 2mA. R2 = 2.35KΩ.

R3 = ((5-VBE(sat)) / IB). R3 = 43KΩ. Use C2 = 10μf and C3 = 0.01μf.

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EX.NO: SAMPLE AND HOLD CIRCUIT

AIM:

To design and test a Sample And Hold Circuit using LF 398 APPARATUS

REQUIRED:


1 LF 398 1


3 CRO 30MHZ 1


5 Capacitors 0.01μf, 1

THEORY:

Frequency multiplication can also obtained by using PLL in its harmonic

locking mode. A divide by N network is inserted between the VCO output and the phase comparator input. In the locked state, the VCO output frequency fo is given by, fo = Nfs.

The multiplication factor can be obtained by selecting a proper scaling factor N of the counter. If the input signal is rich in harmonics e.g.: square wave, pulse

train etc., then VCO can be directly locked to the n-th harmonic of the input signal without connecting any frequency divider in-between. However, as the amplitudeof the higher order harmonics becomes less, effective locking may not take place for high

values of n. Typically n is kept less then 10. Since the VCO output is rich in harmonics, it is possible to lock the m-th harmonic of the

VCO output with the input signal fs. The output fo of VCO is given by, fo = fs / m.

PROCEDURE:

(vi) The circuit connections are given as per the circuit diagram.

(vii) Set up the circuit after verifying the condition of the components. (viii) Feed the input frequency 5V, 1KHz pulses to the pin of 565 IC. (ix) Observe the multiplid frequency at the pin 4.

(x) Plot the graph for the values which will be taken from the CRO.

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Logic Ref

i/p

Offset Adjust

V+

V- Output

Clock

L

F3 9

8

Logic i/p

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RESULT:

Thus the frequency multiplier was designed and tested using PLL IC.

DESIGN PROCEDURE:

For frequency multiplier let the input frequency be 2 KHz and the output

frequency 10 KHz. VCO should run at 5 KHz frequency fo = (1.2 / 4R1C1) Hz = 5 KHz.

Let C1 = 0.01μf and then R1 = 6 KΩ put in series with 2.2KΩ. R2 = (5-3) / 2mA.

R2 = 2.35KΩ. R3 = ((5-VBE(sat)) / IB). R3 = 43KΩ.

Use C2 = 10μf and C3 = 0.01μf.

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LIC-manual.pdf

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