LHC Beam Dump System Technical Audit Trigger Synchronisation Unit.

LHC Beam Dump SystemTechnical Audit

Trigger Synchronisation Unit

January 2008 CERN - A. ANTOINE 2/14

Topics

• Requirements • Architecture

– Timing unit– Dump request client interface– Dump request management– Supervision & Diagnostic

• Design


Layout (Reminder)

Fault-tolerantFail-safe Re-trigger lines

Branch A

BranchB

BranchA

BranchB

Generator 1

Generator 15

TFO

TFO

Trigger Fan-out

PTU

PTU

PTU

PTU

Power Trigger

Unit

RTB

RTB

RTB

RTB

Re-trigger Box

RTD

TSU

TSUClient Interface

Frev

Trigger Synchronisation

Unit


Requirements

• 3 µs beam abort gap synchronisation• RF-signal recovery capability• Multiple Dump request client detectors• Remote diagnostic• Fault tolerant behavior• Low failure rate (p = 5.52.10-10 / year)• Injection Kicker AGK window generation

January 2008 5/14

Dump Request Client Interface

Digital Phase Locked Loop

Dump Request Management

Timing Unit

Beam Revolution Frequency

Delay Adjustment

Supervisory&

Diagnostic

VME

TFO-A

TSU-A

10 MHzFrequency detector

DTPT TRGS

SBDT

TFO-B

SBDT

Non-Ambivalent State Relay

CurrentLoop

Detector

Dump RequestClients

RTB

ABDT

Architecture

DPDT : Dump Trigger Pulse TrainsTRGS : Trigger Request gate signalSBDT : Synchronous Beam Dump TriggerABDT : Asynchronous Beam Dump Trigger

Dump Request Client Interface

Digital Phase Locked Loop


Timing Unit

Beam Revolution Frequency

Delay Adjustment

Redundant TSU Communication

Supervisory&

Diagnostic

VME

TFO-A

10 MHzFrequency

detector

DTPTTRGS

SBDT

TFO-B

SBDT

Non-Ambivalent State Relay

CurrentLoop

Detector

Dump RequestClients

RTB

ABDT

TSU-B

Redundant TSU Communication


RFRevolutionFrequency

TSU&

TFO

Generator(PTU)

Magnet

δ1 δ2 δ3 δ4 δ5 δ6

251

Timing unitDelays

• δ1 : Transmission speed between RF transmitter & LBDS• δ2 : TSU delay & TFO with compensation delay• δ3 : f(Magnet position) = cable length delay adjustment• δ4 : f(Generator) = Turn on delay compensation• δ5 : cable length delay• δ6 : ceramic chamber effect delay

TSU with Configurable DelayTSU with Configurable Delay

δ1


Timing unitRF-signal transmission

• Optical Fiber Transmission• Optical / electrical conversion by AB/RF Rx & Tx board• ECL 5 ns / 1V / 50 Ω signal converted to CMOS by BT/EC• NO REDUNDANCY

ADPLL as clock recoveryADPLL as clock recovery

1

FO

ECLFO

EL

Tx Rx ConverterRF

RF LBDS

ECL

CMOSvolutionfRe


Timing unitADPLL

+

1Z

+

1Z

Boundaries11229.5Hz < f < 11253.3Hz

14

14

32

32

FromPhase

Detector ToINTERNAL

NCO

ToOUTPUT

NCO

(-)

1Phase Detector 2ADPLL

Controller

3NCO

INTERNAL

5NCO

OUTPUT4NCO Loader

BRF

SYNC_BRF

PFD

UP-14 BitCounter

N = 32

N = 32

Reset

)1()2(

)1(2

PLLPLL

PLL

KZKZ

ZK

NCLK

NCO

fWORDf

2

NCLK

NCO

fWORDf

2

MHzfCLK 100

0CLOCK


Dump Request Client• Based on CPLD technology in redundancy• Each CPLD is program by a different author• 3 different client interfaces :

– Hardware (outside CPLDs) :• Current loop

– Beam loss Monitor• Logical state detector

– Programmable logic Controller– Inject & Dump

– Firmware (inside CPLDs) :• Square wave frequency detectors

– Beam Interlock System– Beam Energy Tracking System

=> All dump requests issue LBDS Synchronous trigger & a one => All dump requests issue LBDS Synchronous trigger & a one turn delay (added by RTD) asynchronous triggerturn delay (added by RTD) asynchronous trigger


Dump Request ClientFrequency detectors

• 2 frequency detector types– Fast detector

• Detects signal activity within a short integration period (250 ns)• One missing pulse tolerant• Acts as a low-pass filter

=> No Frequency drift detection=> No Frequency drift detection– Slow detector

• Calculate the real input frequency• Long integration period (200 µs)

=> Frequency drift detection=> Frequency drift detection



• Discreet components• Synchronous & asynchronous trigger output• Local operation allowed (Test acceptance)• Supervision & Diagnostic unit management

Dump Request

Dump Request

Q

QSET

CLR

S

R

Record Sync Enable

ENB

Buffer

TFO - A

TFO - B

Buffer

RTDClient 1

Client 2

Enable

ENB

Dump Request

Local/Manual


Supervision & Diagnostic• Arming process (before injection allowed)

– Check all sub entities state– Initiate ADPLL pull-in process => Wait ADPLL lock

• Synchronisation check between TSU-A & TSU-B (See table)• Dump Request Management unit control• VME communication for remote diagnostic

TSU-A TSU-B Status Action

OK OK All OK nothing

OK FALSE TSU-B oscillator failureTSU-A Dump immediately

TSU-B disable its own dump request

FALSE OK TSU-A oscillator failureTSU-B Dump immediately

TSU-A disable its own dump request

FALSE FALSE Timing failure TSU-A & TSU-B dump after 5 cycles


Design

• VME crate implementation• 2 redundant electronic boards

with:– 1 CIBO interface (AB/CO - BIS)– 2 independent CPLD for the

dump request client interface– 1 FPGA for synchronisation,

supervision & communication– 1 Dump Request management

unit (Discrete components )– A VME interface

• VME backplane for crosscheck communication

• VME interface boards

CIBO FPGA

CPLD

DRM

VME


Next …

• What’s behind the TFO & RTD boxes ?

LHC Beam Dump System Technical Audit Trigger Synchronisation Unit.

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