LED LCD TV SERVICE MANUAL CAUTION BEFORE SERVICING THE CHASSIS, READ THE SAFETY PRECAUTIONS IN THIS MANUAL. CHASSIS : LD12P MODEL : 32LW470S 32LW470S-ZB North/Latin America http://aic.lgservice.com Europe/Africa http://eic.lgservice.com Asia/Oceania http://biz.lgservice.com Internal Use Only Printed in Korea P/NO : MFL67002344 (1107-REV00)
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LED LCD TVSERVICE MANUAL
CAUTIONBEFORE SERVICING THE CHASSIS,READ THE SAFETY PRECAUTIONS IN THIS MANUAL.
CHASSIS : LD12P
MODEL : 32LW470S 32LW470S-ZB
North/Latin America http://aic.lgservice.comEurope/Africa http://eic.lgservice.comAsia/Oceania http://biz.lgservice.com
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in theSchematic Diagram and Exploded View.It is essential that these special safety parts should be replaced with the same components as recommended in this manual to preventShock, Fire, or other Hazards. Do not modify the original design without permission of manufacturer.
General Guidance
An isolation Transformer should always be used during theservicing of a receiver whose chassis is not isolated from the ACpower line. Use a transformer of adequate power rating as thisprotects the technician from accidents resulting in personal injuryfrom electrical shocks.
It will also protect the receiver and it's components from beingdamaged by accidental shorts of the circuitry that may beinadvertently introduced during the service operation.
If any fuse (or Fusible Resistor) in this TV receiver is blown,replace it with the specified.
When replacing a high wattage resistor (Oxide Metal Film Resistor,over 1 W), keep the resistor 10 mm away from PCB.
Keep wires away from high voltage or high temperature parts.
Before returning the receiver to the customer,
always perform an AC leakage current check on the exposedmetallic parts of the cabinet, such as antennas, terminals, etc., tobe sure the set is safe to operate without damage of electricalshock.
Leakage Current Cold Check(Antenna Cold Check)With the instrument AC plug removed from AC source, connect anelectrical jumper across the two AC plug prongs. Place the ACswitch in the on position, connect one lead of ohm-meter to the ACplug prongs tied together and touch other ohm-meter lead in turn toeach exposed metallic parts such as antenna terminals, phonejacks, etc. If the exposed metallic part has a return path to the chassis, themeasured resistance should be between 1 MΩ and 5.2 MΩ. When the exposed metal has no return path to the chassis thereading must be infinite.An other abnormality exists that must be corrected before thereceiver is returned to the customer.
Leakage Current Hot Check (See below Figure) Plug the AC cord directly into the AC outlet.
Do not use a line Isolation Transformer during this check.Connect 1.5 K / 10 watt resistor in parallel with a 0.15 uF capacitorbetween a known good earth ground (Water Pipe, Conduit, etc.)and the exposed metallic parts.Measure the AC voltage across the resistor using AC voltmeterwith 1000 ohms/volt or more sensitivity.Reverse plug the AC cord into the AC outlet and repeat AC voltagemeasurements for each exposed metallic part. Any voltagemeasured must not exceed 0.75 volt RMS which is corresponds to0.5 mA.In case any measurement is out of the limits specified, there ispossibility of shock hazard and the set must be checked andrepaired before it is returned to the customer.
Leakage Current Hot Check circuit
1.5 Kohm/10W
To Instrument’sexposed METALLIC PARTS
Good Earth Groundsuch as WATER PIPE,CONDUIT etc.
AC Volt-meter
When 25A is impressed between Earth and 2nd Groundfor 1 second, Resistance must be less than 0.1*Base on Adjustment standard
1. Application RangeThis specification sheet is applied to all of the LCD TV withLD12P chassis.
2. Designation(1) Because this is not a hot chassis, it is not necessary to use
an isolation transformer. However, the use of isolationtransformer will help protect test instrument.
(2) Adjustment must be done in the correct order. (3) The adjustment must be performed in the circumstance of
25 ºC ± 5 ºC of temperature and 65 % ± 10 % of relativehumidity if there is no specific designation.
(4) The input voltage of the receiver must keep AC 100-240V~, 50 / 60Hz.
(5) The receiver must be operated for about 5 minutes prior tothe adjustment when module is in the circumstance of over15.
In case of keeping module is in the circumstance of 0 °C, itshould be placed in the circumstance of above 15 °C for 2hours
In case of keeping module is in the circumstance of below -20 °C, it should be placed in the circumstance of above 15°C for 3 hours.
[Caution] When still image is displayed for a period of 20 minutes orlonger (especially where W/B scale is strong. Digital pattern13ch and/or Cross hatch pattern 09ch), there can someafterimage in the black level area.
3. Automatic Adjustment3.1. MAC Address
(1) Equipment & Condition- Play file: Serial.exe- MAC Address edit- Input Start / End MAC address
(2) Download method1) Communication Prot connection
Connect: PCBA Jig-> RS-232C Port== PC-> RS-232C Port
2) MAC Address & CI+ key & Widevine key download- Com 1,2,3,4 and 115200(Baud rate)- Mode check : Online Only- Check the test process: DETECT -> MAC -> CI -> Widevine- Play : START- Result : Ready, Test, OK or NG- Printer Out (MAC Address Label)
3.2. LAN Inspection(1) Equipment & Condition
A Each other connection to LAN Port of IP Hub and Jig
(2) LAN inspection solutionA LAN Port connection with PCBA Network setting at MENU Mode of TVA setting automatic IPA Setting state confirmation
-> If automatic setting is finished, you confirm IP andMAC Address.
3.3. Widevine Key Inspection- Confirm key input Data at the “IN START” MENU Mode.
3.4. LAN PORT INSPECTION(PING TEST)Connect SET -> LAN port == PC -> LAN Port.
(1) Equipment setting1) Play the LAN Port Test PROGRAM.2) Input IP set up for an inspection to Test Program.
*IP Number : 12.12.2.2
(2) LAN PORT inspection (PING TEST)1) Play the LAN Port Test Program.2) Connect each other LAN Port Jack.3) Play Test (F9) button and confirm OK Message.4) Remove LAN cable.
3.5. Model name & serial number download(1) Model name & Serial number D/L
A Press “Power on” key of service remote control.(Baud rate : 115200 bps)
A Connect RS232 Signal Cable to RS-232 Jack.A Write Serial number by use RS-232.A Must check the serial number at Instart menu.
(2) Method & noticeA. Serial number D/L is using of scan equipment.B. Setting of scan equipment operated by Manufacturing
Technology Group.C. Serial number D/L must be conformed when it is produced
in production line, because serial number D/L is mandatoryby D-book 4.0.
* Manual Download (Model Name and Serial Number)If the TV set is downloaded by OTA or service man, sometimesmodel name or serial number is initialized.(Not always)There is impossible to download by bar code scan, so Itneed Manual download.a. Press the ‘instart’ key of ADJ remote control.b. Go to the menu ‘5.Model Number D/L’ like below photo.c. Input the Factory model name(ex 42LD450-ZA) or Serial
number like photo.
d. Check the model name Instart menu. -> Factory namedisplayed. (ex 32LV3700-ZA)
e. Check the Diagnostics.(DTV country only) -> Buyer modeldisplayed. (ex 32LV3700)
Data)/DDC(Display Data Channel) download(1) Overview
It is a VESA regulation. A PC or a MNT will display anoptimal resolution through information sharing without anynecessity of user input. It is a realization of “Plug and Play”.
(2) Equipment- Adjustment remote control- Since embedded EDID data is used, EDID download JIG,
HDMI cable and D-sub cable are not need.
(3)Download method1) Press ADJ key on the Adjustment remote control, then
select “12.EDID D/L”, by pressing Enter key, enter EDIDD/L menu.
2) Select [Start] button by pressing Enter key, HDMI1/HDMI2/ HDMI3/ RGB are Writing and display OK or NG.
A Reference- HDMI1 ~ HDMI3 / RGB - In the data of EDID, bellows may be different by S/W or
Input mode.
Product ID
Serial No. : Controlled on product line
Month, Year: Controlled on production line:ex) Monthly : ‘01’ -> ‘01’
Year : ‘2010’ -> ‘14’ Model Name(Hex):
Checksum: Changeable by total EDID data.
Vendor Specific(HDMI)
4.2. White Balance Adjustment4.2.1. Overview
(1) W/B adj. Objective & How-it-works(2) Objective: To reduce each Panel’s W/B deviation(3) How-it-works : When R/G/B gain in the OSD is at 192, it
means the panel is at its Full Dynamic Range. In order toprevent saturation of Full Dynamic range and data, one ofR/G/B is fixed at 192, and the other two is lowered to findthe desired value.
(4) Adj. condition : normal temperature1) Surrounding Temperature : 25 ºC ± 5 ºC2) Warm-up time: About 5 Min3) Surrounding Humidity : 20 % ~ 80 %
4.2.2 Equipment1) Color Analyzer: CA-210 (LED Module : CH 14)2) Adjustment Computer(During auto adj., RS-232C protocol is
needed)3) Adjustment remote control4) Video Signal Generator MSPG-925F 720p/204-Gray
(Model:217, Pattern:49)-> Only when internal pattern is not available
A Color Analyzer Matrix should be calibrated using CS-1000.
4.2.3. Equipment connection MAP
4.2.4. Adj. Command (Protocol)<Command Format>
- LEN: Number of Data Byte to be sent- CMD: Command- VAL: FOS Data value- CS: Checksum of sent data- A: AcknowledgeEx) [Send: JA_00_DD] / [Ack: A_00_okDDX]
A RS-232C Command used during auto-adj.
Ex) wb 00 00 -> Begin white balance auto-adj.wb 00 10 -> Gain adj.ja 00 ff -> Adj. datajb 00 c0......wb 00 1f -> Gain adj. completed
*(wb 00 20(Start), wb 00 2f(completed)) -> Off-set adj.wb 00 ff -> End white balance auto-adj.
A Adj. Map
Model Name HEX EDID Table DDC Function
ALL 0001 0100 Analog
0001 0100 Digital
MODEL MODEL NAME(HEX)
all 00 00 00 FC 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20
1) Set TV in adj. mode using POWER ON key.2) Zero calibrate probe then place it on the center of the
Display.3) Connect Cable (RS-232C)4) Select mode in adj. Program and begin adjustment.5) When adj. is completed(OK Sign), check adj. status pre
mode. (Warm, Medium, Cool)6) Remove probe and RS-232C cable to complete adj..
A W/B Adj. must begin as start command “wb 00 00” , andfinish as end command “wb 00 ff”, and Adj. offset if need.
(2) Manual adj. method1) Set TV in Adj. mode using POWER ON.2) Zero Calibrate the probe of Color Analyzer, then place it
on the center of LCD module within 10cm of the surface.3) Press ADJ key -> EZ adjust using adjustment remote
control -> 9.White-Balance then press the cursor to theright key (G).(When key(G) is pressed 216 Gray internalpattern will be displayed.)
4) One of R Gain / G Gain / B Gain should be fixed at 192,and the rest will be lowered to meet the desired value.
5) Adjustment is performed in COOL, MEDIUM, WARM 3modes of color temperature.
A If internal pattern is not available, use RF input. In EZAdj. menu 9.White Balance, you can select one of 2 Test-pattern: ON, OFF. Default is inner(ON). By selectingOFF, you can adjust using RF signal in 216 gray pattern.
A Adj. condition and cautionary items1) Lighting condition in surrounding area
Surrounding lighting should be lower 10 lux. Try toisolate adj. area into dark surrounding.
2) Probe location: Color Analyzer(CA-210) probe should be within 10 cmand perpendicular of the module surface.(80°~100°)
3) Aging time- After Aging Start, keep the Power ON status during
5 Minutes.- In case of LCD, Back-light on should be checked
4.3. Wireless function checkStep 1) Connect set and Dongle of Wireless to Cable of HDMI
& TTA 20Pin.Step 2) At OSD of SET, check the message like Fig.3.Step 3) Detach Cable of Wireless Dongle.
4.4. EYE-Q function checkStep 1) Turn on TV.Step 2) Press EYE key of Adjustment remote control.Step 3) Cover the Eye Q II sensor on the front of the using
your hand and wait for 6 seconds.Step 4) Confirm that R/G/B value is lower than 10 of the “Raw
Data (Sensor data, Back light)”. If after 6 seconds,R/G/B value is not lower than 10, replace Eye Q IIsensor.
Step 5) Remove your hand from the Eye Q II sensor and waitfor 6 seconds.
Step 6) Confirm that “ok” pop up. If change is not seen,replace Eye Q II sensor.
4.5. 3D function test4.5.1. HDMI 3D
(Pattern Generator MSHG-600, MSPG-6100 [Support HDMI 1.4])* HDMI mode No. 872, pattern No. 83)1) Please input 3D test pattern like below
2) When 3D OSD appear automatically, then select green key.
3) Don’t wear a 3D Glasses, Check the picture like below.
4.5.2. RF emitter inspection(1) Start 3D pattern inspection
(2) If RF emitter signal is correctly received to RF receiver, thelamp of RF tester turn on.
- Option selection is only done for models in Non-EU.- Applied model: LD12P Chassis applied EU model.
(2) Method1) Press ADJ key on the Adjustment Remote Control, then
select Country Group Menu.2) Depending on destination, select Country Group Code
04 or Country Group EU then on the lower Countryoption, select US, CA, MX. Selection is done using +, -or GF key.
5. Tool Option selection- Method : Press ADJ key on the Adjustment remote control,
then select Tool option.
5.1. Ship-out mode check(In-stop)After final inspection, press IN-STOP key of the Adjustmentremote control and check that the unit goes to Stand-by mode.
5.2. GND and Internal Pressure check5.2.1. Method
1) GND & Internal Pressure auto-check preparation- Check that Power Cord is fully inserted to the SET.
- Unit fully inserted Power cord, Antenna cable and A/Varrive to the auto-check process.
- Connect D-terminal to AV JACK TESTER.- Auto CONTROLLER(GWS103-4) ON- Perform GND TEST.- If NG, Buzzer will sound to inform the operator.- If OK, changeover to I/P check automatically.
(Remove CORD, A/V form AV JACK BOX.)- Perform I/P test.- If NG, Buzzer will sound to inform the operator.- If OK, Good lamp will lit up and the stopper will allow the
pallet to move on to next process.
5.2.2. Checkpoint• TEST voltage
- GND: 1.5 KV/min at 100 mA- SIGNAL: 3 KV/min at 100 mA
• TEST time: 1 second• TEST POINT
- GND TEST = POWER CORD GND & SIGNAL CABLEMETAL GND
- Internal Pressure TEST = POWER CORD GND & LIVE &NEUTRAL
• LEAKAGE CURRENT: At 0.5 mArms
6. USB S/W download(option, service only)1) Put the USB Stick to the USB socket.2) Automatically detecting update file in USB Stick
- If your downloaded program version in USB Stick is Low,it didn’t work. But your downloaded version is High, USBdata is automatically detecting.
3) Show the message “Copying files from memory”.
4) Updating is starting.
5) Updating Completed, the TV will restart automatically.6) If your TV is turned on, check your updated version and
Tool option. (explain the Tool option, next stage)* If downloading version is more high than your TV have,
TV can lost all channel data. In this case, you have tochannel recover. if all channel data is cleared, you didn’thave a DTV/ATV test on production line.
* After downloading, have to adjust TOOL OPTION again.1) Push “IN-START” key in service remote control.2) Select “Tool Option 1” and Push “OK” key.3) Punch in the number. (Each model has their number.)
- 18 - LGE Internal Use OnlyCopyright LG Electronics. Inc. All rights reserved.Only for training and service purposes
300
320
200
LV1
LV2
120
510
A2
A5
A10
A21
800
530
540
521
400
710
511
AG
1A
G2
900
910
700
340
330
310
EXPLODED VIEW
Many electrical and mechanical parts in this chassis have special safety-related characteristics. Theseparts are identified by in the Schematic Diagram and EXPLODED VIEW. It is essential that these special safety parts should be replaced with the same components asrecommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards. Do not modify the original design without permission of manufacturer.
IMPORTANT SAFETY NOTICE
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATESSPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FORTHE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
NAND_DATA[0]
NAND_DATA[1]
CI_ADDR[12]
NAND_DATA[2]
CI_ADDR[2]
NAND_DATA[1]
NAND_DATA[3]
CI_ADDR[7]
CI_ADDR[13]
CI_ADDR[14]
NAND_DATA[4]
NAND_DATA[2]
NAND_DATA[3]
NAND_DATA[7]
NAND_DATA[5]
CI_ADDR[8]
NAND_DATA[7]
NAND_DATA[0]
NAND_DATA[6]
CI_ADDR[4]
CI_ADDR[9]
NAND_DATA[4]
CI_ADDR[3]
NAND_DATA[6]
NAND_DATA[5]
CI_ADDR[10]
CI_ADDR[11]
CI_ADDR[5]
CI_ADDR[6]
R185 0
TXA0N
SOC_RESET
TXBCLKP
R151 016Gbit
R1471K
TXD0P
R17010K
SDA2_3.3V
HDMI_ARC
R172
4.7K
OPT
TXD1P
C1030.1uF
54MHz_XTAL_P
R18310K
C1010.1uF
TXA1P
DTV/MNT_V_OUT
TXC0P
TXC1P
R18010K
TXDCLKN
TXA3N
R11510K
R132 4.7K
R12010K
SCL0_3.3V
TXACLKN
+3.3V_Normal
R11610KOPT
NAND_DATA[6]
+3.3V_Normal
HDMI_CLK+
R11810K
R1501K
NAND_WEb
+3.3V_Normal
P101
TJC2508-4A
1VCC
2SCL
3SDA
4GND
TXD2P
NAND_DATA[5]
C1064.7uF
CI_ADDR[8]
SC_ID
NAND_CEb2
+3.3V_Normal
R145 22OPT
R15710KOPT
CI_ADDR[12]
R1690
CI_ADDR[7]
C112 0.1uF
TXB4P
R107
2.7K
C10733pF50V
DVB_S
TXD1N
NAND_CEb
NAND_RBb
R1014.7K
R1241KOPT
C1190.1uF16V
NAND_CLE
TXB2N
+3.3V_Normal
TXD4P
5V_HDMI_2
NAND_CEb2
C104 10uF10V
TXA1N
TXB3N
BSS83
Q101S B D
G
NAND_DATA[3]
HDMI_CLK-
R17610K
SDA0_3.3V
R11110KOPT
R191 33
TXD3P
TXB0P
R15410KOPT
BCM_RX
HDMI_RX2+
TXC2P
R103
4.7K
OPT
+3.3V_Normal
TXD2N
TXCCLKP
C1024700pF
R19810K
C111 0.01uF
NAND_ALE
TXBCLKN
NAND_DATA[0-7]
TXCCLKN
R17910KOPT
HDMI_RX1+
R11710KOPT
R135 33
C10833pF50VDVB_S
R17710K
FLASH_WP
TXA4N
R16510K
R1954.7K
IC103M24M01-HRMN6TP
BCM_NVM_1M
3E2
2E1
4VSS
1NC
5SDA
6SCL
7WP
8VCC
NAND_DATA[7]
R173
4.7K
TXB4N
R190 33
NAND_DATA[0-7]
NAND_WEb
R19610K
NAND_CEb
R108 10K
CI_ADDR[4]
+3.3V_Normal
NAND_REb
R1561K
/CI_CE1
R15510K
A_DIM
R1531K
TXA3P
HDMI_RX1-
NAND_DATA[0]
5V_HDMI_1
R1942.7K
R12710KOPT
NAND_CLE
R1251K
R17810KOPT
C1052.2uF10V
CI_ADDR[13]
C10933pF50V
54MHz_XTAL_N
R1591K
5V_HDMI_4
R12810K
/PCM_WAIT
+3.3V_Normal
HDMI_RX0-
CI_ADDR[3]
BCM_TX
C11033pF50V
TXB1P
+3.3V_Normal
R18410KOPT
NAND_ALE
R144 22OPT
TXA0P
R12210K
SCL2_3.3V
NAND_DATA[1]
+3.3V_Normal
R1063K
R11910KOPT
TXC3N
R17510KOPT
SCL3_3.3V
HDMI_RX0+
R12310KOPT
R16710KOPT
CI_ADDR[2]
R1302KOPT
R1101.5K
R11310K
R19310K
R18110KOPT
R11210K
TXACLKP
R148 016Gbit
TXB3P
R18210K
TXC4N
R1631K
+3.3V_Normal
LNB_INT
R11410KOPT
R1405601%
R15810K
R1621K
TXA2P
TXA2N
NAND_RBb
NAND_DATA[4]
R136 33
R149 016Gbit
R143 22OPT
TXC4P
R186 0
BSS83Q102
S B D
G
NAND_DATA[2]
R139 0
TXB1N
CI_ADDR[11]
CI_ADDR[9]
5V_HDMI_3
+3.3V_Normal
R1661K
RGB_DDC_SCL
+3.3V_Normal
TXD4N
TXC1N
54MHz_XTAL_P
TXDCLKP
R17110KOPT
TXC2N
TXC0N
R16010KOPT
TXB0N
NAND_REb
TXC3P
CI_ADDR[6]
R16810K
PCM_5V_CTL
R1891MOPT
+3.3V_Normal
R141 4.7KTXD0N
54MHz_XTAL_N
R19210KOPT
R146 10K
C1180.1uF16V
+3.3V_Normal
+3.3V_Normal
/CI_CE2
TXA4P
R16410KOPT
+3.3V_Normal
R16110K
R142 22OPT
R18810K
R18710KOPT
SDA3_3.3V
NAND_CLE
R1091.5K
FLASH_WP
TXB2P
+3.3V_Normal
TXD3N
+3.3V_Normal
CI_ADDR[2-14]
HDMI_RX2-
R174
4.7K
OPT
RGB_DDC_SDA
NAND_ALE
R1261.2K
R1291.2K
R1211.2K
R1311.2K
R199 22
R197 22
R1054.7K
R1044.7K
IC102TC58DVG3S0ETA00
NAND_8Gbit
26NC_17
27NC_18
28NC_19
29I/O1
30I/O2
31I/O3
32I/O4
33NC_20
34NC_21
35NC_22
36VSS_2
37VCC_2
38NC_23
39PSL
40NC_24
41I/O5
42I/O6
43I/O7
44I/O8
45NC_25
46NC_26
47NC_27
48NC_28
17ALE
3NC_3
6NC_6
16CLE
15NC_10
14NC_9
13VSS_1
12VCC_1
11NC_8
10NC_7
9CE
8RE
7RY/BY
4NC_4
5NC_5
25NC_16
24NC_15
23NC_14
2NC_2
22NC_13
21NC_12
1NC_1
20NC_11
19WP
18WE
IC102-*1TH58DVG4S0ETA20
DEV_NAND_16Gbit
26NC_15
27NC_16
28NC_17
29I/O1
30I/O2
31I/O3
32I/O4
33NC_18
34NC_19
35NC_20
36VSS_2
37VCC_2
38NC_21
39PSL
40NC_22
41I/O5
42I/O6
43I/O7
44I/O8
45NC_23
46NC_24
47NC_25
48NC_26
17ALE
3NC_3
6RY/BY2
16CLE
15NC_8
14NC_7
13VSS_1
12VCC_1
11NC_6
10CE2
9CE1
8RE
7RY/BY1
4NC_4
5NC_5
25NC_14
24NC_13
23NC_12
2NC_2
22NC_11
21NC_10
1NC_1
20NC_9
19WP
18WE
LGE35230(BCM35230KFSBG)IC101
NON_BCM_CAP
HDMI0_CLKNB5
HDMI0_CLKPC5
HDMI0_D0NA4
HDMI0_D0PB4
HDMI0_D1NA3
HDMI0_D1PB3
HDMI0_D2NA2
HDMI0_D2PB2
CECW2
DDC0_SCLV4
DDC0_SDAW4
HDMI0_HTPLG_INV3
HDMI0_HTPLG_OUTV2
HDMI0_ARCD13
HDMI0_RESREFE6
TXOUT0_L0NAE27
TXOUT0_L0PAE28
TXOUT0_L1NAF27
TXOUT0_L1PAF28
TXOUT0_L2NAG27
TXOUT0_L2PAG28
TXCLK_LNAE26
TXCLK_LPAF26
TXOUT0_L3NAH27
TXOUT0_L3PAG26
TXOUT0_L4NAF25
TXOUT0_L4PAE25
TXOUT0_U0NAH26
TXOUT0_U0PAG25
TXOUT0_U1NAE24
TXOUT0_U1PAD24
TXOUT0_U2NAH25
TXOUT0_U2PAF24
TXCLK_UNAE23
TXCLK_UPAD23
TXOUT0_U3NAG24
TXOUT0_U3PAF23
TXOUT0_U4NAC22
TXOUT0_U4PAD22
TXOUT1_L0NAG23
TXOUT1_L0PAH23
TXOUT1_L1NAE22
TXOUT1_L1PAE21
TXOUT1_L2NAF22
TXOUT1_L2PAH22
TXCLK1_LNAG22
TXCLK1_LPAF21
TXOUT1_L3NAG21
TXOUT1_L3PAF20
TXOUT1_L4NAD21
TXOUT1_L4PAC21
TXOUT1_U0NAG20
TXOUT1_U0PAH20
TXOUT1_U1NAD19
TXOUT1_U1PAE19
TXOUT1_U2NAF19
TXOUT1_U2PAH19
TXCLK1_UNAE18
TXCLK1_UPAD18
TXOUT1_U3NAG19
TXOUT1_U3PAF18
TXOUT1_U4NAG18
TXOUT1_U4PAF17
LT0VCAL_MONITORAC18
GPIO_BL_ONAH16
BL_PWM/GPIOAG16
LGE35230(BCM35230KFSBG)IC101
NON_BCM_CAP
TVM_XTALINAG6
TVM_XTALOUTAF6
IRRXDAV5
FP_IN0AB4
FP_IN1Y4
SPARE_ADC1AA4
SPARE_ADC2Y5
FS_IN1AB2
FS_IN2AB5
VGA_SDAU3
VGA_SCLU2
RDAY2
TDAY1
BSCDATAAAA3
BSCCLKAAA2
RDB/GPIOH3
TDB/GPIOH2
BSC_S_SCLH4
BSC_S_SDAH5
NMIBF25
POWER_CTRLW5
AON_HSYNCU5
AON_VSYNCU4
AON_GPIO_36W3
AON_GPIO_37W1
AON_RESETOUTBAB6
TVM_BYPASSY6
RESETBY3
RESETOUTBG24
TMODEJ6
TESTENW6
VDAC_VREGF7
VDAC_RBIASE7
FAD_7AB1
FAD_6AB3
FAD_5AC1
FAD_4AC2
FAD_3AC3
FAD_2AD2
FAD_1AD3
FAD_0AE2
FALEAG1
FCEB_0AF1
FCEB_1AC5
FCEB_2AE6
FCEB_3AG5
NFWPBAF3
FWEAG2
FRDAE3
FRDYBAA5
FA_0AF2
FA_1AE1
FA_2AC4
FA_3AD5
FA_4AD4
FA_5AE4
FA_6AE5
FA_7AD6
FA_8AH3
FA_9AF4
FA_10AH4
FA_11AG4
FA_12AF5
FA_13AG3
FA_14AH2
FA_15AH5
TRSTBAD15
TDI/GPIOAF14
TDOAH14
TMS/GPIOAD14
TCK/GPIOAG14
DINT/GPIOAC16
AVS_VFBAH7
AVS_VSENSEAG7
AVS_RESETBAD7
AVS_NDRIVE_1AF7
AVS_PDRIVE_1AH8
VDAC_1C6
VDAC_2D7
X10154MHz
EAW58812611SUNNY ELECTRONICS CORPORATION
CRYSTAL_BCM_Sunny
4GND_2
1X-TAL_1
2GND_1
3X-TAL_2 X101-*1
54MHz
CRYSTAL_BCM_LihomEAW60763703
LIHOM CO., LTD.
4GND_2
1X-TAL_1
2GND_1
3X-TAL_2
X101-*254MHz
CRYSTAL_BCM_KDS
DAISHINKU CORPORATION.EAW58239604
4GND_2
1X-TAL_1
2GND_1
3X-TAL_2
IC103-*1AT24C256C-SSHL-T
BCM_NVM_256K
3A2
2A1
4GND
1A0
5SDA
6SCL
7WP
8VCC
C11412pF50V
C11312pF
50V
SRST
SRST
L/R_SYNC_DINT
L/R_SYNC_DINT
MAIN & NAND FLASH
BBS CONNECT
Write Protection
- High : Normal Operation- Low : Write Protection
NAND_DATA[0]:0: System is LITTLE endian (O)1: System is BIG endian
CI_ADDR[7]:0: Disable EDID automatic Downloading from Flash (O)1: Enable EDID automatic Downloading from Flash
NAND_DATA[6] : 0: Disable OSC clock output on chip Pin (O)1: Enable OSC clock output on chip pin.
CI_ADDR[6]:0: Host MIPS run at 500 MHz (O)1: Host MIPS run at 250 MHz
CI_ADDR[8]:0: RESETOUTb (in On/Off only) stay asserted until software releases them.1: Fix amount of delay for de-assertion on RESETOUTb (in On/IOff only) at end of RESETb pulse (O)
NAND_DATA[3]:0: MIPS will boot from external flash (O)1: MIPS will boot from ROM
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATESSPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FORTHE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
FE_TS_DATA[2]
PCM_MDI[7]
PCM_MDI[5]
PCM_MDI[6]
FE_TS_DATA[7]
PCM_MDI[4]
FE_TS_DATA[4]
PCM_TS_DATA[5]
FE_TS_DATA[5]
PCM_MDI[2]
PCM_MDI[1]
PCM_MDI[0]
FE_TS_DATA[3]
FE_TS_DATA[6]
FE_TS_DATA[0]
PCM_TS_DATA[1]
PCM_TS_DATA[3]
PCM_TS_DATA[0]
FE_TS_DATA[1]
PCM_TS_DATA[2]
PCM_TS_DATA[7]
PCM_TS_DATA[6]
PCM_MDI[3]
PCM_TS_DATA[4]
CHBO_TS_CLK
PCM_TS_VAL
COMP1_DET
PLL_MIPS_AVDD
L213BLM18PG121SN1D
ADAC_AVDD25
C23133pF50V
NON_NTP
+0.9V_CORE
C22733pF50V
NON_NTP
R264
1KOPT
+2.5V_BCM35230
PCM_TS_SYNC
EPHY_VDD25
SIDE_USB_CTL2
R266
1K
NO_S_TUNNER
C2810.1uF
MODEL_OPT_2
C2900.1uF
VAFE2_DVDD
SDA1_3.3V
R241100
PLL_VAFE_AVDD25
TU_TS_SYNC
C2200.1uF
C2800.1uF
C2340.1uF
3D_GPIO_1
SCL1_3.3V
C2570.1uF
+0.9V_CORE
L216BLM18PG121SN1D
MODEL_OPT_2
MODEL_OPT_3
L209
BLM18PG121SN1D
C24722uF
/PCM_IRQA
R227 22
RF_BOOSTER_CTL
AADC_AVDD25
+0.9V_CORE
R208 0 F/NIM_EU_CN
+0.9V_CORE
+0.9V_CORE
+0.9V_CORE
+0.9V_CORE
C2990.1uF
R267
1K
NO_PHM
R253
1K
OLED
+0.9V_CORE
PCM_MISTRT
ADAC_AVDD25
L/DIM0_MOSI
R251
1K
BCM_FRC/URSA5
C2420.1uF
SIDE_USB_OCD2
R226 22
R285 22
PWM_DIM
C2780.1uF
C2360.1uF
+2.5V_BCM35230
USB_AVDD33
+2.5V_BCM35230
+3.3V_Normal
HDMI_AVDD33
+1.5V_DDR
R281 22
C2730.1uF
R218 22
MODEL_OPT_4
R204 0F/NIM_EU_CN
TW9910_RESET
C2130.1uF
R221 22 BCM_L/DIM
SC_DET/COMP2_DET
R254
1K
R203 0 F/NIM_EU_CN
R265
1K
NO_T2_TUNER
C2720.01uF
IF_N
C2110.1uF
+0.9V_CORE
R215 22
PCM_MIVAL_ERR
HDMI_AVDD33
C2150.01uF
L/DIM0_VS
MODEL_OPT_0
MODEL_OPT_7
R282 22
CHB_RESET
SIDE_USB_DM HDMI_AVDD
R242100
C2760.01uFOPT
C2700.1uF
C201100pFOPT
R256
1K
S_TUNER
IF_AGC
CI_DET
+0.9V_CORE
R230 22BCM_L/DIM
C2690.1uF
+3.3V_Normal
PCM_TS_DATA[0-7]
C2830.1uF
3D_GPIO_2
FE_TS_DATA[0-7]
L211BLM18PG121SN1D
R262
1KHD
C2550.1uF
R255
1K
T2_TUNER
L204BLM18PG121SN1D
SIDE_USB_OCD1
R261
1K
NO_FRC/FRC2
R2402.7K
R225 0 OPT
PLL_MIPS_AVDDVAFE2_VDD25
ERROR_OUT
EPHY_VDD25
L218BLM18PG121SN1D
MODEL_OPT_7
L215BLM18PG121SN1D
R28322
VAFE3_DVDD
+3.3V_Normal
R2116.04K
C2970.1uF
PLL_VAFE_AVDD
DTV_ATV_SELECT
L207BLM18PG121SN1D
R260
1K
NO_FRC/BCM_FRC
R207 0 F/NIM_EU_CN
+2.5V_BCM35230
SIDE_USB_CTL1
R28610KWIFI
R2104.87K1%
M_RFModule_RESET
USB_AVDD
EPHY_RDN
R205 0 F/NIM_EU_CN
CHBO_TS_SERIAL
C2890.1uF
+2.5V_BCM35230
AV2_CVBS_DET
R220 22
3D_GPIO_0
+3.3V_Normal
L/DIM0_SCLK
C2220.01uF
VAFE3_VDD25
RF_SWITCH_CTL_2
VAFE3_VDD25
+0.9V_CORE
R222 22 BCM_L/DIM
+3.3V_Normal
R206 0 F/NIM_EU_CN
L202BLM18PG121SN1D
VDAC_AVDD33
PCM_TS_CLK
MODEL_OPT_1
+3.3V_Normal
R228 22
PLL_AUD_AVDD
+2.5V_BCM35230
C2680.1uF
EPHY_TDP
R2020
F/NIM_EU_CN
+2.5V_BCM35230
L212BLM18PG121SN1D
MODEL_OPT_4
MODEL_OPT_3
C2880.1uF
MODEL_OPT_6
EPHY_TDN
TS_VAL_ERR
C2820.1uF
+1.5V_DDR
+3.3V_Normal
L214BLM18PG121SN1D
PCM_MDI[0-7]
C27422uF
R250
1K
FRC2/URSA5
R235 100
MODEL_OPT_1
M_REMOTE_RX
R223 22
R28022
C2580.1uF
FRC_RESET
L206BLM18PG121SN1D
C2980.1uF
DC_MREMOTE
USB_AVDD33
IF_P
L219BLM18PG121SN1D
R263
1KLCD
WIFI_DM
SIDE_USB_DP
C2210.1uF
VDAC_AVDD33
MODEL_OPT_5
C2290.1uF
C2180.1uF
16V
MODEL_OPT_6
INSTANT_MODE
EPHY_RDP
PCM_RST
PLL_VAFE_AVDD25
L201
BLM18PG121SN1D
+3.3V_Normal
WIFI_DP
+0.9V_CORE
RF_SWITCH_CTL
R257
1KPHM
CHBO_TS_SYNC
+2.5V_BCM35230
R201 0OPT
+0.9V_CORE
C2930.1uF
AADC_AVDD25
R284 22
L217BLM18PG121SN1D
R214 22
+3.3V_Normal
C217
0.1uF16V
C2230.01uF
PLL_MAIN_AVDD
L210BLM18PG121SN1D
R224 22
C28422uF
PLL_MAIN_AVDD
C2670.1uF
+3.3V_Normal
C216 0.01uF
PLL_VAFE_AVDD
MODEL_OPT_5
C2750.1uFOPT
CHBO_TS_VAL_ERR
VAFE2_DVDD
+2.5V_BCM35230
+3.3V_Normal
C29222uF
R213 2K
USB_AVDD
L203BLM18PG121SN1D
VAFE2_VDD25
+3.3V_Normal
C2560.1uF
VAFE3_DVDD
DD_MREMOTE
R2121K
Non_CHB
L205BLM18PG121SN1D
PCM_MCLKI
MODEL_OPT_0
R252
1KFHD
PLL_AUD_AVDD
+3.3V_Normal
C2510.1uF16V
HDMI_AVDD
TU_TS_CLK
DSUB_DETR209 0 F/NIM_EU_CN
R216 22
C2710.01uF
EPHY_ACTIVITY
EPHY_LINK
3D_SYNC
R2331.2K
R2341.2K
R231 100
URSA_RESET
R231-*1 0
FRC2_RESETR232
4.7K
URSA_RESET
+3.3V_Normal
C20310uF10V
C20510uF10V
C24810uF10V
C24910uF10V
C25310uF10V
C25910uF10V
C26110uF10V
C26210uF
C2074.7uF10V
C2094.7uF10V
C2384.7uF10V
C2504.7uF10V
C2544.7uF
C2524.7uF10V
C2604.7uF
C2634.7uF
C2644.7uF
C2654.7uF
C2664.7uF C277
4.7uF
C2794.7uF
C2854.7uF
C2864.7uF
C2874.7uF
C2914.7uF
C2944.7uF
C2954.7uF
C2964.7uF
C2250.22uF6.3V
LGE35230(BCM35230KFSBG)IC101
NON_BCM_CAP
EPHY_VREFF26
EPHY_RDACD26
EPHY_TDPF27
EPHY_TDNF28
EPHY_RDPE27
EPHY_RDNE26
USB_MONCDRF5
USB_RREFE5
USB_PORT1DNC2
USB_PORT1DPD1
USB_PWRFLT_1/GPIOE1
USB_PWRON_1/GPIOD2
USB_PORT2DNB1
USB_PORT2DPC1
USB_PWRFLT_2/GPIOC3
USB_PWRON_2/GPIOC4
TCLKA/GPIOM4
TDATA_0/GPIOL5
TDATA_1/GPIOM5
TDATA_2/GPIOL6
TDATA_3/GPION3
TDATA_4/GPION1
TDATA_5/GPION2
TDATA_6/GPIOM3
TDATA_7/GPIOM2
TSTRTA/GPIOL4
TVLDA/GPION4
TCLKD/GPIOK6
TDATD_0/GPIOJ4
TDATD_1/GPIOK5
TDATD_2/GPIOJ2
TDATD_3/GPIOJ3
TDATD_4/GPIOK2
TDATD_5/GPIOK1
TDATD_6/GPIOK3
TDATD_7/GPIOL1
TSTRTD/GPIOL3
TVLDD/GPIOL2
MPEG_CLK/GPIOP4
MPEG_D_0/GPIOT2
MPEG_D_1/GPIOR3
MPEG_D_2/GPIOR2
MPEG_D_3/GPIOP3
MPEG_D_4/GPIOP2
MPEG_D_5/GPIOP1
MPEG_D_6/GPIOR6
MPEG_D_7/GPION5
MPEG_SYNC/GPIOT4
MPEG_DATA_EN/GPIOP5
MCIF_RESET/GPIOR4
MCIF_SCLK/GPIOU1
MCIF_SCTL/GPIOT3
MCIF_SDI/GPIOT1
MCIF_SDO/GPIOT5
VI_IFP0C17
VI_IFM0B17
VDDR_AGCD15
AGC_SDM_2B16
AGC_SDM_1A16
GPIO_0A15
GPIO_1C16
GPIO_2G28
GPIO_3G26
PCI_VIO_0W14
PCI_VIO_1W15
PCI_VIO_2W13
GPIO_4J5
GPIO_5R5
GPIO_6V6
GPIO_7H6
GPIO_70AE15
GPIO_71AF15
GPIO_72AG15
GPIO_73AF16
GPIO_74AD16
GPIO_75AE16
GPIO_76AG17
GPIO_77AH17
GPIO_78AE17
GPIO_79AD17
PCI_AD05AB13
PCI_AD06AC15
PCI_AD07AB12
PCI_AD08AB11
PCI_AD09/GPIOAE14
PCI_AD10/GPIOAG13
PCI_AD11/GPIOAH13
PCI_AD12/GPIOAF13
PCI_AD13/GPIOAE13
PCI_AD14/GPIOAD12
PCI_AD15/GPIOAF12
PCI_AD16/GPIOAG10
PCI_AD17/GPIOAF10
PCI_AD18/GPIOAE10
PCI_AD19/GPIOAD10
PCI_AD20/GPIOAE9
PCI_AD21/GPIOAE8
PCI_AD22AC10
PCI_AD23AC11
PCI_AD24AC8
PCI_AD25AB8
PCI_CBE00AC14
PCI_CBE01/GPIOAG12
PCI_CBE02/GPIOAH10
PCI_CBE03AB7
PCI_DEVSELB/GPIOAG11
PCI_FRAMEB/GPIOAD11
PCI_IRDYB/GPIOAE11
PCI_PAR/GPIOAD13
PCI_PERRB/GPIOAE12
PCI_REQ1BAC12
PCI_SERRB/GPIOAC13
PCI_STOPB/GPIOAH11
PCI_TRDYB/GPIOAF11
LGE35230(BCM35230KFSBG)IC101
NON_BCM_CAP
VDDC_1V12
VDDC_2V7
VDDC_3M10
VDDC_4N10
VDDC_5P10
VDDC_6R10
VDDC_7T10
VDDC_8U10
VDDC_9V10
VDDC_10W10
VDDC_11V13
VDDC_12L11
VDDC_13M11
VDDC_14N11
VDDC_15P11
VDDC_16R11
VDDC_17T11
VDDC_18U11
VDDC_19V11
VDDC_20W11
VDDC_21V14
VDDC_22L18
VDDC_23M18
VDDC_24N18
VDDC_25P18
VDDC_26R18
VDDC_27T18
VDDC_28U18
VDDC_29V18
VDDC_30W18
VDDC_31V15
VDDC_32L19
VDDC_33M19
VDDC_34N19
VDDC_35P19
VDDC_36R19
VDDC_37T19
VDDC_38U19
VDDC_39V19
VDDC_40W19
VDDC_41V16
VDDC_42V17
POR_VDDL10
VDDR1_1L22
VDDR1_2AA28
VDDR1_3V28
VDDR1_4R28
VDDR1_5M28
VDDR1_6J28
VDDR1_7K23
VDDR1_8M22
VDDR1_9T22
VDDR1_10T23
VDDR1_11U22
VDDR1_12Y22
DDR_LDO_VDDOR22
VDDR3_1G15
VDDR3_2H22
VDDR3_3G23
VDDR3_4AB9
VDDR3_5K7
VDDR3_6AB15
VDDR3_7L7
VDDR3_8AB14
VDDR3_9M7
VDDR3_10N6
VDDR3_11P6
AON_VDDC_1AA6
AON_VDDC_2AA7
AON_POR_VDDY7
AON_VDDR3U7
AON_VDDR10_1T7
AON_VDDR10_2T6
VSS_1K10
VSS_2K11
VSS_3K12
VSS_4L12
VSS_5M12
VSS_6N12
VSS_7P12
VSS_8R12
VSS_9T12
VSS_10U12
VSS_11W12
VSS_12K13
VSS_13L13
VSS_14M13
VSS_15N13
VSS_16P13
VSS_17R13
VSS_18T13
VSS_19U13
VSS_20W16
VSS_21K14
VSS_22L14
VSS_23M14
VSS_24N14
VSS_25P14
VSS_26R14
VSS_27T14
VSS_28U14
VSS_29K15
VSS_30L15
VSS_31M15
VSS_32N15
VSS_33P15
VSS_34R15
VSS_35T15
VSS_36U15
VSS_37K16
VSS_38L16
VSS_39M16
VSS_40N16
VSS_41P16
VSS_42R16
VSS_43T16
VSS_44U16
VSS_45K17
VSS_46L17
VSS_47M17
VSS_48N17
VSS_49P17
VSS_50R17
VSS_51T17
VSS_52U17
VSS_53W17
VSS_54K18
VSS_55K19
VSS_56H7
VSS_57G14
VSS_58AB16
VSS_59R7
VSS_60M6
VSS_61AB23
VSS_62P7
VSS_63W7
VSS_64J7
VSS_65N7
VSS_66AB10
VSS_67AC23
VSS_68AC6
VSS_69G19
VSS_70AA22
VSS_71J23
VSS_72J22
VSS_73K22
VSS_74J25
VSS_75N22
VSS_76N23
VSS_77M25
VSS_78P22
VSS_79R25
VSS_80V22
VSS_81W22
VSS_82W23
VSS_83V25
VSS_84AA25
LGE35230(BCM35230KFSBG)IC101
NON_BCM_CAP
AADC_AVDD25F19
ADACA_AVDD25D25
ADACC_AVDD25D24
ADACD_AVDD25E24
EPHY_BVDD25F24
EPHY_AVDD25E25
POR_VDD25F8
HDMI0_AVDDD5
HDMI0_AVDD33D4
LT0VDD25_1AE20
LT0VDD25_2AD20
LT0VDD25_3AC20
LT0VDD25_4AB20
SPDIF_IN_AVDD25D14
USB_AVDDE4
USB_AVDD33D3
VDAC_AVDD33D6
VAFE2_DVDDD18
VAFE2_AVDD25_1E17
VAFE2_AVDD25_2D16
VAFE2_DVDD25D17
VAFE3_DVDDD9
VAFE3_AVDD25_1D8
VAFE3_AVDD25_2E8
VAFE3_AVDD25_3F9
VAFE3_DVDD25E9
PLL_AUD_AVDDG25
PLL_MAIN_AVDDK4
PLL_MIPS_AVDDAD25
PLL_VAFE_AVDDD11
TVM_OSC_AVDDAE7
AUX_AVDD33U6
AADC_AVSSF20
ADACA_AVSSG22
ADACC_AVSSG21
ADACD_AVSSF22
EPHY_AVSSF23
HDMI0_AVSS_1F6
HDMI0_AVSS_2G6
LT0VSS_1AB22
LT0VSS_2AB21
LT0VSS_3AB19
LT0VSS_4AC19
LT0VSS_5AB18
LT0VSS_6AB17
LT0VSS_7AC17
SPDIF_IN_AVSSF15
USB_AVSS_1G7
USB_AVSS_2G8
VDAC_AVSSG9
VAFE2_VSS_1G20
VAFE2_VSS_2E18
VAFE2_VSS_3G18
VAFE2_VSS_4G17
VAFE2_VSS_5F18
VAFE2_VSS_6G16
VAFE2_VSS_7F16
VAFE3_VSS_1G13
VAFE3_VSS_2G12
VAFE3_VSS_3F12
VAFE3_VSS_4G11
VAFE3_VSS_5G10
VAFE3_VSS_6F10
PLL_MIPS_AVSS AD26
PLL_VAFE_AVDD25D12
TVM_OSC_AVSSAC7
R232-*1
4.7K
FRC2_RESET
NFM18PS105R0JC233
6.3V
OUTIN
GND
NFM18PS105R0JC2446.3V
OUTIN
GND
NFM18PS105R0JC204
6.3V
OUTIN
GND
R28710KWIFI
C202390pF50V
C206390pF50V
C208390pF50V
C210390pF50V
BCM_C0C210-*1220pF50V
BCM_A0/B0
C212390pF50V
C214390pF50V
C2241uF25VOPT
C2260.1uF16VOPT
C2324.7uF10V
L220
MLG1005S22NJT
POWER 2.5V
MAIN POWER
closed to soc
CORE 0.9V
close to soc
50
BCM35230
POWER 3.3V
2
MODEL_OPT_2
LOW
MODEL OPTION
HIGH
HDFHD
LCDOLED
16001333
Support
DDR speed
MODEL_OPT_3
MODEL_OPT_4
MODEL_OPT_5
MODEL_OPT_6
MODEL_OPT_7 Enable Disable
Not Support
Not SupportSupport
MODEL_OPT_0
MODEL_OPT_1
00 11
1 100
NO_FRCBCMinternalFRC
LG FRC2externalURSA5
T2 Tuner
S Tuner
PHM
use only for A0/B0 chip
Place as close as possible to the pad
Place as close as possible to the padVery close to R22 BallPlace Cap
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATESSPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FORTHE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
DSUB_B+
C305 1uF 10V
INCM_VID_AV2
INCM_G
C307 1uF 10V
INCM_G
C330 0.1uF
INCM_AUD_AV2
R328 100
SC/COMP2_L_IN
R31736
R327 100
C311 1uF 10V
R326 100
R324 0
C322 0.1uF
C335 0.1uF
INCM_SIF
SC_B/COMP2_Pb
HP_LOUT_P
SC_RE2INCM_AUD_PC
C319 0.1uF
C306 1uF 10V
AUD_SCK
INCM_B
DSUB_G+
C33922pFOPT
C30233pF50V
AV1_R_IN
INCM_VID_SC/COMP2
C320 0.1uF
SC/COMP2_R_IN
DSUB_VSYNC
TU_RESET_SUB
DSUB_HSYNC
R32012KOPT
C334 0.1uF
INCM_R
C328 0.1uF
R30436
INCM_VID_COMP1
C33822pF
OPT
INCM_TUNER
PC_R_IN
SDA3_3.3V
SCL3_3.3V
R30336
SC_RE1
AUD_MASTER_CLK
C312 1uF 10V
AV2_CVBS_IN C303 0.1uF
R329 100
C336 0.1uF
INCM_AUD_PC
C324 0.1uF
SC_R/COMP2_Pr
HP_ROUT_N
HP_DET
C34033pF
OPT
C33722pF
OPT
C329 0.1uF
INCM_VID_SC
C314 1uF 10V
SC_CVBS_IN
INCM_VID_AV1
SC_FB
R31636
HP_ROUT_P
TU_SIF
AUD_LRCH
C332 0.1uF
C310 1uF 10V
C323 0.1uFINCM_B
C313 1uF 10V
C325 0.1uF
R31910KOPT
R306751%OPT
SCART1_Lout_N
M_REMOTE_TX
R31136
SCART1_Lout_P
C321 0.1uF
INCM_TUNER
TU_RESET
INCM_AUD_SC/COMP2
AV1_CVBS_IN
R31412K
PC_L_IN
R322 0
C333 0.1uF
R323 0
C318 0.1uF
C316 1uF 10V
DSUB_R+
C331 0.1uF
INCM_AUD_SC/COMP2
SCART1_Rout_P
+3.3V_Normal
INCM_SIF
C317 0.1uF
INCM_AUD_AV2
INCM_R
TU_CVBS
AV1_L_IN
C315 1uF 10V
R315120OPT
S2_RESET
C326 0.1uF
INCM_VID_AV2
C327 0.1uF
INCM_AUD_AV1
COMP1_Pb
C304 0.1uF
INCM_VID_AV1
SCART1_Rout_N
INCM_VID_COMP1
AV2_R_IN
C309 1uF 10V
C30133pF50V
AV1_CVBS_DET
R31310K
AV2_L_IN
SC_G/COMP2_Y
COMP1_Y
HP_LOUT_N
SPDIF_OUT
+2.5V_BCM35230
C308 1uF 10V
R321 0
R305240OPT
AUD_LRCK
+2.5V_BCM35230
INCM_VID_SC/COMP2
INCM_AUD_AV1
R31236
/RST_HUB
COMP1_Pr
R3021.2K
R3011.2K
LGE35230(BCM35230KFSBG)IC101
NON_BCM_CAP
VI_RB6
VI_INCM_RA6
VI_GC7
VI_INCM_GA7
VI_BB7
VI_INCM_BC8
HSYNC_INC13
VSYNC_INA13
VI_Y1C9
VI_PR1A9
VI_PB1B9
VI_INCM_COMP1B8
VI_SC_R1C11
VI_SC_G1A10
VI_SC_B1B10
VI_INCM_SC1C10
VI_FB_1/GPIOD10
VI_FS1F13
VI_SC_R2A12
VI_SC_G2C12
VI_SC_B2B12
VI_INCM_SC2B11
VI_FB_2/GPIOE12
VI_FS2E14
VI_L1E15
VI_C1_1F17
VI_INCM_LC1_1E16
VI_C1_2F14
VI_INCM_LC1_2E11
VI_CVBS1C18
VI_INCM_CVBS1B18
VI_CVBS2A18
VI_INCM_CVBS2C19
VI_CVBS3A19
VI_INCM_CVBS3B19
VI_CVBS4C20
VI_INCM_CVBS4B20
VI_SIF1_1E19
VI_INCM_SIF1_1D19
VI_SIF1_2E10
VI_INCM_SIF1_2F11
LGE35230(BCM35230KFSBG)IC101
NON_BCM_CAP
SPDIF_INC_PB15
SPDIF_INC_NC15
SPDIF_IND_PC14
SPDIF_IND_NB14
I2SSCK_IN/GPIOG4
I2SWS_INF4
I2SSD_IN/GPIOG5
AADC_LINE_L1C25
AADC_LINE_R1B24
AADC_INCM1A24
AADC_LINE_L2E22
AADC_LINE_R2E23
AADC_INCM2D23
AADC_LINE_L3C24
AADC_LINE_R3C23
AADC_INCM3B23
AADC_LINE_L4E21
AADC_LINE_R4D21
AADC_INCM4D22
AADC_LINE_L5B22
AADC_LINE_R5C22
AADC_INCM5A22
AADC_LINE_L6F21
AADC_LINE_R6D20
AADC_INCM6E20
AADC_LINE_L7A21
AADC_LINE_R7C21
AADC_INCM7B21
I2SSCK_OUTA/GPIOAF8
I2SWS_OUTA/GPIOAF9
I2SSD_OUTA0/GPIOAG9
I2SSOSCK_OUTA/GPIOAC9
I2SSD_OUTA1/GPIOAD8
I2SSD_OUTA2/GPIOAD9
I2SSCK_OUTC/GPIOE2
I2SWS_OUTC/GPIOF2
I2SSD_OUTC/GPIOE3
I2SSOSCK_OUTC/GPIOF3
I2SSCK_OUTD/GPIOG2
I2SWS_OUTD/GPIOG3
I2SSD_OUTD/GPIOG1
I2SSOSCK_OUTD/GPIOH1
SPDIF_OUTA/GPIOB13
AUDMUTE_0/GPIOAG8
AUDMUTE_1E13
ADAC_AL_NC28
ADAC_AL_PC27
ADAC_AR_ND28
ADAC_AR_PD27
ADAC_CL_NC26
ADAC_CL_PA27
ADAC_CR_NB27
ADAC_CR_PB28
ADAC_DL_NB25
ADAC_DL_PA25
ADAC_DR_NA26
ADAC_DR_PB26
R3100
R3180
R325 0NON_EU
R325-*1
10
EU
LGE35230IC101-*1
BCM_CAPVI_R
B6
VI_INCM_RA6
VI_GC7
VI_INCM_GA7
VI_BB7
VI_INCM_BC8
HSYNC_INC13
VSYNC_INA13
VI_Y1C9
VI_PR1A9
VI_PB1B9
VI_INCM_COMP1B8
VI_SC_R1C11
VI_SC_G1A10
VI_SC_B1B10
VI_INCM_SC1C10
VI_FB_1/GPIOD10
VI_FS1F13
VI_SC_R2A12
VI_SC_G2C12
VI_SC_B2B12
VI_INCM_SC2B11
VI_FB_2/GPIOE12
VI_FS2E14
VI_L1E15
VI_C1_1F17
VI_INCM_LC1_1E16
VI_C1_2F14
VI_INCM_LC1_2E11
VI_CVBS1C18
VI_INCM_CVBS1B18
VI_CVBS2A18
VI_INCM_CVBS2C19
VI_CVBS3A19
VI_INCM_CVBS3B19
VI_CVBS4C20
VI_INCM_CVBS4B20
VI_SIF1_1E19
VI_INCM_SIF1_1D19
VI_SIF1_2E10
VI_INCM_SIF1_2F11
BCM35230
3MAIN AUDIO/VIDEO 50
Run Along DSUB_R Trace
PHONE JACK
Near
TU2101/2TU2201/2/3
Near
Near
AUDIO INCM
JK1104
Near
Near
Near
JK1102
Route Between PC_L_IN & PC_R_IN Trace
Route Between AV2_L_IN & AV2_R_IN Trace
Run Along AV1_CVBS Trace
JK1102
Run Along TUNER_CVBS_IF_P Trace
JK1103JK2501
Run Along DSUB_G Trace
Run Along COMP_Y_IN,COMP_Pr_IN,COMP_Pb_IN Trace
Run Along COMP_Y_IN,COMP_Pr_IN,COMP_Pb_IN/SC R,G,B Trace
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATESSPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FORTHE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATESSPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FORTHE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATESSPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FORTHE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATESSPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FORTHE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
CI_TS_DATA[1]
NAND_DATA[6]
FE_TS_DATA[3]
PCM_MDI[3]
NAND_DATA[5]
CI_DATA[1]
PCM_ADDR[2]
PCM_ADDR[4]
PCM_ADDR[9]
FE_TS_DATA[2]
CI_TS_DATA[5]
CI_DATA[6]
FE_TS_DATA[1]
PCM_TS_DATA[2]
CI_DATA[7]
PCM_ADDR[12]
CI_ADDR[1]
NAND_DATA[2]
CI_MDI[5]PCM_MDI[5]
PCM_MDI[7]
CI_DATA[2]
PCM_TS_DATA[4]
CI_DATA[0]
CI_MDI[4]
CI_MDI[0]
CI_TS_DATA[7]
CI_MDI[1]
CI_DATA[6]
CI_MDI[5]
NAND_DATA[4]
CI_MDI[0]
FE_TS_DATA[0]
CI_ADDR[14]
CI_ADDR[10]
CI_TS_DATA[2]
PCM_MDI[6]
PCM_MDI[2]
PCM_TS_DATA[5]
CI_DATA[0]
CI_TS_DATA[6]
CI_MDI[3]
CI_MDI[6]
PCM_TS_DATA[3]
NAND_DATA[0]
CI_MDI[6]
CI_ADDR[8]
PCM_TS_DATA[6]
FE_TS_DATA[4]
PCM_MDI[4]
PCM_MDI[0]
PCM_TS_DATA[1]CI_TS_DATA[0]
CI_ADDR[6]
NAND_DATA[7]
CI_MDI[2]
PCM_ADDR[3]
CI_DATA[7]
CI_DATA[5]
CI_MDI[7]
FE_TS_DATA[6]
CI_MDI[4]
PCM_ADDR[7]
PCM_TS_DATA[7]
CI_ADDR[0]
PCM_ADDR[11]
CI_TS_DATA[4]
PCM_TS_DATA[0]
CI_MDI[1]
FE_TS_DATA[5]
CI_DATA[3]
CI_MDI[7]
CI_DATA[3]
CI_DATA[2]
CI_ADDR[5]
CI_DATA[1]
CI_DATA[4]
CI_TS_DATA[3]
CI_DATA[5]
CI_DATA[4]
CI_MDI[2]
CI_MDI[3]
PCM_MDI[1]
FE_TS_DATA[7]
NAND_DATA[3]
PCM_ADDR[13]
NAND_DATA[1]
CI_TS_SYNC
R1954 22CI
R197022
CI
R1961 22CI
P190110067972-000LF CI
G1G2
57TS_OUT_CLK
21 ADDR12
52VPP
16 /IRQA
10 ADDR11
47TS_IN0
41TS_OUT7
5 DAT6
36/CI_DET1
59CI_WAIT
23 ADDR6
45IOWR
54TS_IN5
18 VPP
49TS_IN2
43VS1
13 ADDR13
7 /CARD_EN1
38TS_OUT4
2 DAT3
25 ADDR4
56TS_IN7
20 TS_IN_CLK
51VCC
15 /WR_EN
9 /O_EN
46TS_IN_SYN
40TS_OUT6
4 DAT5
35GND
58CI_RESET
22 ADDR7
53TS_IN4
17 VCC
11 ADDR10
48TS_IN1
42CARD_EN2
12 ADDR8
6 DAT6
37TS_OUT3
1 GND
24 ADDR5
55TS_IN6
19 TS_IN_VAL
50TS_IN3
44IORD
14 ADDR14
8 ADDR10
39TS_OUT5
3 DAT4
26 ADDR360INPACK
27 ADDR261REG
28 ADDR162TS_OUT_VAL
29 ADDR063TS_OUT_SYN
30 DAT064TS_OUT0
31 DAT1
32 DAT2
33 /IO_BIT
34 GND
65TS_OUT1
66TS_OUT2
67/CI_DET2
68GND
69
R1902 22 CI
R193310KOPT
R1917 22 OPT
L1901
BLM18PG121SN1D
CI
R1909 22 OPT
R1953 22CI
R1919 22 OPT
CI_TS_DATA[3]
+3.3V_CI
AR1903 22 OPT
R1986 22CI
NIM_TS_SYNC
/PCM_WECI 15
/CI_EN1
CI_ADDR[5]
CI_ADDR[0]
R1960 22CI
PCM_ADDR[13]
NIM_VAL_ERR R192910KOPT
/PCM_IRQA
C19094.7uF16VOPT
C19140.1uF16V
CI
CI_TS_DATA[6]
PCM_TS_CLK
R1922 22 CI
+5V_CI_ON
/CI_CE1
R1957 22CI
CI_ADDR[11]
/CI_CE1
C1912
0.1uF
16V
CI
R194110KCI
R1927 22 CI
R1967 22 CI
NAND_REb
+3.3V_Normal
R1938 62CI
+5V_CI_ON
R197110KCI
R1951 22CI
CI_MDI[0-7]
R1907 22 CI
+3.3V_CI
/CI_CD2
+5V_CI_ON
/CI_CD1
R194010K
OPT
NIM_TS_CLK
C19010.1uF16V
OPT
+5V_Normal
PCM_TS_DATA[0-7]
R194610KOPT
+3.3V_CI
PCM_ADDR[9]
NAND_WEb
R1910 22 OPT
R1901 22 CI
C19020.1uF16V
OPT
/PCM_IORD
Q1902AO3407A
CI
G
DS
/CI_CD2
CI_ADDR[1]
CI_TS_CLK
C19110.1uF16V
OPT
R196910KCI
CI_ADDR[9]
C19150.1uF16V
OPT
R1980 100 CI
R1945 10K
OPT
R196610KCI
R198510KCI
R1936 0
OPT
R1949 22CI
R1937 62
CI
R1959 22CI
PCM_MCLKI
PCM_TS_SYNC
C19040.1uFCI
CI_MIVAL_ERR
CI_ADDR[13]
CI_MISTRT
R1947 22CI
PCM_ADDR[4]
PCM_MDI[0-7]
PCM_ADDR[9]
+3.3V_CI
R1931 22 CI
CI_ADDR[12]
R1918 22 OPT
R1903 22 CI
PCM_MIVAL_ERR
R193910KCI
PCM_ADDR[12]
PCM_ADDR[12]
IC190374LVC245A
CI
3A1
2A0
4A2
1DIR
6A4
5A3
7A5
8A6
9A7
10GND
11B7
12B6
13B5
14B4
15B3
16B2
17B1
18B0
19OE
20VCC
CI_TS_DATA[0-7]
NAND_REb
PCM_ADDR[13]
R1956 22CI
/PCM_OE CI 9
CI_ADDR[2]
CI_ADDR[0]
PCM_ADDR[3]
+3.3V_CI
IC190474LVC1G32GW
CI
3GND
2A
4 Y
1B 5 VCC
+3.3V_CI
CI_MDI[0-7]
CI_TS_VAL
PCM_ADDR[2]
CI_TS_DATA[0]
R1948 22CI
CI_ADDR[10]
C19080.1uF
CI
CI_ADDR[3]
C19060.1uF16V
OPT
R1958 22CI
R19424.7K
CI
R1934 10K OPT
/PCM_IOWR
R1965
47
CI
FE_TS_DATA[0-7]
/PCM_OE
/PCM_WAIT
CI_TS_DATA[1]
NAND_REb
NAND_RBb
R1962 22CI
C19070.1uF
CI
AR1904 100 CI
/PCM_IOWRCI 45
PCM_5V_CTL
CI_MISTRT
CI_TS_VAL
R1963 22CI
L1902BLM18PG121SN1D
CI
PCM_TS_VAL
GND
+3.3V_CI
CI_MCLKI
R1952 22CI
PCM_ADDR[7]
R1935 0 CI
R1904 22 CI CI_TS_DATA[5]
/CI_EN1
/CI_EN1
Q19012SC3052CI
E
B
C
CI_DATA[0-7]
R1964 22CI
NAND_DATA[0-7]
NAND_CLE
CI_ADDR[8]
PCM_MISTRT
CI_TS_CLK
R1928 22 CI
R193210KCI
R197210KCI
CI_ADDR[4]
/CI_CD1
R197310KCI
CI_MIVAL_ERR
+5V_CI_ON
CI_ADDR[6]
+5V_CI_ON
/PCM_CE1
PCM_ADDR[7]
PCM_RST
/CI_EN1
R1976 22 CI
R1974 22 CI
NAND_WEb
CI_ADDR[7]
+5V_CI_ON
CI_ADDR[1]
+3.3V_CI
CI_TS_DATA[2]
CI_DATA[0-7]
CI_ADDR[14]
PCM_ADDR[2]
PCM_ADDR[11]
PCM_ADDR[4]
R1920 22 CI
R1926 22 CI
R1905 22 CI
C190510uF10VCI
R194322K
CI
C19030.1uF
16V
OPT
R1915 22 OPT
AR1905 100 CI
IC190174LVC125APWCI
31Y
21A
42OE
11OE
62Y
52A
7GND
83Y
93A
103OE
114Y
124A
134OE
14VCC
/PCM_WE
/PCM_IORDCI 44
+5V_CI_ON
R1906 22 CI
R1955 22CICI_TS_SYNC
C1910 0.1uF
CI
PCM_ADDR[11]
R196810KCI
/CI_CE2
/PCM_CE1 CI 7
R1944 0
OPT
R1950 22CI
R1921 22 CI
/CI_CE2
CI_TS_DATA[7]
R1908 22 CI
+5V_CI_ON
CI_DET
CI_TS_DATA[4]
CI_MCLKI
PCM_ADDR[3]
IC1905
74LVC245ACI
3A1
2A0
4A2
1DIR
6A4
5A3
7A5
8A6
9A7
10GND
11B7
12B6
13B5
14B4
15B3
16B2
17B1
18B0
19OE
20VCC
R1916 22 OPT
C19130.1uF16V
CI
R193010KOPT
R197510KCI
IC190274AHC08PW
CI
31Y
21B
42A
11A
62Y
52B
7GND
83Y
93A
103B
114Y
124A
134B
14VCC
C191612pF50VOPT
R19872.2KCI
AR1901 100 CI
AR1902 100 CI
R1924 100 CI
R1925 100 CI
R1923 220 CI
R197710KOPT
1ST : EBK60752501, 2ND : EBK61011501
Close to CI Slot
3,3V_CI POWER
Close to Tuner
Q1901
NAND F/M Data
CI DETECT
1ST : 0TRIY80001A 2ND : 0TR387500AA
Close to CI Slot
Close to BCM35230
Close to BCM35230
CI
BCM INT Demod
CI TS OUTPUT
CI CONTROL INTERFACE
OE DIR CI_DATA NAND_DATA L L OUTPUT INPUT L H INPUT OUTPUT H X Z Z
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATESSPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FORTHE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
R230233
LNB
LNB_TX
L2301
33UHSP-7850_33
LNB
C232468uF35VLNB
C23030.1uF50VLNB
R23030
LNB
+3.3V_Normal
C2304 0.1uF
LNB
SCL1_3.3V
C230568uF35VLNB
D2301
40V
SMAB34LNB
C2310
27pF
OPT
DCDC_GND
L2302BLM18PG121SN1D
LNB
A_GND
LNB_OUT
C2308
0.22uF
LNB
+12V
+12V_LNB
D2304
40V
SMAB34
LNB
A_GND
DCDC_GND
C23120.1uF50V
LNB
A_GND
A_GND
A_GND
D2303
40VSMAB34
LNB
R23140
C2309
27pF
OPT
DCDC_GND
+12V_LNB
A_GND
A_GND
A_GND
C231110uF25VLNB
R230133
LNB
C23070.01uF
50VLNB
SDA1_3.3V
C23021uF50VLNB
LNB_INT
R2304
4.7KLNB
DCDC_GND
A_GND
C2306 22000pF
LNB
C23010.22uF25V
IC2301A8290SETTR-T
LNB
1BOOST
3TCAP
7TDI
9VREG
10
SDA
11
ADD
12
SCL
13
NC_2
14
IRQ
15 NC_3
16 NC_4
17 NC_5
18 NC_6
19 BFC
20 NC_7
21 NC_8
22
BFO
23
NC_9
24
BFI
25
VIN
26
LX
27
GNDLX
28
LNB
5TDO
8GND
6EXTM
4NC_1
2VCP 29
[EP]
D2302
1000V
US1M(suzhou)
LNB
R23130
DCDC_GND and A_GND are connected in pin#27
LNB
Input trace widths should be sized to conduct at least 3A
close to Boost pin(#1)
57
DVB-S2 LNB Part Allegro
23
close to VIN pin(#25)
2A
DCDC_GND and A_GND are connected
3A
Ouput trace widths should be sized to conduct at least 2A
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATESSPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FORTHE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATESSPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FORTHE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATESSPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FORTHE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATESSPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FORTHE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATESSPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FORTHE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATESSPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FORTHE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATESSPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FORTHE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
FE_TS_DATA[1]
FE_TS_DATA[4]
FE_TS_DATA[3]
FE_TS_DATA[6]
FE_TS_DATA[7]
FE_TS_DATA[5]
FE_TS_DATA[2]
FE_TS_DATA[0]
C440833pFOPT
TU_TS_VAL
+3.3V_TU
+3.3V_S2_TU
+5V_TU
R4421
2.2KBOOSTER
C441333pFS
C44090.1uFS
C44140.1uF16VS
FE_TS_DATA[0-7]
C44010.1uF16V
OPT
R4419
0
BOOSTER
SCL1_3.3V
TU_RESET
R4423100K
R44311K
OPT
C4405100pF50V
S
+3.3V_TU
C4423100pF50V
TU_CVBS
R440151
S
TW9910_RESET
C44300.1uF16V
R4436200
C44100.1uF16VS
TU_TS_CLK
+3.3V_TU
+1.25V_TU
+5V_TU
L4406
BLM18PG121SN1D
BOOSTER
R44321K
OPT
C441810uF10V
S
+1.8V_TU
R4429
0OPT
C4406100pF50VS
R4418
47
R4425
10K
BOOSTER
IC4404NL17SZ08DFT2G
NONE_T2
3GND
2IN_A
4OUT_Y
1IN_B
5VCC
R4403100
S
R4430
0
C44190.1uF16VS
+2.5V_TU
+3.3V_TU
Q4402
MMBT3906(NXP) S
E
B
C
TU_TS_ERR
C4407100pF50VS
Q4401
MMBT3906(NXP)
BOOSTER
E
B
C
+2.5V_TU
TS_VAL_ERR
R442682
S
Q4404MMBT3906(NXP)
E
B
C
LNB_TX
R44390
NONE_T2
R442710K
BOOSTER
C44200.1uF16V
R4435200
Q4405MMBT3906(NXP)
E
B
C
C44250.01uF50VBOOSTER
R44224.7K
S
C4428
0.1uF16V
NONE_S
TU_TS_ERR
TU_TS_VAL
TU_SIF
+1.25V_TU
RF_SWITCH_CTL_2
RF_BOOSTER_CTL
R4434220
Q44032SC3052
E
B
C
SDA0_3.3V R44280
NONE_S
+3.3V_S2_LNB
R4424470S
C4411100pF50V
Non_S
LNB_OUT
C44120.1uF16VS
TU_RESET_SUB
C4415100pF50VS
+5V_TU
ATV_OUT
R44460
NONE_T2
R440275OPT
C442910uF10V
C4424
0.1uF16V
S2_RESET
R44371
+5V_TU
C440218pF50V
+3.3V_S2_DE
SDA1_3.3V
C4403
1000pF
50VS
C4416100pF50V
R4433220
R4420100
R44062.2KS
TU_TS_SYNC
+5V_TU
C440418pF50V
R44450
T2
SCL0_3.3V
C44270.1uF16V
C44170.1uF16V
Non_S
R4407
0BOOSTER
R4408 0S
C44310.1uF16VOPT
AR4401
47NON_S
AR4402
47NON_S
AR4403
47NON_S
C44390.1uF16V
OPT
TS_VAL_ERR
NIM_TS_CLK
R44140
R44130
NIM_VAL_ERR
R44150
TU_TS_SYNC
TU_TS_CLK
NIM_TS_SYNC
R443811K1%
R441620K1%
+3.3V_TU
R441110K
IC4403AP2132MP-2.5TRG1
EAN61387601
3
VIN
2
EN
4
VCTRL
1
PG
5
NC
6
VOUT
7
ADJ
8
GND
9
[EP]
POWER_ON/OFF2_1
C44341uF
OPT
R441711K1%
C4453
10uF
16V
C4432
10uF
16V
+1.25V_TU
R4412
10K
OPT
+5V_Normal
0.1uFC4438
OPT
C44450.1uF16V
L4408MLB-201209-0120P-N2
S
+5V_TU
C44330.1uF
16V
C44520.1uFS
C44410.1uF
16V
C444710uF10V
S
L4404MLB-201209-0120P-N2
S
C44430.1uFOPT
C444022uF16V
+3.3V_S2_DE
C44420.1uF
16V
C444422uF16V
C443522uF16V
C44370.1uF16VS
C443610uF10V
S
+3.3V_Normal
C444810uF10V
S
+3.3V_S2_TU
C44490.1uF
16V
L4402
MLB-201209-0120P-N2
R4410
1
S
+3.3V_TU
L4403MLB-201209-0120P-N2
S
+3.3V_TU
+5V_Normal
C44500.1uFS
C44510.1uF
S
+3.3V_TU
+1.8V_TU
+3.3V_S2_LNB
C444610uF10V
S
IF_AGC
IF_P
RF_SWITCH_CTL
IF_N
R44470 S
R44480 S
L4409BLM18PG121SN1D
S
C445410uF16V
OPTC44554700pF50V
OPTC4456100uF16V
OPT
L4401MLB-201209-0120P-N2
C445710uF16V
OPT
C442162pF50VNon_S
C442262pF50VNon_S
C445820pF50V
Non_S
C445920pF50VNon_S
L4410
1uHNon_S
L4411Non_S
270nH
L4412Non_S
270nH
L4411-*1
0S
L4412-*1
0S
C446010uF6.3V
S
C44611000pF50V
OPT
R4404 22
R4405 22
C446210uF10V S
C44630.1uF16V
OPT
D4401
20V3.0SMCJ20A(suzhougrande)
S
IC4402
AZ1117BH-1.8TRE1
S
1
ADJ/GND
2 OUT3IN
AR4401-*133
S
AR4403-*133
S
AR4402-*133
S
R4418-*133
S
TU4401TDFR-G136D
HORIZONTAL_T
1NC_1
2BST_CNTL
3+B1[5V]
4NC_2[RF_AGC]
5NC_3
6SCLT
7SDAT
8NC_4
9SIF
10NC_5
11VIDEO
12GND
13+B2[1.2V]
14+B3[3.3V]
15RESET
16+B4[2.5V]
17SCL
18SDA
19ERR
20SYNC
21VALID
22MCL
23D0
24D1
25D2
26D3
27D4
28D5
29D6
30D7
31
SHIELDC446422uF
OPT
C44260.1uF
S
TU4401-*1TDFR-G236D
HORIZONTAL_T2
1NC_1
2BST_CNTL
3+B1[5V]
4NC_2[RF_AGC]
5NC_3
6SCLT
7SDAT
8NC_4
9SIF
10NC_5
11VIDEO
12GND
13+B2[1.2V]
14+B3[3.3V]
15RESET
16+B4[2.5V]
17SCL
18SDA
19ERR
20SYNC
21VALID
22MCL
23D0
24D1
25D2
26D3
27D4
28D5
29D6
30D7
31
SHIELD
TU4402
TDFQ-G001D
HORIZONTAL_S
1NC_1
2NC_2
3NC_3
4S2_TU[3.3V]
5NC_4
6TU_SCL
7TU_SDA
8T_1.8V
9T_SIF
10NC_5
11T_CVBS
12GND_1
13TD_1.2V
14T_3.3
15T_TU_RESET
16NC_6
17TD_SCL
18TD_SDA
19T/C/S2_ERROR
20T/C/S2_SYNC
21T/C/S2_VALID
22T/C/S2_MCL
23T/C/S2_D0
24T/C/S2_D1
25T/C/S2_D2
26T/C/S2_D3
27T/C/S2_D4
28T/C/S2_D5
29T/C/S2_D6
30T/C/S2_D7
31S2_1.25V
39
SHIELD
32S2_RESET
33S2_3.3V
34S2_F22
35S2_SCL
36S2_SDA
37GND_2
38S2_LNB
R4449
2.2K
S
IC4401AP2114H-2.5TRG1
GND
VOUTVIN
T2_CN_F/NIM_BR: use EU_DVB-T2, China F/NIM, BRZIL F/NIM
H/NIM: use H/NIM(H/NIM, DVB-T/C/S2 combo Tuner)
F/NIM
SCART: use Scart Jack
close to Tuner
Surge protectioin
Non_S: not use DVB-T/C/S2 combo Tuner(use H/NIM and F/NIM)
* DVB-T/C/S2 combo Tuner: DVB-T/C is H/NIM, and DVB-S2 is F/NIM
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATESSPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FORTHE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATESSPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FORTHE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATESSPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FORTHE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATESSPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FORTHE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATESSPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FORTHE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
FRC_DQU[5]
FRC_DQU[0]
FRC_DQL[0]
FRC_DQU[7]
FRC_A[0]
FRC_DQL[1]
FRC_DQU[4]
FRC_A[6]
FRC_A[10]
FRC_A[4]
FRC_DQL[5]
FRC_A[2]
FRC_A[8]
FRC_A[9]
FRC_A[7]
FRC_A[1]
FRC_A[5]
FRC_A[3]
FRC_DQU[6]
FRC_A[11]
FRC_DQL[2]
FRC_A[12]
FRC_DQU[2]
FRC_A[13]
FRC_DQL[4]
FRC_DQL[3]
FRC_DQU[1]
FRC_DQL[7]
FRC_DQU[3]
FRC_DQL[6]
LVDS_TXD2P
SPI_DO
AVDD_LVDS_3.3V
LVDS_TXD3P
+1.26V_FRC
PWM1
C52080.1uF
R5210
10K
OPT
AVDD33
TXCCLKP
DVDD_DDR_1V
AVDD_PLL
TXD3P
R5211
10K
R5217
10K
OPT
R5231
100
R5226
100
TXB3P
TXDCLKN
TXC3N
LVDS_TXD3N
C5240
0.1uF
TXD2P
AVDD_PLL
SPI_SCLK
TXD4P
VDDC10
LVDS_TXD1P
TXA2N
LVDS_TXC1N
C52200.1uF
C52170.1uF
C52380.1uF
SCL2_+3.3V_URSA
TXDCLKP
VDDC10
C521022uF10V
2D/3D_CTL
LVDS_TXA1P
C52390.1uF
+3.3V_FRC
C52330.1uF
R5212
10K
OPT
R5213
10K
LVDS_EXT_URSA5
FRC_DQSL
R5242
33
TXB3N
URSA_MODEL_OPT_1
LVDS_TXB1N
TXB0P
AVDD33
C52270.1uF
LVDS_TXB1P
LVDS_TXACLKP
TXB0N
LVDS_TXC0N
TXD2N
C52070.1uF
C52010.1uF
TXB1P
SPI_DI
C52320.1uF
R5251 33
R5208
10K
OPT
R5225
100
+1.5V_FRC_DDR
LVDS_TXA4N
R5237
1M
R5215
10K
OPT
VDD33
LVDS_TXC0P
C52250.1uF
DVDD_DDR_1V
SPI_SCLK
R5245
33
TXD4N
FRC_CASB
LVDS_TXC4N
C52310.1uF
+3.3V_FRC
TXC0P
TXC3P
R5204
10K
OPT
TXD0N
+3.3V_FRC
FRC_MCLK
P5201
12507WR-04L
URSA5_DEBUG
1
2
3
4
5
LVDS_TXD4P
SDA2_+3.3V_URSA
M1_SCLK
LVDS_TXB0N
R5209
10K
OPT
TXA1P
LVDS_TXC2P
TXD1P
TXB2N
SDA2_+3.3V_DB
C52050.1uF
FRC_DQL[0-7]
TXACLKP
LVDS_TXA1N
TXC2N
TXA0P
+3.3V_FRC
FRC_DQSU
URSA_MODEL_OPT_0
TXCCLKN
L5205CIC21J501NE
FRC_RASB
SCL2_+3.3V_DB
M2_SCLK
LVDS_TXC2N
FRC_BA0
C52340.1uF
R5230
100
LVDS_TXDCLKP
TXA3N
LVDS_TXD1N
R522333
AVDD_PLL
LVDS_TXA2P
URSA_MODEL_OPT_0
TXB1N
FRC_DQSUB
SW5201JS2235S
URSA5_DEBUG
3
2
1
4
5
6
FRC_WEB
TXA4P
PWM0
L5202CIC21J501NE
R5203
10K
LVDS_TXA0N
GPIO[1]
LVDS_TXD0N
C52360.1uF
R5224
100
R5214
10K
LVDS_S7M-PLUS
C521510uF6.3V
PWM0
C52190.1uF
TXD1N
LVDS_TXB3N
R5244
4.7K
R5206
10K
L/DIM_EDGE_42/47/55
SDA2_+3.3V_DB
GPIO[8]
M3_MOSI
R5234
100
L5206CIC21J501NE
R5221 4.7KOPT
R5249
33
+1.5V_FRC_DDR
FRC_ODT
3D_SYNC
LVDS_TXD2NR5216
10K
LVDS_TXCCLKP
M0_MOSI
LVDS_TXB4P
C52020.1uF
+3.3V_FRC
TXD3N
TXBCLKP
TXB4P
VDD33
TXC1P
TXC1N
R5238
0
LVDS_TXA0P
FRC_DQSLB
C52230.1uF
R5205
10K
L/DIM_EDGE_32/37
C52130.1uF
LVDS_TXBCLKP
AVDD_LVDS_3.3V
TXB4N
LVDS_TXB0P
L5204CIC21J501NE
VDDC10
R5235
100
LVDS_TXB2P
3D_SYNC_RF
URSA_MODEL_OPT_1
LVDS_TXB4N
LVDS_TXA3N
TXD0P
+3.3V_FRC
TXA0N
L5201CIC21J501NE
M0_SCLK
L_VS
TXA4N
R5202 22URSA5_DEBUG
2D/3D_CTL
R5232
100
+1.26V_FRC
SDA2_3.3V
M3_SCLK
TXB2P
AVDD_LVDS_3.3V
FRC_DML
TXC4N
LVDS_TXB2N
LVDS_TXA3P
R5250 33
SPI_CS
L5203CIC21J501NE
TXC2P
LVDS_TXC3N
FRC_A[0-13]
C52090.1uF
SPI_DO
R5241
0
LVDS_TXDCLKN
R5248
33
R5239
0
LVDS_TXCCLKN
R5218
10K
OPT
R5207
10K
C52160.1uF
SPI_CS
M1_MOSI
TXC4P
R5229
100
R5227
100
C52040.1uF
+1.5V_FRC_DDR
TXC0N
+3.3V_FRC
TXA3P
LVDS_TXACLKN
C52030.1uF
TXBCLKN
FRC_BA1
R5240
0
R5247
33
R5233
100
LVDS_TXC3P
LVDS_TXC4P
URSA_MODEL_OPT_2
LVDS_TXBCLKN
LVDS_TXC1P
LVDS_TXA4P
VDD33
FRC_DQU[0-7]
R5228
100
M2_MOSI
R5253 333D-SG
C52280.1uF
URSA_MODEL_OPT_2
C52060.1uF
C52140.1uF
SCL2_3.3V
FRC_MCLKB
SDA2_+3.3V_URSA
TXACLKN
FRC_DMU
FRC_CKE
R5201 22URSA5_DEBUG
TXA2P
LVDS_TXB3P
R5236
0
R5246
10K
PWM1
TXA1N
LVDS_TXA2N
LVDS_TXD0P
+3.3V_FRC
SCL2_+3.3V_URSA
AVDD33
LVDS_TXD4N
GPIO[1]
R522233
R5252
3.3K
SCL2_+3.3V_DB
R5220 4.7K OPT
C521122uF10V
SPI_DI
GPIO[8]
FRC_BA2
C52430.22uF6.3V
C52440.22uF6.3V
C52450.22uF6.3V
R52580
URSA5_MP
R52600OPT
R52610OPT
R52590
URSA5_MP
X5201
24MHz
C5242
13pF
C5241
13pF
C524622uF10V
FRC_DDR3_RESETB
C52471uF6.3V IC5202
W25X20BVSNIG
URSA5_FLASH_WINBOND_2M
3WP
2DO
4GND
1CS
5DIO
6CLK
7HOLD
8VCC
IC5202-*1MX25L2006EM1I-12G, HF
URSA5_FLASH_MACRONIX_2M
3WP
2SO/SIO1
4GND
1CS
5SI/S
6SCL
7HOL
8VCC
+3.3V_FRC
R52544.7K
URSA5_UO2_RESET
Q52012SC3052URSA5_UO2_RESET
E
B
C
R525522K
URSA5_UO2_RESET
FRC_RESET
R5243 33
URSA5_UO3_RESET
C52124.7uF16VURSA5_UO2_RESET
R521910K
OPT
Q5202AO3407A
URSA5_UO2_RESET
G
DS
R525610KOPT
R52622.2KURSA5_UO2_RESET
IC5201
LGE7303C
NON 21:9 Cinema
DDR3_A0/DDR2_NCP14
DDR3_A1/DDR2_A8G15
DDR3_A2/DDR2_NCN14
DDR3_A3/DDR2_A10L15
DDR3_A4/DDR2_A2H15
DDR3_A5/DDR2_A3L14
DDR3_A6/DDR2_A4G14
DDR3_A7/DDR2_A5N12
DDR3_A8/DDR2_A6G13
DDR3_A9/DDR2_A9N13
DDR3_A10/DDR2_RASZH14
DDR3_A11/DDR2_A11F15
DDR3_A12/DDR2_A0H13
DDR3_A13/DDR2_A12P13
DDR3_BA0/DDR2_BA2M12
DDR3_BA1/DDR2_CASZH12
DDR3_BA2/DDR2_A1L13
DDR3_MCLK/DDR2_MCLKF16
DDR3_MCLKZ/DDR2_MCLKZF17
DDR3_CKE/DDR2_ODTJ13
DDR3_ODT/DDR2_CKEK12
DDR3_RASZDDR2_WEZL12
DDR3_CASZ/DDR2_BA1K13
DDR3_WEZ/DDR2_BA0K14
DDR3_RESET/DDR2_A7M14
DDR3_DQSL/DDR2_DQSLN16
DDR3_DQSU/DDR2_DQSUM17
DDR3_DQSBL/DDR2_DQSBLM16
DDR3_DQSBU/DDR2_DQSBUM15
DDR3_DQML/DDR2_DQU5J15
DDR3_DQMU/DDR2_DQU4R16
DDR3_DQL0/DDR2_DQU3R17
DDR3_DQL1/DDR2_DQL0H17
DDR3_DQL2/DDR2_DQL6R15
DDR3_DQL3/DDR2_DQL7J17
DDR3_DQL4/DDR2_DQL3T17
DDR3_DQL5/DDR2_DQL2H16
DDR3_DQL6/DDR2_DQL1T15
DDR3_DQL7/DDR2_DQL5G16
DDR3_DQU0/DDR2_DQU7K15
DDR3_DQU1/DDR2_DQMLN15
DDR3_DQU2/DDR2_DQU2K17
DDR3_DQU3/DDR2_DQU6P17
DDR3_DQU4/DDR2_NCL17
DDR3_DQU5/DDR2_DQU1P16
DDR3_DQU6/DDR2_DQU0K16
DDR3_DQU7/DDR2_DQMUP15
I2CM_SCLD14
I2CM_SDAD15
I2CS_SCLP1
I2CS_SDAP2
DDR3_NC/DDR2_A13F14
DDR3_NC/DDR2_DQL4T16
VSS_1
D6
VSS_2
D7
VSS_3
D8
VSS_4
D9
VSS_5
E6
VSS_6
E7
VSS_7
E8
VSS_8
E9
VSS_9
E10
VSS_10
E16
VSS_11
F3
VSS_12
F6
VSS_13
F7
VSS_14
F8
VSS_15
F9
VSS_16
G1
VSS_17
G2
VSS_18
G4
VSS_19
G5
VSS_20
G6
VSS_21
G7
VSS_22
G8
VSS_23
G9
VSS_24
G17
VSS_25
H1
VSS_26
H2
VSS_27
H4
VSS_28
H5
VSS_29
H6
VSS_30
H7
VSS_31
H8
VSS_32
H9
VSS_33
H10
VSS_34
H11
VSS_35
J4
VSS_36
J5
VSS_37
J6
VSS_38
J7
VSS_39
J8
VSS_40
J9
VSS_41
J10
VSS_42
J11
VSS_43
J12
VSS_44
J14
VSS_45
J16
VSS_46
K4
VSS_47
K5
VSS_48
K6
VSS_49
K7
VSS_50
K8
VSS_51
K11
VSS_52
L6
VSS_53
L7
VSS_54
L8
VSS_55
L11
VSS_56
L16
VSS_57
M6
VSS_58
M7
VSS_59
M8
VSS_60
M11
VSS_61
M13
VSS_62
N6
VSS_63
N7
VSS_64
N8
VSS_65
N17
VSS_66
P3
VSS_67
P4
VSS_68
P5
VSS_69
P6
VSS_70
P7
VSS_71
P12
VSS_72
U16
NC
L9
HW_RESET
J3
TESTPIN_1
D1
TESTPIN_2
D2
TESTPIN_3
D3
TESTPIN_4
E1
TESTPIN_5
E2
TESTPIN_6
E3
TESTPIN_7
F1
TESTPIN_8
F2
M0_SCLK
C17
M0_MOSI
D16
M1_SCLK
D17
M1_MOSI
E15
M2_SCLK
E14
M2_MOSI
E13
M3_SCLK
E12
M3_MOSI
F13
SPI_CK
T9
SPI_CZ
U10
SPI_DI
U9
SPI_DO
T10
TXA0P/GCLK6/BLUE[7]C8
TXA0N/GCLK5/BLUE[6]C9
TXA1P/OPT_N/LK3/BLUE[9]B8
TXA1N/FLK/BLUE[8]A8
TXA2P/GREEN[1]A7
TXA2N/OPT_P/LK2/GREEN[0]B7
TXACLKP/RLV0N/GREEN[3]C6
TXACLKN/RLV0P/GREEN[2]C7
TXA3P/RLV1N/GREEN[5]B6
TXA3N/RLV1P/GREEN[4]A6
TXA4P/RLV2N/GREEN[7]A5
TXA4N/RLV2P/GREEN[6]B5
TXB0P/RLV3N/GREEN[9]C4
TXB0N/RLV3P/GREEN[8]C5
TXB1P/RLVCLKN/RED[1]B4
TXB1N/RLVCLKP/RED[0]A4
TXB2P/RLV4P/RED[3]/EPI_A3PA3
TXB2N/RLV4N/RED[2]/EPI_A3NB3
TXBCLKP/RLV5N/RED[5]/EPI_A2PC2
TXBCLKN/RLV5P/RED[4]/EPI_A2NC3
TXB3P/RLV6N/RED[7]/EPI_A1PB2
TXB3N/RLV6P/RED[6]/EPI_A1N/A2
TXB4P/RLV7N/RED[9]/EPI_A0PC1
TXB4N/RLV7P/RED[8]/EPI_A0NB1
TXC0P/SOEC16
TXC0N/POLB17
TXC1P/GSP_RB16
TXC1N/GSP/VSTA16
TXC2P/GOE/GCLK1A15
TXC2N/GSC/GCLK3B15
TXCCLKP/LLV0NC14
TXCCLKN/LLV0PC15
TXC3P/LLV1NB14
TXC3N/LLV1PA14
TXC4P/LLV2NA13
TXC4N/LLV2PB13
TXD0P/LLV3NC12
TXD0N/LLV3PC13
TXD1P/LLVCLKNB12
TXD1N/LLVCLKPA12
TXD2P/LLV4N/EPI_B3PA11
TXD2N/LLV4P/EPI_B3NB11
TXDCLKP/LLV5N/BLUE[1]/EPI_B2PC10
TXDCLKN/LLV5P/BLUE[0]/EPI_B2NC11
TXD3P/LLV6N/BLUE[3]B10
TXD3N/LLV6P/BLUE[2]/EPI_B1NA10
TXD4P/LLV7N/BLUE[5]/EPI_B0PA9
TXD4N/LLV7P/BLUE[4]/EPI_B0NB9
MOD_GPIO0/VDD_ODD/HSYNCD10
MOD_GPIO1/VDD_EVEN/VSYNCD11
MOD_GPIO2/PWM13/GCLK4/LCKD12
MOD_GPIO3/PWM14/GCLK2/LDED13
PWM0/SCAN_BLK1U12
PWM1/SCAN_BLK2T12
LPLL_FBCLKG3
LPLL_OUTCLKE17
LPLL_REFINH3
AVDD_1
F4
AVDD_2
F5
AVDD_DDR_C_1
F10
AVDD_DDR_C_2
G10
AVDD_DDR_D_1
F11
AVDD_DDR_D_2
F12
AVDD_DDR_D_3
G11
AVDD_DDR_D_4
G12
AVDD_LVDS3.3V_1
D4
AVDD_LVDS3.3V_2
D5
AVDD_LVDS3.3V_3
E4
AVDD_LVDS3.3V_4
E5
AVDD_MPLL3.3V
M5
AVDD_LPLL3.3V
L4
AVDD_PLL3.3V
L5
AVDDL_MOD1.26V
K10
DVDD_DDR_1.26V
L10
DVDD_HF1.26V
K9
VD33_1
M4
VD33_2
N4
VD33_3
N5
VDDC_1.26V_1
M9
VDDC_1.26V_2
M10
VDDC_1.26V_3
N9
VDDC_1.26V_4
N10
VDDC_1.26V_5
N11
VDDC_1.26V_6
P10
VDDC_1.26V_7
P11
RXBCLKP
R2
RXBCLKN
R3
RXB0P
R4
RXB0N
R5
RXB1P
T4
RXB1N
U4
RXB2P
U3
RXB2N
T3
RXB3P
T2
RXB3N
U2
RXB4P
T1
RXB4N
R1
RXACLKP
R6
RXACLKN
R7
RXA0P
R8
RXA0N
R9
RXA1P
T8
RXA1N
U8
RXA2P
U7
RXA2N
T7
RXA3P
T6
RXA3N
U6
RXA4P
U5
RXA4N
T5
XTALO
J1
XTALI
J2
GPIO0/(UART_RX/S_PIF_DA0)
R13
GPIO1
P9
GPIO2/(S_PIF_CLK)
T13
GPIO3/(LTD_DA1)
U15
GPIO4/(LTD_DE)
R14
GPIO5/(LTD_CLK)
K2
GPIO6/(LTD_DA0)
K1
GPIO7(3D_FLAG)
T14
GPIO8
P8
GPIO9/(UART_TX/S_PIF_DA1)
U14
GPIO10/(S_PIF_FC)
U13
GPIO11/(S_PIF_CS)
R12
VSYNC_LIKE
E11
M_S_PIF_CLK
N2
M_S_PIF_CS
M1
M_S_PIF_DA0
N1
M_S_PIF_DA1
N3
M_S_PIF_FC
M3
S_M_PIF_CLK
L1
S_M_PIF_CS
M2
S_M_PIF_DA0
L2
S_M_PIF_DA1
K3
S_M_PIF_FC
L3
SOFT_RST_L
R10
SOFT_RST_R
T11
OP_SYNC_L
R11
OP_SYNC_R
U11
IC5201-*1LGE7303D
21:9 Cinema
DDR3_A0/DDR2_NCP14
DDR3_A1/DDR2_A8G15
DDR3_A2/DDR2_NCN14
DDR3_A3/DDR2_A10L15
DDR3_A4/DDR2_A2H15
DDR3_A5/DDR2_A3L14
DDR3_A6/DDR2_A4G14
DDR3_A7/DDR2_A5N12
DDR3_A8/DDR2_A6G13
DDR3_A9/DDR2_A9N13
DDR3_A10/DDR2_RASZH14
DDR3_A11/DDR2_A11F15
DDR3_A12/DDR2_A0H13
DDR3_A13/DDR2_A12P13
DDR3_BA0/DDR2_BA2M12
DDR3_BA1/DDR2_CASZH12
DDR3_BA2/DDR2_A1L13
DDR3_MCLK/DDR2_MCLKF16
DDR3_MCLKZ/DDR2_MCLKZF17
DDR3_CKE/DDR2_ODTJ13
DDR3_ODT/DDR2_CKEK12
DDR3_RASZDDR2_WEZL12
DDR3_CASZ/DDR2_BA1K13
DDR3_WEZ/DDR2_BA0K14
DDR3_RESET/DDR2_A7M14
DDR3_DQSL/DDR2_DQSLN16
DDR3_DQSU/DDR2_DQSUM17
DDR3_DQSBL/DDR2_DQSBLM16
DDR3_DQSBU/DDR2_DQSBUM15
DDR3_DQML/DDR2_DQU5J15
DDR3_DQMU/DDR2_DQU4R16
DDR3_DQL0/DDR2_DQU3R17
DDR3_DQL1/DDR2_DQL0H17
DDR3_DQL2/DDR2_DQL6R15
DDR3_DQL3/DDR2_DQL7J17
DDR3_DQL4/DDR2_DQL3T17
DDR3_DQL5/DDR2_DQL2H16
DDR3_DQL6/DDR2_DQL1T15
DDR3_DQL7/DDR2_DQL5G16
DDR3_DQU0/DDR2_DQU7K15
DDR3_DQU1/DDR2_DQMLN15
DDR3_DQU2/DDR2_DQU2K17
DDR3_DQU3/DDR2_DQU6P17
DDR3_DQU4/DDR2_NCL17
DDR3_DQU5/DDR2_DQU1P16
DDR3_DQU6/DDR2_DQU0K16
DDR3_DQU7/DDR2_DQMUP15
I2CM_SCLD14
I2CM_SDAD15
I2CS_SCLP1
I2CS_SDAP2
DDR3_NC/DDR2_A13F14
DDR3_NC/DDR2_DQL4T16
VSS_1
D6
VSS_2
D7
VSS_3
D8
VSS_4
D9
VSS_5
E6
VSS_6
E7
VSS_7
E8
VSS_8
E9
VSS_9
E10
VSS_10
E16
VSS_11
F3
VSS_12
F6
VSS_13
F7
VSS_14
F8
VSS_15
F9
VSS_16
G1
VSS_17
G2
VSS_18
G4
VSS_19
G5
VSS_20
G6
VSS_21
G7
VSS_22
G8
VSS_23
G9
VSS_24
G17
VSS_25
H1
VSS_26
H2
VSS_27
H4
VSS_28
H5
VSS_29
H6
VSS_30
H7
VSS_31
H8
VSS_32
H9
VSS_33
H10
VSS_34
H11
VSS_35
J4
VSS_36
J5
VSS_37
J6
VSS_38
J7
VSS_39
J8
VSS_40
J9
VSS_41
J10
VSS_42
J11
VSS_43
J12
VSS_44
J14
VSS_45
J16
VSS_46
K4
VSS_47
K5
VSS_48
K6
VSS_49
K7
VSS_50
K8
VSS_51
K11
VSS_52
L6
VSS_53
L7
VSS_54
L8
VSS_55
L11
VSS_56
L16
VSS_57
M6
VSS_58
M7
VSS_59
M8
VSS_60
M11
VSS_61
M13
VSS_62
N6
VSS_63
N7
VSS_64
N8
VSS_65
N17
VSS_66
P3
VSS_67
P4
VSS_68
P5
VSS_69
P6
VSS_70
P7
VSS_71
P12
VSS_72
U16
NC
L9
HW_RESET
J3
TESTPIN_1
D1
TESTPIN_2
D2
TESTPIN_3
D3
TESTPIN_4
E1
TESTPIN_5
E2
TESTPIN_6
E3
TESTPIN_7
F1
TESTPIN_8
F2
M0_SCLK
C17
M0_MOSI
D16
M1_SCLK
D17
M1_MOSI
E15
M2_SCLK
E14
M2_MOSI
E13
M3_SCLK
E12
M3_MOSI
F13
SPI_CK
T9
SPI_CZ
U10
SPI_DI
U9
SPI_DO
T10
TXA0P/GCLK6/BLUE[7]C8
TXA0N/GCLK5/BLUE[6]C9
TXA1P/OPT_N/LK3/BLUE[9]B8
TXA1N/FLK/BLUE[8]A8
TXA2P/GREEN[1]A7
TXA2N/OPT_P/LK2/GREEN[0]B7
TXACLKP/RLV0N/GREEN[3]C6
TXACLKN/RLV0P/GREEN[2]C7
TXA3P/RLV1N/GREEN[5]B6
TXA3N/RLV1P/GREEN[4]A6
TXA4P/RLV2N/GREEN[7]A5
TXA4N/RLV2P/GREEN[6]B5
TXB0P/RLV3N/GREEN[9]C4
TXB0N/RLV3P/GREEN[8]C5
TXB1P/RLVCLKN/RED[1]B4
TXB1N/RLVCLKP/RED[0]A4
TXB2P/RLV4P/RED[3]/EPI_A3PA3
TXB2N/RLV4N/RED[2]/EPI_A3NB3
TXBCLKP/RLV5N/RED[5]/EPI_A2PC2
TXBCLKN/RLV5P/RED[4]/EPI_A2NC3
TXB3P/RLV6N/RED[7]/EPI_A1PB2
TXB3N/RLV6P/RED[6]/EPI_A1N/A2
TXB4P/RLV7N/RED[9]/EPI_A0PC1
TXB4N/RLV7P/RED[8]/EPI_A0NB1
TXC0P/SOEC16
TXC0N/POLB17
TXC1P/GSP_RB16
TXC1N/GSP/VSTA16
TXC2P/GOE/GCLK1A15
TXC2N/GSC/GCLK3B15
TXCCLKP/LLV0NC14
TXCCLKN/LLV0PC15
TXC3P/LLV1NB14
TXC3N/LLV1PA14
TXC4P/LLV2NA13
TXC4N/LLV2PB13
TXD0P/LLV3NC12
TXD0N/LLV3PC13
TXD1P/LLVCLKNB12
TXD1N/LLVCLKPA12
TXD2P/LLV4N/EPI_B3PA11
TXD2N/LLV4P/EPI_B3NB11
TXDCLKP/LLV5N/BLUE[1]/EPI_B2PC10
TXDCLKN/LLV5P/BLUE[0]/EPI_B2NC11
TXD3P/LLV6N/BLUE[3]B10
TXD3N/LLV6P/BLUE[2]/EPI_B1NA10
TXD4P/LLV7N/BLUE[5]/EPI_B0PA9
TXD4N/LLV7P/BLUE[4]/EPI_B0NB9
MOD_GPIO0/VDD_ODD/HSYNCD10
MOD_GPIO1/VDD_EVEN/VSYNCD11
MOD_GPIO2/PWM13/GCLK4/LCKD12
MOD_GPIO3/PWM14/GCLK2/LDED13
PWM0/SCAN_BLK1U12
PWM1/SCAN_BLK2T12
LPLL_FBCLKG3
LPLL_OUTCLKE17
LPLL_REFINH3
AVDD_1
F4
AVDD_2
F5
AVDD_DDR_C_1
F10
AVDD_DDR_C_2
G10
AVDD_DDR_D_1
F11
AVDD_DDR_D_2
F12
AVDD_DDR_D_3
G11
AVDD_DDR_D_4
G12
AVDD_LVDS3.3V_1
D4
AVDD_LVDS3.3V_2
D5
AVDD_LVDS3.3V_3
E4
AVDD_LVDS3.3V_4
E5
AVDD_MPLL3.3V
M5
AVDD_LPLL3.3V
L4
AVDD_PLL3.3V
L5
AVDDL_MOD1.26V
K10
DVDD_DDR_1.26V
L10
DVDD_HF1.26V
K9
VD33_1
M4
VD33_2
N4
VD33_3
N5
VDDC_1.26V_1
M9
VDDC_1.26V_2
M10
VDDC_1.26V_3
N9
VDDC_1.26V_4
N10
VDDC_1.26V_5
N11
VDDC_1.26V_6
P10
VDDC_1.26V_7
P11
RXBCLKP
R2
RXBCLKN
R3
RXB0P
R4
RXB0N
R5
RXB1P
T4
RXB1N
U4
RXB2P
U3
RXB2N
T3
RXB3P
T2
RXB3N
U2
RXB4P
T1
RXB4N
R1
RXACLKP
R6
RXACLKN
R7
RXA0P
R8
RXA0N
R9
RXA1P
T8
RXA1N
U8
RXA2P
U7
RXA2N
T7
RXA3P
T6
RXA3N
U6
RXA4P
U5
RXA4N
T5
XTALO
J1
XTALI
J2
GPIO0/(UART_RX/S_PIF_DA0)
R13
GPIO1
P9
GPIO2/(S_PIF_CLK)
T13
GPIO3/(LTD_DA1)
U15
GPIO4/(LTD_DE)
R14
GPIO5/(LTD_CLK)
K2
GPIO6/(LTD_DA0)
K1
GPIO7(3D_FLAG)
T14
GPIO8
P8
GPIO9/(UART_TX/S_PIF_DA1)
U14
GPIO10/(S_PIF_FC)
U13
GPIO11/(S_PIF_CS)
R12
VSYNC_LIKE
E11
M_S_PIF_CLK
N2
M_S_PIF_CS
M1
M_S_PIF_DA0
N1
M_S_PIF_DA1
N3
M_S_PIF_FC
M3
S_M_PIF_CLK
L1
S_M_PIF_CS
M2
S_M_PIF_DA0
L2
S_M_PIF_DA1
K3
S_M_PIF_FC
L3
SOFT_RST_L
R10
SOFT_RST_R
T11
OP_SYNC_L
R11
OP_SYNC_R
U11
FRC block
MStar URSA5
5552
2010. 08.18
L/DIM_10BLOCK
D13
GPIO1 : HI => B8/94, LOW => B4/98
LOW
LVDS_S7M_PLUS
MODEL_OPT_0
MODEL_OPT_3
Debugging for URSA5
CHIP_CONF : GPIO8, PWM1, PWM0CHIP_CONF = 3’d5 : boot from interal SRAMCHIP_CONF = 3’d6 : boot from EEPROMCHIP_CONF = 3’d7 : boot from SPI Flash
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATESSPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FORTHE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
DDR3_DQU[1]
DDR3_DQL[1]
DDR3_DQL[3]
DDR3_A[8]
DDR3_A[3]
DDR3_A[12]
DDR3_A[13]
DDR3_A[5]
DDR3_DQL[7]
DDR3_A[7]
DDR3_DQL[0]
DDR3_DQL[6]
DDR3_A[11]
DDR3_A[2]
DDR3_DQU[0]
DDR3_A[10]
DDR3_DQU[2]
DDR3_A[9]
DDR3_DQL[4]
DDR3_DQU[6]
DDR3_A[0]
DDR3_A[4]
DDR3_DQL[5]
DDR3_A[6]
DDR3_DQU[4]
DDR3_A[1]
DDR3_DQU[3]
DDR3_DQL[2]
DDR3_DQU[7]
DDR3_DQU[5]
FRC_DQL[4]
+1.5V_FRC_DDR
FRC_A[10]
FRC_DQSLR5312 22
MVREFDQ
FRC_DQSUB
DDR3_DQSLB
DDR3_BA0
DDR3_DQSLB
DDR3_ODT
DDR3_A[10]
FRC_DQL[3]
R531056
R5316 22
FRC_DQL[5]
DDR3_CKE
FRC_CASB
FRC_DQU[3]
DDR3_DMU
FRC_DQU[6]
R5321 22
FRC_BA2
FRC_DQU[7]
FRC_CKE
C5312
0.1uF
AR5306
22
DDR3_DQL[6]
FRC_DQL[7]
FRC_DQL[6]
C5314
0.1uF
+1.5V_FRC_DDR
DDR3_MCK
+1.5V_FRC_DDR
DDR3_BA0
FRC_DQL[0]
DDR3_A[6]
DDR3_DQSUB
DDR3_A[2]
AR5304
22
DDR3_MCK
DDR3_DQL[0-7]
DDR3_DQSL
DDR3_DQU[2]
AR5302
22
DDR3_BA2
DDR3_DQL[0]
FRC_DML
DDR3_DML
DDR3_ODT
DDR3_A[8]
FRC_A[11]
FRC_A[9]
FRC_DQSLB
R53041K1%
DDR3_BA1
DDR3_DQU[0-7]
DDR3_BA1
DDR3_A[9]
DDR3_DQL[4]
DDR3_WEB
DDR3_A[0-13]
FRC_ODT
DDR3_DML
R53021K1%
FRC_BA1
R53011K1%
DDR3_DQU[7]
MVREFDQ
C5313
0.1uF
DDR3_DQU[1]
DDR3_RASB
DDR3_DQL[5]
FRC_A[12]
DDR3_DQL[3]
DDR3_DQU[5]
+1.5V_FRC_DDR
AR5307
22
FRC_A[4]
R5320 22
FRC_A[13]
DDR3_A[1]
AR5305
22
DDR3_DMU
FRC_DQU[2]
FRC_DQU[0]
DDR3_RASB
DDR3_CASB
FRC_A[8]
DDR3_A[11]
+1.5V_FRC_DDR
DDR3_DQSUB
R530956
FRC_A[2]
C5305
0.1uF
DDR3_A[12]
DDR3_DQU[6]
DDR3_MCK
DDR3_DQU[0]
DDR3_CASB
FRC_MCLK
FRC_DQU[5]
DDR3_WEB
R5313 22
+1.5V_FRC_DDR
AR5309
22
FRC_A[5]
DDR3_A[0]
DDR3_DQU[3]
R5317 22
C5306
0.1uF
R5314 22
FRC_WEB
DDR3_MCKB
C53150.01uF25V
C5308
0.1uF
R5311 22
AR5303
22
DDR3_MCKB
FRC_DQU[1]
DDR3_MCKB
DDR3_DQSU
C5309
0.1uF
FRC_A[7]
FRC_RASB
FRC_DMU
FRC_A[1]
MVREFCA
AR5301
22
C530422uF10V
DDR3_DQL[7]
DDR3_A[3]
FRC_DQSU
DDR3_A[13]
C53020.1uF
C5310
0.1uF
FRC_BA0
DDR3_BA2
DDR3_CKE
MVREFCA
FRC_A[6]
R5318 22
C53030.1uF16V
FRC_DQL[2]
AR5308
22
C5307
0.1uF
R5319 22
DDR3_DQU[4]
C53010.1uF
R53031K1%
DDR3_DQL[1]
C5311
0.1uF
FRC_MCLKB
DDR3_A[5]
DDR3_DQL[2]
R5315 22
FRC_DQL[1]
DDR3_DQSU
DDR3_DQSL
FRC_A[0]
DDR3_A[7]
FRC_A[3]
DDR3_A[4]
R5307
150
OPT
FRC_DQU[4]
R5305
2401%
H5TQ1G63DFR-PBCIC5301
NON 21:9 Cinema(1600MHz)
A0N3
A1P7
A2P3
A3N2
A4P8
A5P2
A6R8
A7R2
A8T8
A9R3
A10/APL7
A11R7
A12/BCN7
A13T3
A15M7
BA0M2
BA1N8
BA2M3
CKJ7
CKK7
CKEK9
CSL2
ODTK1
RASJ3
CASK3
WEL3
RESETT2
DQSLF3
DQSLG3
DQSUC7
DQSUB7
DMLE7
DMUD3
DQL0E3
DQL1F7
DQL2F2
DQL3F8
DQL4H3
DQL5H8
DQL6G2
DQL7H7
DQU0D7
DQU1C3
DQU2C8
DQU3C2
DQU4A7
DQU5A2
DQU6B8
DQU7A3
VREFCAM8
VREFDQH1
ZQL8
VDD_1B2
VDD_2D9
VDD_3G7
VDD_4K2
VDD_5K8
VDD_6N1
VDD_7N9
VDD_8R1
VDD_9R9
VDDQ_1A1
VDDQ_2A8
VDDQ_3C1
VDDQ_4C9
VDDQ_5D2
VDDQ_6E9
VDDQ_7F1
VDDQ_8H2
VDDQ_9H9
NC_1J1
NC_2J9
NC_3L1
NC_4L9
NC_6T7
VSS_1A9
VSS_2B3
VSS_3E1
VSS_4G8
VSS_5J2
VSS_6J8
VSS_7M1
VSS_8M9
VSS_9P1
VSS_10P9
VSS_11T1
VSS_12T9
VSSQ_1B1
VSSQ_2B9
VSSQ_3D1
VSSQ_4D8
VSSQ_5E2
VSSQ_6E8
VSSQ_7F9
VSSQ_8G1
VSSQ_9G9
R5308 0
DDR3_RESETB
FRC_DDR3_RESETB DDR3_RESETBR5322 22
H5TQ1G63DFR-RDCIC5301-*1
21:9 Cinema(1866MHz)
A0N3
A1P7
A2P3
A3N2
A4P8
A5P2
A6R8
A7R2
A8T8
A9R3
A10/APL7
A11R7
A12/BCN7
NC_6T3
NC_5M7
BA0M2
BA1N8
BA2M3
CKJ7
CKK7
CKEK9
CSL2
ODTK1
RASJ3
CASK3
WEL3
RESETT2
DQSLF3
DQSLG3
DQSUC7
DQSUB7
DMLE7
DMUD3
DQL0E3
DQL1F7
DQL2F2
DQL3F8
DQL4H3
DQL5H8
DQL6G2
DQL7H7
DQU0D7
DQU1C3
DQU2C8
DQU3C2
DQU4A7
DQU5A2
DQU6B8
DQU7A3
VREFCAM8
VREFDQH1
ZQL8
VDD_1B2
VDD_2D9
VDD_3G7
VDD_4K2
VDD_5K8
VDD_6N1
VDD_7N9
VDD_8R1
VDD_9R9
VDDQ_1A1
VDDQ_2A8
VDDQ_3C1
VDDQ_4C9
VDDQ_5D2
VDDQ_6E9
VDDQ_7F1
VDDQ_8H2
VDDQ_9H9
NC_1J1
NC_2J9
NC_3L1
NC_4L9
NC_7T7
VSS_1A9
VSS_2B3
VSS_3E1
VSS_4G8
VSS_5J2
VSS_6J8
VSS_7M1
VSS_8M9
VSS_9P1
VSS_10P9
VSS_11T1
VSS_12T9
VSSQ_1B1
VSSQ_2B9
VSSQ_3D1
VSSQ_4D8
VSSQ_5E2
VSSQ_6E8
VSSQ_7F9
VSSQ_8G1
VSSQ_9G9
DDR3 4Mbit 53
MStar URSA5
55
2010. 08.18
Place Close to DDR Pin
Place Close to DDR Pin
Close to DDR Pin
Place the serail damping resistors in the middle of DRAM pattern
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATESSPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FORTHE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATESSPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FORTHE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATESSPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FORTHE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
D38125.6V
ESD_COMMON
C38300.22uF10V
NEC_TXD
HP_ROUT_N
D3814
30V
ESD_COMMON
+3.3V_Normal
C38290.22uF10V
DSUB_HSYNC
R3803470K
D380830V
ESD_COMMON
C38260.1uF16V
R38102.7K
D3801
5.6V
ESD_COMMON
AMOTECH
BCM_RX
R3819
4.7K
DSUB_VSYNC
C38191uF10V
IC3804TPA6132A2
EAN60724701
3INR+
2INL+
4INR-
1INL-
5
OUTR
6
G0
7
G1
8
HPVSS
9CPN
10PGND
11CPP
12HPVDD
13
EN
14
VDD
15
SGND
16
OUTL
C381218pF50V
D380530V
C382410uF10V
C3805560pF50V
C380747pF50V
IC380174F08D
3Q0
2D0B
4D1A
1D0A
6Q1
5D1B
7GND
8Q2
9D2A
10D2B
11Q3
12D3A
13D3B
14VCC
HP_LOUT
P3802
SPG09-DB-009
1
2
3
4
5
6
7
8
9
10
+3.3V_Normal
C380947pF50V
HP_LOUT
C38181uF10V
L3805BG2012B080TF
C38040.1uF16V
JP3809
C38150.1uF
BCM_TX
+3.5V_ST
HP_DET
RGB_DDC_SCL
C381318pF50V
C38282.2uF10V
SPDIF_OUT
R380110K
OPT
C3806560pF50V
HP_ROUT
C38231uF10V
D3810KDS184
A2
C
A1
HP_ROUT_P
HP_ROUT
R380210K
OPT
R3818
OPT
C38201uF10V
RGB_DDC_SDA
R3825
OPT100K
D380330VOPT
R380875
R3809
2.7K
C38252.2uF10V
D3809
5.6VOPT
D3811
5.6VOPT
R38270
OPT
R38281K
PC_L_IN
R380775
R381222
D3813
30V
ESD_COMMON
R381310K
R3805
2.7K
C38170.1uF
R381410K
C38160.1uF
DSUB_B+
C3803560pF50V
R38151KDSUB_DET
HP_LOUT_N
C38140.1uF
JK3802
JST1223-0011
GND
2
VCC
3
VINPUT
4FIX_POLE
Q38012SC3052
E
B
C
L3803BLM18PG121SN1D
+5V_Normal
L3804BG2012B080TF
R38264.7K
D3802
5.6V
ESD_COMMON
AMOTECH
DSUB_G+
D3804
30V
+3.3V_Normal
+3.3V_Normal
JK3803KJA-PH-0-0177
3DETECT
4L
5GND
1REDID_WP
R3820
OPT
R3804470K
C380847pF50V
SIDE_HP_MUTE
P3801
SPG09-DB-010
1RED
2GREEN
3BLUE
4GND_1
5DDC_GND
6RED_GND
7GREEN_GND
8BLUE_GND
9NC
10
SYNC_GND
11
GND_2
12
DDC_DATA
13
H_SYNC
14
V_SYNC
15
DDC_CLOCK
16SHILED
R3817
4.7K
JP3808
+3.3V_Normal
DSUB_R+
R381122
D380730V
ESD_COMMON
NEC_RXD
IC3802
AT24C02BN-SH-T
3A2
2A1
4GND
1A0
5SDA
6SCL
7WP
8VCC
C38272.2uF10V
D380630V
ESD_COMMON
PC_R_IN
C3802560pF50V
C38211uF10V
R380675
HP_LOUT_P
+5V_Normal
IC3803
MAX3232CDR
EAN41348201
3C1-
2V+
4C2+
1C1+
6V-
5C2-
7DOUT2
8RIN2
9ROUT2
10DIN2
11DIN1
12ROUT1
13RIN1
14DOUT1
15GND
16VCC
IR_OUTR38290
IR_OUT
+3.5V_ST
R3831
4.7K
OPT
R3830
4.7K
OPT
R38230
R38220
R38210
R38240
R385422
R385522
L3806BLM15BD121SN1
L3807BLM15BD121SN1
L3808BLM15BD121SN1
R3850 0
OPTR3851 0
OPTR3853 0
OPT
R3852 0
OPT
D3808-*15.6V
ESD_CERADIODE
D3806-*15.6V
ESD_CERADIODE
D3807-*15.6V
ESD_CERADIODE
D3812-*15.6VESD_CERADIODE
D3813-*1
5.6VESD_CERADIODE
D3814-*1
5.6VESD_CERADIODE
R3856 22
R3857 22
R38581K
R38162.7K
R3859100
R3860100
R38610
C381022pF50V
C381122pF50V
R38620
R38630
JK3801
PEJ027-04
6B T_TERMINAL2
7B B_TERMINAL2
5 T_SPRING
4 R_SPRING
7A B_TERMINAL1
6A T_TERMINAL1
3 E_SPRING
1ST : 0TRIY80001A, 2ND : 0TR387500AA
D3804,D3805,D3806D3807,D3808,D3813D3814
RGB PC
Q3801
D3810
RS232C
DUAL COMPONENT
HIGH : SELECT X1, Y1, SELECT MAIN TX/RX
PC AUDIO
Close to the IC
1ST : EAH39491601, 2ND : EAH33945901
SPDIF OUT
RGB/ PC AUDIO/ SPDIF/ EARPHONE/ RS232C
EARPHON JACK
EARPHONE AMP
1ST : 0DD184009AA, 2ND : 0DSIH00028A
LOW : SELECT X0, Y0, SELECT MICOM TX/RX
BCM35230
9999LV7 COMM JACK
Closed to JACKLPF READEY(For H/P Noise Improvement)