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Lecture 2: Advanced Instructions, Control, and Branching EEN 312: Processors: Hardware, Software, and Interfacing Department of Electrical and Computer Engineering Spring 2014, Dr. Rozier (UM)
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Lecture 2: Advanced Instructions, Control, and Branching EEN 312: Processors: Hardware, Software, and Interfacing Department of Electrical and Computer.

Jan 18, 2016

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Page 1: Lecture 2: Advanced Instructions, Control, and Branching EEN 312: Processors: Hardware, Software, and Interfacing Department of Electrical and Computer.

Lecture 2: Advanced Instructions, Control, and Branching

EEN 312: Processors: Hardware, Software, and Interfacing

Department of Electrical and Computer Engineering

Spring 2014, Dr. Rozier (UM)

Page 2: Lecture 2: Advanced Instructions, Control, and Branching EEN 312: Processors: Hardware, Software, and Interfacing Department of Electrical and Computer.

COURSE PLAN FOR TODAY

1.Representing Numbers2.Logical Operations3.Control Instructions

Page 3: Lecture 2: Advanced Instructions, Control, and Branching EEN 312: Processors: Hardware, Software, and Interfacing Department of Electrical and Computer.

REPRESENTING NUMBERS

Page 4: Lecture 2: Advanced Instructions, Control, and Branching EEN 312: Processors: Hardware, Software, and Interfacing Department of Electrical and Computer.

Unsigned Binary Integers• Given an n-bit number

00

11

2n2n

1n1n 2x2x2x2xx

Range: 0 to +2n – 1 Example

0000 0000 0000 0000 0000 0000 0000 10112

= 0 + … + 1×23 + 0×22 +1×21 +1×20

= 0 + … + 8 + 0 + 2 + 1 = 1110

Using 32 bits 0 to +4,294,967,295

Page 5: Lecture 2: Advanced Instructions, Control, and Branching EEN 312: Processors: Hardware, Software, and Interfacing Department of Electrical and Computer.

2s-Complement Signed Integers• Given an n-bit number

00

11

2n2n

1n1n 2x2x2x2xx

Range: –2n – 1 to +2n – 1 – 1 Example

1111 1111 1111 1111 1111 1111 1111 11002

= –1×231 + 1×230 + … + 1×22 +0×21 +0×20

= –2,147,483,648 + 2,147,483,644 = –410

Using 32 bits –2,147,483,648 to +2,147,483,647

Page 6: Lecture 2: Advanced Instructions, Control, and Branching EEN 312: Processors: Hardware, Software, and Interfacing Department of Electrical and Computer.

2s-Complement Signed Integers• Bit 31 is sign bit

– 1 for negative numbers– 0 for non-negative numbers

• –(–2n – 1) can’t be represented• Non-negative numbers have the same unsigned and

2s-complement representation• Some specific numbers

– 0: 0000 0000 … 0000– –1: 1111 1111 … 1111– Most-negative: 1000 0000 … 0000– Most-positive: 0111 1111 … 1111

Page 7: Lecture 2: Advanced Instructions, Control, and Branching EEN 312: Processors: Hardware, Software, and Interfacing Department of Electrical and Computer.

2s-Complement Signed Integers• Complement and add 1

– Complement means 1 → 0, 0 → 1

x1x

11111...111xx 2

Example: negate +2 +2 = 0000 0000 … 00102

–2 = 1111 1111 … 11012 + 1 = 1111 1111 … 11102

Page 8: Lecture 2: Advanced Instructions, Control, and Branching EEN 312: Processors: Hardware, Software, and Interfacing Department of Electrical and Computer.

Hexadecimal• Base 16

– Compact representation of bit strings– 4 bits per hex digit

0 0000 4 0100 8 1000 c 1100

1 0001 5 0101 9 1001 d 1101

2 0010 6 0110 a 1010 e 1110

3 0011 7 0111 b 1011 f 1111

Example: eca8 6420 1110 1100 1010 1000 0110 0100 0010 0000

Page 9: Lecture 2: Advanced Instructions, Control, and Branching EEN 312: Processors: Hardware, Software, and Interfacing Department of Electrical and Computer.

LOGICAL OPERATIONS

Page 10: Lecture 2: Advanced Instructions, Control, and Branching EEN 312: Processors: Hardware, Software, and Interfacing Department of Electrical and Computer.

Bitwise Operations

• Sometimes we want to operate on registers in a bitwise fashion.

• Logical Operations• Shifts• Rotates

Page 11: Lecture 2: Advanced Instructions, Control, and Branching EEN 312: Processors: Hardware, Software, and Interfacing Department of Electrical and Computer.

Logical Operations

• Instructions for bitwise manipulation

Examplebic r0, r1, r2 @ bitwise NAND r1 and r2, store

the result in r0

Operation C Java ARM

Bitwise AND & & and

Bitwise OR | | orr

Bitwise XOR ^ ^ eor

Bitwise NAND ~(A & B) ~(A&B) bic

Page 12: Lecture 2: Advanced Instructions, Control, and Branching EEN 312: Processors: Hardware, Software, and Interfacing Department of Electrical and Computer.

The ARM Barrel Shifter

• ARM architectures have a unique piece of hardware known as a barrel shifter.– Device moves bits in a word left or right.

• Most processors have stand alone instructions for shifting bits.

• ARM allows shifts as part of regular instructions.

• Allows for quick multiplication and division.

Page 13: Lecture 2: Advanced Instructions, Control, and Branching EEN 312: Processors: Hardware, Software, and Interfacing Department of Electrical and Computer.

The ARM Barrel Shifter

Page 14: Lecture 2: Advanced Instructions, Control, and Branching EEN 312: Processors: Hardware, Software, and Interfacing Department of Electrical and Computer.

The ARM Barrel Shifter

• Reality of the hardware– There are no shift

instructions– Barrel shifter can be

controlled WITH an instruction

– Can only be applied to operand 2 on instructions which use the ALU

Page 15: Lecture 2: Advanced Instructions, Control, and Branching EEN 312: Processors: Hardware, Software, and Interfacing Department of Electrical and Computer.

Types of Shifting

• Logical Shifts– lsl – left– lsr – right

• Arithmetic Shifts– asr – right

• Rotates– ror – right– rrx – right with extend

Page 16: Lecture 2: Advanced Instructions, Control, and Branching EEN 312: Processors: Hardware, Software, and Interfacing Department of Electrical and Computer.

Example

mov r0, r1, lsl #1

This would perform a logical shift left of 1 bit on r1, and then copy the result into r0.

mov r0, r1, lsl r2

This would do the same as before, but use the value of r2 for the shift amount.

Page 17: Lecture 2: Advanced Instructions, Control, and Branching EEN 312: Processors: Hardware, Software, and Interfacing Department of Electrical and Computer.

Logical Shifts

• Logical shifting a number left or right has the effect of doubling or halving it.

• lsl– Highest order bit shifts into the carry flag– Lowest order bit is filled with 0.

• lsr– Lowest order bit shifts into the carry flag– Highest order bit is filled with 0.

LSL C b7 b6 b5 b4 b3 b2 b1 b0

Before 0 1 0 0 0 1 1 1 1

After 1 0 0 0 1 1 1 1 0

Page 18: Lecture 2: Advanced Instructions, Control, and Branching EEN 312: Processors: Hardware, Software, and Interfacing Department of Electrical and Computer.

Arithmetic Shift

• Preserves the sign bit.

• asr– Extends the sign bit to the second most significant– Shifts the least significant into the carry flag.

LSL C b7 b6 b5 b4 b3 b2 b1 b0

Before 0 1 0 0 0 1 1 1 1

After 1 1 1 0 0 0 1 1 1

Page 19: Lecture 2: Advanced Instructions, Control, and Branching EEN 312: Processors: Hardware, Software, and Interfacing Department of Electrical and Computer.

Rotations

• Rotates bits from low order to high order

• ror– Moves bits from the lowest order to the highest, setting the carry bit in the

process with the last bit rotated out.

• rrx– Always and only rotates by one position. – Carry flag is dropped into the highest order bit. Lowest order bit is moved to

the carry flag

LSL C b7 b6 b5 b4 b3 b2 b1 b0

Before 0 0 0 0 0 1 1 1 1

After 1 1 0 0 0 0 1 1 1

Page 20: Lecture 2: Advanced Instructions, Control, and Branching EEN 312: Processors: Hardware, Software, and Interfacing Department of Electrical and Computer.

Rotations

• ror

• rrx

Page 21: Lecture 2: Advanced Instructions, Control, and Branching EEN 312: Processors: Hardware, Software, and Interfacing Department of Electrical and Computer.

Adding a Shift or Rotate

• Shifts and rotates can be used with:– adc, add, and– bic– cmn, cmp– eor– mov, mvn– orr– rsb– sbc, sub– teq, tst

Page 22: Lecture 2: Advanced Instructions, Control, and Branching EEN 312: Processors: Hardware, Software, and Interfacing Department of Electrical and Computer.

BRANCHING

Page 23: Lecture 2: Advanced Instructions, Control, and Branching EEN 312: Processors: Hardware, Software, and Interfacing Department of Electrical and Computer.

Branching

• What makes a computer different from a calculator?

Page 24: Lecture 2: Advanced Instructions, Control, and Branching EEN 312: Processors: Hardware, Software, and Interfacing Department of Electrical and Computer.

Branching

• Branches allow us to transfer control of the program to a new address.– b (<suffix>) <label>– bl (<suffix>) <label>

b startbl start

Page 25: Lecture 2: Advanced Instructions, Control, and Branching EEN 312: Processors: Hardware, Software, and Interfacing Department of Electrical and Computer.

Branch (b)

• Branch, possibly conditionally, to a new address.

beq subroutine @ If Z=1, branch

• Good practice to use bal instead of b.

Page 26: Lecture 2: Advanced Instructions, Control, and Branching EEN 312: Processors: Hardware, Software, and Interfacing Department of Electrical and Computer.

Branch with link (bl)

• Branch, possibly conditionally, to a new address.– Before the branch is complete, store the PC in the

LR.– Allows easy return from the branch.

bleq subroutine @ If Z=1, branch, saving the PC

Page 27: Lecture 2: Advanced Instructions, Control, and Branching EEN 312: Processors: Hardware, Software, and Interfacing Department of Electrical and Computer.

Branch with link (bl)

• How do we get back once we’ve saved the PC?

mov pc, lr

• Moves the contents of the link register to the program counter.

Page 28: Lecture 2: Advanced Instructions, Control, and Branching EEN 312: Processors: Hardware, Software, and Interfacing Department of Electrical and Computer.

Implementing If Statements

• C code:if (i == j) f = g+h;else f = g - h;

• ARM code cmp r0, r1 @ Set flags via r0-r1 and discard

beq Elseadd r2, r3, r4 @ r2 = r3 + r4bal Exit

Else:sub r2, r3, r4 @ r2 = r3 + r4

Exit:

Page 29: Lecture 2: Advanced Instructions, Control, and Branching EEN 312: Processors: Hardware, Software, and Interfacing Department of Electrical and Computer.

Implementing Loop Statements

• C code:while (i < j) i += 1;

• ARM code Loop:

cmp r0, r1bge Exitadd r0, r0, #1bal Loop

Exit:

i < j?i < j?

i=i+1i=i+1

i<j

ExitExit

i>=j

Page 30: Lecture 2: Advanced Instructions, Control, and Branching EEN 312: Processors: Hardware, Software, and Interfacing Department of Electrical and Computer.

Basic Blocks• A basic block is a sequence of instructions with

– No embedded branches (except at end)– No branch targets (except at beginning)

A compiler identifies basic blocks for optimization

An advanced processor can accelerate execution of basic blocks

Page 31: Lecture 2: Advanced Instructions, Control, and Branching EEN 312: Processors: Hardware, Software, and Interfacing Department of Electrical and Computer.

EXERCISE

THE HUMAN PROCESSOR

Page 32: Lecture 2: Advanced Instructions, Control, and Branching EEN 312: Processors: Hardware, Software, and Interfacing Department of Electrical and Computer.

WRAP UP

Page 33: Lecture 2: Advanced Instructions, Control, and Branching EEN 312: Processors: Hardware, Software, and Interfacing Department of Electrical and Computer.

For next time

• Read Chapter 2, Sections 2.6 – 2.8

• Learn about control, branch, loops, etc.