Lec 9 Systems Architecture 1 Systems Architecture Lecture 10: Alternative Instruction Sets Jeremy R. Johnson Anatole D. Ruslanov William M. Mongan Some or all figures from Computer Organization and Design: The Hardware/Software Approach, Third Edition, by David Patterson and John Hennessy, are copyrighted material (COPYRIGHT 2004 MORGAN KAUFMANN PUBLISHERS, INC. ALL RIGHTS RESERVED).
27
Embed
Lec 9Systems Architecture1 Systems Architecture Lecture 10: Alternative Instruction Sets Jeremy R. Johnson Anatole D. Ruslanov William M. Mongan Some or.
This document is posted to help you gain knowledge. Please leave a comment to let me know what you think about it! Share it to your friends and learn new things together.
Transcript
Lec 9 Systems Architecture 1
Systems Architecture
Lecture 10: Alternative Instruction Sets
Jeremy R. Johnson Anatole D. RuslanovWilliam M. Mongan
Some or all figures from Computer Organization and Design: The Hardware/Software Approach, Third Edition, by David Patterson and John Hennessy, are copyrighted material (COPYRIGHT 2004 MORGAN KAUFMANN PUBLISHERS, INC. ALL RIGHTS RESERVED).
Lec 9 Systems Architecture 2
Introduction
• Objective: To compare MIPS to several alternative instruction set architectures and to better understand the design decisions made in MIPS.
• MIPS is an example of a RISC (Reduced Instruction Set Computer) architecture as compared to a CISC (Complex Instruction Set Computer) architecture.
• MIPS trades complexity of instructions and hence greater number of instructions, for a simpler implementation and shorter clock cycle or reduced number of clock cycles per instruction.
• Alternative instruction set, including recent versions of MIPS– Provide more powerful operations
– Aim at reducing the number of instructions executed
– The danger is a slower cycle time and/or a higher CPI
Lec 9 Systems Architecture 3
Characteristics of MIPS
• Load/Store architecture• General purpose register machine (32 registers)• ALU operations have 3 register operands (2 source + 1 dest)• 16 bit constants for immediate mode• Simple instruction set
– Simple branch operations (beq, bne)– Use register to set condition (e.g. slt)– Operations such as move, li, blt built from existing operations
• Uniform encoding– All instructions are 32-bits long– Opcode is always in the high-order 6 bits– 3 types of instruction formats– Register fields in the same place for all formats
Lec 9 Systems Architecture 4
Design Principles
• Simplicity favors regularity– uniform instruction length– all ALU operations have 3 register operands– register addresses in the same location for all instruction formats
• Smaller is faster– register architecture– small number of registers
• Good design demands good compromises– fixed length instructions and only 16 bit constants– several instruction formats but consistent length
• Make common cases fast– immediate addressing– 16 bit constants– only beq and bne
Lec 9 Systems Architecture 5
MIPS Addressing Modes• Immediate Addressing
– 16 bit constant from low order bits of instruction– addi $t0, $s0, 4
• Register Addressing– add $t0, $s0, $s1
• Base Addressing (displacement addressing)– 16-bit constant from low order bits of instruction plus base register– lw $t0, 16($sp)
– separate counter register used for loops– PowerPC: bc Loop, ctr!=0– MIPS: Loop:
addi $t0, $t0, -1
bne $t0, $zero, Loop
Lec 9 Systems Architecture
Characteristics of 80x86 / IA-32• Evolved from 8086 (and backward compatible!!!)
• Register-Memory architecture
• 8 General purpose registers (evolved)
• Complex instruction set– Instruction lengths vary from 1 to 17 bytes long – A postbyte used to indicate addressing mode when not in opcode– Instructions may have many variants– Special instructions (move, push, pop, string, decimal)– Use condition codes – 7 data addressing modes – complex - with 8 or 32 bit displacement– Instructions can operate on 8, 16, or 32 bits (mode) changed with prefix– One operand must act as both a source and destination– One operand can come from memory
• Saving grace:– the most frequently used instructions are not too difficult to build– compilers avoid the portions of the architecture that are slow
April 19, 2023 Chapter 2 — Instructions: Language of the Computer
8
The Intel x86 ISA• Evolution with backward compatibility
– 8080 (1974): 8-bit microprocessor• Accumulator, plus 3 index-register pairs
– 8086 (1978): 16-bit extension to 8080• Complex instruction set (CISC)