Layout Tutorial

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Inverter Layout Tutoriale te ayout uto a

Multimedia VLSI LabSang-Hye Chung

2009-09-15

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Create a cellCreate a cell

Open ‘Library Manager’Open Library Manager

Write ‘layout’ and Enter2009-09-15

y

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Create a cellCreate a cell

Create a layout cellCreate a layout cell

Select ‘Virtuoso’ !2009-09-15

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Create a cellCreate a cell

Layout window and LSW will be createdLayout window and LSW will be createdLSW : Select layers

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Shortcut KeysShortcut KeysShortcut KeysShortcut Keys

Create Instance : iEdit properties : qEdit properties : qCreate Ruler : kDelete Ruler : Shift + kCreate Label : lCreate Rectangle : rStretch : sFit all : fZoom in : Ctrl + zZoom out : Shift + z

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Draw MOSFETsDraw MOSFETsNMOS consists ofNMOS consists of

NPSDNACTMET1CONTPOLYPOLY

PMOS consists ofPPSDPACTMET1CONTCONTPOLY

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Draw MOSFETsDraw MOSFETs

Example PMOS (W = 1um, L = 0.18um)Example ( , )

PACT NW

PPSD

CONT

MET1

POLY

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Draw MOSFETsDraw MOSFETs

Example NMOS (W = 1um, L = 0.18um)Example ( , )

NACT

NPSD

CONT

MET1

POLY

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Draw ‘Via’s and ‘Contact’sDraw Via s and Contact sVia is used to connect between Nth metalVia is used to connect between N metal and N+1th.

VIA n : Met n – Met n+1VIA n : Met n Met n+1EX)

M1 VIA1 M2 M1 M2

Contact is used to connect between the substrate and Metal 1

M1 VIA1 M2 M1-M2

substrate and Metal 1.Contact : NACT, PACT, POLY and etc. – MET1

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Body BiasingBody Biasing

Use ‘CONT’s ‘MET1’ and etcUse CONT s, MET1 , and etc.PMOS case

Bias the N-Well

NMOS caseBias the substrate (Black background)

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Inverter LayoutInverter Layout

NW(N-Well) should include ( )PMOS and Body Contacts

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Inverter LayoutInverter Layout

CONT, MET1, NPSD, NACT

Poly Contact : POLY, MET1, CONT

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Inverter LayoutInverter Layout

Poly Contact : POLY, MET1, CONT

CONT, MET1, PPSD, PACT

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Inverter LayoutInverter Layout

LabelingLabelingShortcut Key : lA t PiAct as PinsUSE ‘MnPIN’

(n : 1 6)(n : 1~6)

Layout MUST have the same label with pinLayout MUST have the same label with pin names in the schematic

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Inverter LayoutInverter Layout

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DRCDRC

Design Rule CheckDesign Rule Check/> Click ‘Calibre’ – Run DRC

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DRCDRC

Select ‘Calibre_drc.rule’

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DRCDRC

Ignore the alert This must be checked

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DRCDRC

Ignore ‘Pattern Density Rule’

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LVSLVS

Layout Versus SchematicLayout Versus Schematic/> Click ‘Calibre’ – Run LVS

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LVSLVS

Select ‘Calibre_lvs.rule’

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LVSLVS

2009-09-15This must be checked

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LVSLVS

R LVS2009-09-15

Run LVS

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LVSLVS

Hope you smile too ☺Hope you smile too ☺

2009-09-15