Lap Trinh CCS cho PIC

8/12/2019 Lap Trinh CCS cho PIC

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TRNG I HC KHOA HC TNHINTRNG I HC KHOA HC TNHINKHOA IN TKHOA IN T-- VIN THNGVIN THNG

PHN 3: LP TRNH VI CCS

1

ngng LL KhoaKhoa


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CHNG 1: CBN VCCS Ngn ngC

Cu trc cbn mt chng trnh

Xut nhp

Hm delay Lp trnh vi cc vng lp v iu kin

Lp trnh vi cc lnh logic v shc

2


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Ngn

ngC

3


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Ngn ngC

4


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Ngn ngC

5


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Ngn ngC

6


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Cu trc cbn mt chngtrnh

#include

#use delay(clock=16000000)

void main(void)

{

//chuong trinh C

}

7


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Xut nhp

8


9/41

V dVD 1: Xut gi xut ra port C gi tr0x0F

#include

void main()

{

set_tris_c(0x00);while(1)

{

output_c(0x0F);

}

}

9


10/41

V dVD 2: c dliu port D v xut port C#include

void main()

{

char data;

set_tris_c(0x00);set_tris_d(0xff);

while(1)

{

data = input_d();

output_c(data);

}

}

10


11/41

Hm delay Cn c khai bo #use delay ( clock =xxxx)

VD : #use delay ( clock = 20000000 ) Hm delay khng sdng bt ktimer no

delay_cycles (count )

delay_us ( time )

delay_ms (time )

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12/41

Hm delay. 1: delay_cycles (count )

Count : hng st0 255 , l schu klnh .1 chu klnh bng 4chu kmy .

VD : delay_cycles ( 25 ) ; // vi OSC = 20 Mhz , hm ny delay 5 us

2: delay_us ( time )

Time : l bin sth = 0 255 , time l 1 hng sth = 0 -65535 . 3: delay_ms (time )

Time = 0-255 nu l bin shay = 0-65535 nu l hng s.

VD :

nt a = 215;elay_us ( a ) ; // delay 215 us

elay_us ( 4356 ) ; // delay 4356 us

elay_ms ( 2500 ) ; // delay 2 . 5 s

12


13/41

V dVD 3: Vit chng trnh chp tt cc Led port C#include

#use delay (clock = 16000000)void main(void)

{

set_tris_c(0x00);

while(1)

{

output_c(0x00);

delay_ms(500);

output_c(0xff);

delay_ms(500);

}

}13


14/41

Lp trnh vi cc vng lpVD 5: Vit chng trnh chp tt cc Led port C 5 ln#include

#use delay (clock = 16000000)

void main(void){

char i;

set_tris_c(0x00);

for (i=0;i


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Lp trnh vi iu kinVD 6: Vit chng trnh nu Port D =0 => xut Port C=0xff ngc li xut Port C=0x0f

#include


void main(void)

{

char data;

set_tris_c(0x00);

set_tris_d(0xff);

while(1)

{

data=input_d();

if (data==0)

output_c(0xff);

else

output_c(0x0f);

}

} 15


16/41

Php ton logic v shcVD: Vit chng trnh dch 1 led tbit thp n bit cao#include

#use delay(clock=16000000)

void main()

{

char a,i;

_ _

while(1)

{

a=0x01;

for(i=0;i


17/41

Bi tp#

# ( = 16000000)

()

,;

(000);

(0);

(1)

= ;

(==0)

(0);

(500);

(000);

(500);

(0);

17


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CHNG 2: CHUYN I

TNG TSANG S(ADC)

Nguyn tc hot ng ca ADC

Cu hnh bADC

V d

18


19/41

Nguyn tc hot ng ca ADC ADC bchuyn i tng tsang s

Gi trxut ra dng sphthuc vo inthanalog, in ththam chiu v sbit

ADC 8 ( 0255 ) ADC 10 (01023 )

V d: ADC c 10 bitADC = V/VREF * 1023

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20/41

Nguyn tc hot ng ca ADC Phi c khai bo #DEVICE cho bit dng

ADC my bit (thng l 8 hay 10 bit hochn) .

thnh ADC 8 bit bng cch chia cho 4

C thlp trnh bng cc cp nht, hay

dng ngt ADC

20


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Setup_ADC ( mode )Dng xcnh cch thc hotng b bini ADC . Xem

chi tit tng loi PIC khc nhau. Cc tham s thngdng:

ADC_OFF : tt hotng ADC_ _

xung clock IC ( mt 2-6 us ) ADC_CLOCK_DIV_2 : thi gian ly mu bng

xung clock / 2 ( mt 0.4 us trn thch anh 20MHz )

ADC_CLOCK_DIV_8 : thi gian ly mu bngxung clock / 8 ( 1.6 us )

ADC_CLOCK_DIV_32 : thi gian ly mu bng

xung clock / 32 ( 6.4 us ) 22


23/41

Setup_ADC_ports ( value )Xcnh chn ly tn hiu analog vin th chun s dng .Xem chi tit tng loi PIC khc nhau. Vref : p chun , Vdd :

p ngunSauy l cc gi tr thng dng cho value: ALL_ANALOGS : dng tt c chn sau lm analog (Vref=Vdd)

NO_ANALOG : khng dng analog, cc chn s l chn I /O

AN0 : A0 AN0_AN1_AN3: A0 A1 A3, Vref = Vdd

AN0_AN1_VSS_VREF: A0 A1 VRefh = A3

AN0_AN1_AN4_VREF_VREF: A0 A1 A5 VRefh=A3 VRefl=A2 AN0_AN1_VREF_VREF : A0 A1 VRefh=A3 VRefl=A2

AN0_VREF_VREF : A0 VRefh=A3 VRefl=A2

..

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24/41

Setup_ADC_ports ( value ).VD :

setup_adc_ports (AN0_AN1_AN3) ;

// A0 , A1 , A3 nhn analog , p ngun +5V cp cho IC sli n chun .

24


25/41

( ) Chn chn c vo gi tranalog bng

lnh Read_ADC ( ). Nn delay 10 us sau hm ny ri mi

_

Gi trchannel tuschn chc nngADC mi chip. Thng c gi tr:

0-chn A0 , 1-chn A1, 2-chn A2, 3-chnA3

25


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( ) D ADC ADC

.

H ADC ( ).

,

8 , 16 #DEICE ADC 10 .

Sly ADC tchn bn chn trong hm

Set_ADC_channel( ) trc . M 1 , ,

ADC( ) .

26


27/41

( )M , :

#DECE 8 10 11 16 ADC=8 0255 0255 00255 00255

ADC=10 01023

ADC=11 02047

ADC=16 065280 065472 065504 065535

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28/41

V d

28


29/41

V d

V d: c d liu t analog t chn AN0 xut ra port C#include

#device *=16 ADC=8


void main (void)

{

int8 value;

setup_adc(ADC_CLOCK_INTERNAL);

setup_adc_ports(ALL_ANALOG);

set_adc_channel(0);

set_tris_c(0x00);

while(1)

{

delay_ms(100);

value = read_adc();

output_c(value);

}

} 29


30/41

#

# *=16 ADC=8

# ( = 16000000)

()

8 ;

(ADCCLOCKINENAL);

(ALLANALOG);

(000);

(000);(1)

(0);

(1);

= ();

();

(1);

(1);

= ();

();

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CHNG 3: GIAO TIP NI TIP Nguyn tc hot ng port ni tip

Cc hm dng trong giao tip ni tip Cu hnh giao tip ni tip

V d

31


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Hot ng port ni tip Chng ny sgip bn vit chng trnh giao tip PC

VK truyn dliu cho PC xl , hoc nhn gi trtPCxl v iu khin

P 2 :

use e ay c oc = z

#use rs232 (baud=19200 , parity=n ,

xmit=pin_C6 , rcv=pin_C7 )

// = 19200 , , C6 , C7

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Cc hm dng trong giao tip

ni tip

33

C hm d t i ti


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ni tip

34


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ni tip

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printf ( string ) Printf ( cstring , values . . . )

Dng xut chui theo chun RS232 ra PC- string l 1 chui hng hay 1 mng k t

.

- value l danh sch cc bin , cch nhaubi du phy .

B % .

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( ) RC6 v RC7 cho RX v TX trong giao tip cngCOM , VDK PIC trang bphn cng phc vvic ny vi thanh ghi gi v nhn v cc bitbo hiu tng ng. Do khi dng RS232 htrtphn cng th KHBIT ( ) trvTRUE nu

v sn sng cho vic c , v trv0 nu chasn sng .

Hm ny c thdng hi vng xem khi no cdata nhn tRS232 c .

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V dgi dliu qua RS232#include


#use rs232 (uart1, baud=9600,parity=n,xmit=pin_c6,

rcv=pin_c7 )

char temp;

void main (void)

{

set_tris_d(0x00);

while(1)

{printf("%u",5);

}

}

39


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V dnhn dliu qua RS232#include


#use rs232 (uart1, baud=9600,parity=n,xmit=pin_c6,rcv=pin_c7 )

char temp;

{set_tris_d(0x00);

while(1)

{

if (kbhit())temp = getc();

output_d(temp);

}

} 40


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