Version 1.0 Dec 2015 www.estek.com.cn 1 KSR-5.0V2M2 Ultra Low Capacitance TVS Diode Array. Schematic and pinning diagram. Pin 4 – back side – GND. Mechanical date: A x = 380 um, A y =420um, Pad Size for Pin 1, 2 - 80 *90 um. Pad Size for Pin 3 -100*100 um. Chip thickness: 138+/-12um. Scribe Line width - 40um. Top Metal: Al - for wire bonding. Back side - Anode: Ti-Ni-Ag for soldering. Limiting values Parameter Symbol Conditions Value Unit Reverse Stand-off voltage V RWM - 5 V Peak Pulse Power P pp t p =8/20us 100* W Peak Pulse Current I pp t p =8/20us 4* A Electrostatic Discharge V ESD IEC 61000-4-2, level 4. >8 (Contact); >15 (Air). kV Max.operating temperature T j - +125 ºC Characteristics (Tj=25ºC) SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT V BR Breakdown voltage I R =1mA 6,1 7,0 - V I R Reverse leakage current V=5V - 0,9 uA V F Forward voltage I F =15mA - - 1,15 V V CL Clamping Voltage I pp =1.0A, t p =8/20us I pp =4.0A, t p =8/20us - - 15* 25* V C J Capacitance. Any I/O pin to Ground V R =0 V, f =1MHz - - 0,8 pF C J Capacitance between I/O pins. V R =0 V, f =1MHz - - 0,3 pF *- For Device testing 3 1 2 A 1 2 3 4 , GND
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Version 1.0 Dec 2015www.estek.com.cn 1
KSR-5.0V2M2
Ultra Low Capacitance TVS Diode Array.
Schematic and pinning diagram.
Pin 4 – back side – GND. Mechanical date: Ax= 380 um, Ay=420um, Pad Size for Pin 1, 2 - 80 *90 um.Pad Size for Pin 3 -100*100 um.
Chip thickness: 138+/-12um. Scribe Line width - 40um. Top Metal: Al - for wire bonding. Back side - Anode: Ti-Ni-Ag for soldering.
Limiting valuesParameter Symbol Conditions Value UnitReverse Stand-off voltage VRWM - 5 V Peak Pulse Power Ppp tp=8/20us 100* W Peak Pulse Current Ipp tp=8/20us 4* A
Electrostatic Discharge VESD IEC 61000-4-2, level 4. >8 (Contact);
>15 (Air). kV
Max.operating temperature Tj - +125 ºC
Characteristics (Tj=25ºC)SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
VBR Breakdown voltage IR=1mA 6,1 7,0 - V
IR Reverse leakage current V=5V - 0,9 uA
VF Forward voltage IF=15mA - - 1,15 V
VCL Clamping Voltage Ipp=1.0A, tp=8/20us Ipp=4.0A, tp=8/20us
- - 15* 25*
V
CJCapacitance. Any I/O pin to Ground VR=0 V, f =1MHz - - 0,8 pF
CJCapacitance between I/O pins. VR=0 V, f =1MHz - - 0,3 pF
*- For Device testing
3
1
2
A
1 2
3
4 , GND
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