ECE 301 – Digital Electronics Karnaugh Maps and Determining a Minimal Cover (Lecture #8) The slides included herein were taken from the materials accompanying Fundamentals of Logic Design, 6 th Edition, by Roth and Kinney, and were used with permission from Cengage Learning.
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ECE 301 – Digital Electronics
Karnaugh Mapsand
Determining a Minimal Cover
(Lecture #8)
The slides included herein were taken from the materials accompanying
Fundamentals of Logic Design, 6th Edition, by Roth and Kinney,
and were used with permission from Cengage Learning.
Spring 2011 ECE 301 - Digital Electronics 2
Four-variable K-maprow # A B C D minterm
0 0 0 0 0 m0
1 0 0 0 1 m1
2 0 0 1 0 m2
3 0 0 1 1 m3
4 0 1 0 0 m4
5 0 1 0 1 m5
… …
11 1 0 1 1 m11
12 1 1 0 0 m12
13 1 1 0 1 m13
14 1 1 1 0 m14
15 1 1 1 1 m15
Spring 2011 ECE 301 - Digital Electronics 4
Minimization: Example #7
Use a Karnaugh map to determine the minimum POS expression
For the following logic function:
F(A,B,C,D) = Σ m(0,1,3,4,5,7,8,11,14)
Specify the equivalent maxterm expansion.
Spring 2011 ECE 301 - Digital Electronics 5
Minimization: Example #8
Use a Karnaugh map to determine the minimum SOP expression