JPEG 2000 www.intopix.com intoPIX JPEG 2000 Encoder and Decoder IP-Cores respect and protect high value images. Handling simultaneously deep color, low and high data rates and extensive JPEG 2000 encoding know-how, intoPIX IP-Cores enable best-in-class picture quality. Amongst all the existing JPEG 2000 FPGA products, the intoPIX solution is currently the most widely adopted by the industry. intoPIX IP-Cores achieve low and high frame rate and resolution with unprecedented performances. They are available and optimized for the most recent FPGA platforms. intoPIX IP-Cores combine more power, more flexibility and more efficiency while ensuring lower consumption, lower temperature dissipation and lower bill of material. Fully benefiting from a modular architecture and completed with a wide range of companion IP-Cores, the intoPIX solutions provide an easy, timely and cost-effective way to implement JPEG 2000 technology. The most powerful and flexible JPEG 2000 solution available today FPGA IP-cores Take IMAGING to the NEXT LEVEL High Quality Picture > From Lossy to Lossless compression Customizable Design > Single Chip FPGA > Altera Stratix IV & V > Altera Aria II & V > Altera Cyclone V Cost Effective > Reduced BOM > Ultra dense > Optimized per application Future-Proof > HD up to 120 fps > 4K & 8K up to 60 fps > Low and High bitrate up to pure Lossless > 3D ready > Zero-Latency capable (< 5 ms) Companion IP-Cores > DDR2 / DDR 3 Memory Controller > Memory Arbiter > 3G-SDI Interface > Video Serializer / Deserializer > UDP Protocol Manager Security IP-Cores > AES Security IP-Cores > RSA Security IP-Cores > Hash Function Training and support for integration IP-CORS-altera flyer-jan. 13
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www.intopix.comIP-COREPORTFOLIO-april11
JPEG 2000
www.intopix.com
intoPIX JPEG 2000 Encoder and Decoder IP-Cores respect and protect high value images. Handling simultaneously deep color, low and high data rates and extensive JPEG 2000 encoding know-how, intoPIX IP-Cores enable best-in-class picture quality. Amongst all the existing JPEG 2000 FPGA products, the intoPIX solution is currently the most widely adopted by the industry.
intoPIX IP-Cores achieve low and high frame rate and resolution with unprecedented performances. They are available and optimized for the most recent FPGA platforms.
intoPIX IP-Cores combine more power, more flexibility and more efficiency while ensuring lower consumption, lower temperature dissipation and lower bill of material.
Fully benefiting from a modular architecture and completed with a wide range of companion IP-Cores, the intoPIX solutions provide an easy, timely and cost-effective way to implement JPEG 2000 technology.
The most powerfuland flexible
JPEG 2000 solutionavailable today
FPGA IP-cores
Take IMAGING to the NEXT LEVEL
High Quality Picture> From Lossy to Lossless compression
Customizable Design> Single Chip FPGA> Altera Stratix IV & V> Altera Aria II & V> Altera Cyclone V
Cost Effective> Reduced BOM> Ultra dense> Optimized per application
Future-Proof> HD up to 120 fps> 4K & 8K up to 60 fps> Low and High bitrate up to pure Lossless> 3D ready> Zero-Latency capable (< 5 ms)
APPLICATIONSCamera on-board encoderField recorderPost-production video server
The Lossless FamilyJPEG 2000 for pristine content
TheintoPIXLosslessencodersanddecoderspreserve the origi-nal image quality and value. They support any image format up to 4K+(4096x3112)withcolordepthupto12bitpercomponentandJPEG2000Losslesscompression.
• SingleChip• Fullyflexibleimageformat upto4Ksingletile• LosslessEncoding APPLICATIONSArchivingStore and ForwardMedicalAerospaceGeospace
The Digital CinemaFamilyDCI compliant IP-Cores
TheintoPIXDigitalCinemaIP-Coresareoptimizedtomeetthe highest requirements of Digital Cinema including 2K-120 fps and 4K-3D formats.
TheDigitalCinemasolutionenablestheintegrationwithinasingle chip of a complete image processing chain, i.e. decryp-tion-decoding-watermarkingandencryption,togetherwithvideoI/Ointerfaces,systemcontrolandsysteminterfaces.
APPLICATIONSEmbedded MediablockDigital Cinema ExhibitionDigital Cinema Post-ProductionFaster than real-time encoderTheme park advanced display
The Ultra HD4K/8K FamilyJPEG 2000 for extreme resolutions
TheintoPIXUltraHD4K&8KIP-Coresgoone step further interms of encoding power and high-end applications. This rangeofIP-Coresgivesyouaccesstothenewdefined ITU UHDTVstandards, 4K and 8K.
Ultra Low Latency OptionJPEG 2000 for Live streams
TheHDfamilyalsooffersanUltraLowLatencyoptionthatenablesyoutocarryHDstreamswithinthenetworkwith a point-to-point latency below 5 milliseconds while guaranteeing high image quality.
APPLICATIONSContribution transceiverLive events transmitterWireless TransmissionRemote control & Monitoring
FPGA IP-Cores
NEW
JPEG 2000
Take IMAGING to the NEXT LEVEL
FPGA IP-Cores
IP-CoreEvaluation KitThe full evaluation of a specific codec represents a critical stage in the technical decision process.
intoPIX offers the possibility to gain access to an evaluation license that allows assessment of the capabilities and characteristics of thefullyfunctionalCore.Inpartnershipwithboardmanufacturers,intoPIX can also provide potential customers with an ideal hard-ware platform upon which to complete this evaluation phase.
AES Encryption-Decryption CoresTheIPX-AESModulesareencryptor-decryptorIP-Coresprovi-ding an efficient FPGA implementation of the Advanced Encryption Standard (AES).
TheIPX-AESmodulescanbecustomizedforeachspecificapplication.Theysupportanextremelywiderangeofbitrates.Itsflexibilityallowscombiningseveralfunctionsandoperatingmodeson very small footprints.
Hash function CoreTheIPX-HMAC-SHA-1IP-Coreisthehashingfunctionrequiredforcontent integrity check and content identification as specified in DCIdocuments.Itenablescomputationofthekeyed-hashmes-sageauthenticationcode(HMAC)foraudioandvideoassets.
RSA Public Key CryptographyAccelerator CoreThemodularexponentiationacceleratorIPX-RSAisanefficientarithmeticcoprocessorfortheRSApublic-keycryptosystem.Itperformsthemodularexponentiationcalculationandthereforeoffloadsthemostcomputer-intensiveoperationofRSAfromthemainprocessor.TheRSAcryptosystemcanbeusedforpublickeyencryption,decryptionandsignature/authentication.
Companion IP-CoresintoPIXproposescompanionIP-Coresspecially designed to ease the integrationof JPEG 2000 and minimize your time-to-market.
DRAM Memory controller CoresThe IPX-DDR2 and IPX-DDR3 cores guarantee efficient memory accessesbetween the intoPIXJPEG2000 IP-CoresandexternalDDR2orDDR3DRAMmemory.
TheIPX-DDR2corerunsupto266MHzona64bitphysicalbusreachingpeak transferratesof34Gbit/s. Providinga low foot-print,highefficiencyDDR2memorycontroller,itsupportsvarioususerinterfacesof8,16,32or64bitandawidevarietyofDDR2chip vendors and memory chip configurations.
Memory arbiter CoreTheIPX-MAmemoryarbiterenables the external memory to be sha-red between different processes i.e. frame buffers, watermarking etc.Itisa4-portarbiter.Eachportpresentsthesamewidthof32,64,128or256andrunsupto133MHz.
Stream Serializer-Deserializer CoreThe IPX-SERDES Serializer Companion Core transforms several parallel video streams into a single one.ThisserializedvideostreamcanthenbefedintooneoftheintoPIXCoresforhighspeedproces-sing.TheDeserializerCoreprocessestheoutputstreamintoseve-ral parallel video streams in order to recreate several independent video channels. These cores are typically used to implement 3Dstereoscopic or multi synchronous channel applications.
3G/HD-SDI CoreTheIPX-3G-SDIIP-Coresupportsdynamic switching between SD, HD and 3G-SDI standardsinbothTransmittingandReceivingmodes,withautomaticstandarddetectionandwithoutFPGAreprogramming.
Furthermore, the IPX-3G-SDI canalso handleDual3G-SDI chan-nels,allowingtheprocessingofmultiple3Glinks.TheIPX-3G-SDImeets1080p-60Hzaswellas4Kapplications.Thiscore is verycompact and very efficient.
UDP Protocol Manager CoreThe IPX-UDP IP-Core handles the reception of UDP packets on a gigabit Ethernet link. This link could be used to carry video, audio and subtitle assets.
TheIPX-UDPincludesaMACcontrollerandaprotocolhandler.TheMACcontroller isbasedontheTri-ModeMACcontroller,hard-co-ded within the Altera technology. intoPIX’ IP configures the MAC controllerandsetsuptheexternalPHYchip.
The protocol handler manages the user UDP protocol. It is res-ponsibleforreceivingvideo/audiopacketsaswellascheckingdataintegrity through IP/UDPchecksumandEthernetCRC.Finally, italso manages the connection integrity and error handling.
Information provided is accurate at the time of publication, however, no responsibility is assumed by intoPIX for its use, nor for any infringements of patents or other rightsof third parties that may result from its use. Specifications are subject to change without notice. No license is granted by implication or otherwise under any patent or patent rightsof intoPIX. Trademarks and registered trademarks are the property of their respective owners.