Jntuk Edc Unit Vii Notes

8/11/2019 Jntuk Edc Unit Vii Notes

1/24

SASIDHAR SAJJA

DEPARTMENT OF ECE

1

UNIT VII

BIASING & STABILIZATION

AMPLIFIER:

-

A circuit that increases the amplitude of given signal is an amplifier

-

Small ac signal applied to an amplifier is obtained as large a.c. signal of same

frequency at output.

Biasing a Transistor Amplifier.

- Input signal is applied between base and emitter

- Output is taken out between Collector and emitter.

ICC 3.5mAIcmax 3mA AC load line

1.5mA DC load line

VCE

12V D VCE max 24V.

DC LOAD LINE:

- VCC= VCE+ ICRL

- 24V = VCE+ 0.

VCE Max = VCE= 24V-

For Ic max, transistor is in saturation.

VCE drop is 0.2V, Ideally VCE = 0

VCC= VCE + ICRC

VCC= 0 + ICRC or Icmax=CC

C

V

R= 24/8k = 3mA

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3/24

SASIDHAR SAJJA

DEPARTMENT OF ECE

3

Quiescent IBQ =4.76

0.095250

CI mA

= =

Quiescent IEQ = ICQ + IBQ = 4.855mA.

Q2) For transistor amplifier shown in the fig. RL = 1.5kand VBE= 0.7VSolution:

i) Draw DC load line

ii) Determine operating point

iii) Draw AC load line

i) DC load line

DC load line

VCC= VCE+ IC(RC+ RE) (ICIE)VCEmax+ VCC= 12V

( )

12max 6

1 1

CC

C E

VIc mA

R R K= = =

+ +

ii) Operating Point

Voltage across R2,( )

22

1 2

4, 12 4

8 4R CC

R KV V volts

R R K= = =

+ +

VR2= VBE+ IERE or2

3

4 0.7

1 10

BCVR VIERE

= =

IE = VCC IC(RC+ RE)= 12 3.3 x 10

-3(2 x 10

3) = 5.4 volts

Therefore operating point or quiescent point Q (5.4 V1 3.3mA)

iii) AC load lineWe should VCEmax & ICmax.

AC load resistance1 1.5

0.62.5

C Lac C L

C L

R RR R R k

R R

= = = =

+

VCEmax = VCEQ + IcQ. Rac.

= 5.4 + 3.3 x 10-3x 0.6 x 103= 7.38 Volts (Point C)

max CE

ac

V QIc IcQ

R= + = 3

3

5.43.3 10 12.3

0.6 10mA

+ =

(Point D)

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4/24

SASIDHAR SAJJA

DEPARTMENT OF ECE

4

THERMAL RUN AWAY:

- Collector current IC= IB+ (+1) ICBO- , IB, ICBOall increase with temperature

-

ICBOdoubles for every 10C rise in temperature-

Collector current causes junction temperature to rise, which in term rises

- ICBOrise in Ic.-

This cumulative process leads to collector current to increase further and

transistor may be destroyed.

-

This phenomenon is called thermal Run away.

- Remedy:- 1) To reduce base current with rise in temperature using NTC components

- 2) Making collector larger in size and using heat sink to dissipate heat.

-

STABILITY FACTOR (S)

-

The extent to which the collector current IC is stabilized with varying Ico is

measured by stability factor S.

- It is defined as the rate of change of collector current to the change in Ico,

keeping IBand B as constant.

- , &C

B

CO

IS I

I

=

Constant Or C

co

dIS

dI=

-

Collector current Ic = IB + (+1) ICO - (1)Differencing eqn. (1) with repeat to Ic.

( 1)c coB

c c c

dI d I d I

dI dI dI

+= =

1 ( 1) COB

C C

DIdI

dI dI = + +

11 B

c

dI

dI S

+ =

Or1

1

SdIB

dIc

+=

-

S should be as small as possible to have better stabilityStability Factor S and S.

' , &c c

BE BE

dI IS Ico

dV V

=

constant

" , &c c co BE dI I

S I Vd

=

constant

Methods of Transistor Biasing: -

Types of Biasing: -a)

Fixed Bias or base resistor Bias

b)

Collector to Base bias or biasing with feet back resistor

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6/24

SASIDHAR SAJJA

DEPARTMENT OF ECE

6

- If the collector current increases due to increase in temperature or the transistor

is replaced by one with higher , the voltage drop across RCincreases.- So, less VCEand less IB, to compensate increase in Ic i.e., greater stability

( )CC B C C B B BE V I I R I R V = + + + - (1)

=B C C C B B BE

I R I R I R V+ + +

= ( )B C B C C BEI R R I R V+ + +

Or CC BE C C B

V V I RI

RC RB

=

+ - (2)

CIB

IC C B

Rd

d R R=

+ - (3)

Stability Factor:

1

1 B

C

SdI

dI

+=

Putting the value of dIB/ dICfrom equation (3)

1 1

1 1C C

C B C B

SR R

R R R R

+ += =

+

+ +

Note: - 1) Value of S is less than that of fixed bias (which is S = 1+)1) S can be made small and stability improved by making RB small or RC

large.

- If Rc is small S = 1 + , i.e., stability is port.--

-

This collector to base bias is not satisfactory for transformer coupled

amplifier.

-

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7/24

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DEPARTMENT OF ECE

7

Self bias or Potential Divider Bias: -

- Required base bias is obtained from the power supply through potential

divider R1& R2.-

In this circuit voltage across Reverse biases base emitter junction. Whenever

there is increase in this collector circuit voltage across RE increases causing

base current to diverse which compensate the increase in collector current.

- This circuit can be used with low collector resistance.

2

1 2

B

R Vcc

V R R= + By applying thevenins

theorem, the cut can be replaced and

1 2

1 2

B

R RR

R R=

+.

.

Equivalent Circuit:-

Writing loop equation for the basic

loop shown

= IBRB+ VBE+ RE(IB+IC)

= IBRB+ VBE+ IBRE+ ICRE

= IB(RB+RE) + VBE+ ICRE

Or IB(RB+RE) = VB VBE- ICRE

ICRE

Differencing wrt. Ic,

( ) C EB B BEB EC C C C

dI RdI dV dV R R

dI dI dI dI + =

Or ( ) 0 0BB E E

c

dIR R R

dI+ =

Or B E

c B E

dI R

dI R R

=

+ - (1)

Stability Factor

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8/24

SASIDHAR SAJJA

DEPARTMENT OF ECE

8

1

1 B

c

SdI

dI

+=

Putting the value of B

C

DI

DIfrom equation (1)

1 1 1

1 1 B E EE E

B EB E B E

SR R RR R

R RR R R R

+ + += = =

+ + + ++ +

Dividing N & D by RE

( )1 1

(1 ) (2)

1

B E B

E E

B E E B

E E

R R R

R RSR R R R

R R

++ +

= = + + ++ +

If( )

1 0 10, (1 ) 1

1 0 1

B

E

RS

R

+ += = + = =

+ + (3)

If ( ) ( )1

, 1 11

B

E

RS

R

+ = = + = +

+ +

So, (a) for smaller value of RB stability is better, but large power will be wasted

in R1 & R2. S is independent of B.

(b) For fixed RB/RE, S increases with (see eqn. 2) i.e., stability decreaseswith increase in .

Bias compensation

a) Diode bias compensation

IR= ID+ IB(IDis reverse saturation Current increases with temp.)

When temperature increases, ICincreases at the time, IDalso increases,

making IBto Reduce and controlling IC.

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9/24

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DEPARTMENT OF ECE

9

b) Thermistor Bias compensation: -- RT is having negative temp. Coefficient

i.e., temperature RT .RT

- When temperature increases RT decreases

thereby reducing base bias voltage &base current and hence collect to current.

c) Sensistor Bias compensation.

- Rs is sensistor (resistance) having

positive temperature coefficient.

- When temp. Rs. VR2

Base bias voltage Base current .

Collector current controlled.

Biasing of FET

Source self-Bias circuit:

This configuration can be usedto bias JFET pr depletion mode

MOS FET.

- Voltage across RSis used to reverse

bias the gate as voltage across REis

used for self-bias of CEamplifier.

- Relation of drain current, VGS, Vp is given

by IDS= IDSS(1 VGS/VP) 2.

-

Since gate current in negligible, source resistance can be

found as RS=GS

D

V

I

-

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10/24

SASIDHAR SAJJA

DEPARTMENT OF ECE

10

Biasing against device variation: -

VGS= VGG IDRS. (Gate current is very small & VRGis small)

-

VGSis always negative- There may be a change in the drain current Id, when even a device is changed

- If a device change results in increase in Id, it leads to more voltage drop across

RSand VGSincreases. So, Idwill be reduced.-

In this way the circuit takes care of device variations.

FET as a voltage variable Resistor: - ID

- When VDS< VP VGS= 0V

Id VDS, when VGSis constant. VGS= 1V

i.e., FET acts as a resistance. VGS= 2V- In this region FET is used as a VGS= 3V

Voltage controlled resistor. Or

Voltage variable resistor. OrVoltage dependant resistor. 0 VP VDS

-

-

- Application:- There many applications. Automatic gain control of RF

amplifier of a receiver is one of the applications.

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11/24

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DEPARTMENT OF ECE

11

- FET is biased in such a way that when transistors conducts more, then the

resistance offered by FET is more.- The causes more reverse bias to emitter base junction of transistor

and it conducts less.- In this way Automatic gain control (AGS) is achieved.

Q) Find out stability factor of the circuit given below: (May 2005)

Stability factor of self-biased

Circuit given by:

( )1

1

1

B

E

B

E

R

RS

R

R

+= +

+ +

1 2

1 2

B

R RR

R R=

+

5 50 50 4.5 4500

5 50 11k k

= =

+

4500 45

100

B

E

R

R= =

( )1 45

50 1 24.54

1 50 45

S + = + =

+ +

Q2) For the circuit shown, determine the value of Ic and VCE. Assume VBE = 0.7V

and = 100 (Sep.06)

( )2

1 2

. 10 5 503.33

10 5 15

10 5 503.33 .

10 5 15

cc

in

th

V R kV volts

R R k

R k k k

= = = =

+ +

= = =

+

Vth = IBRB + VBE+ IERE

= IBRB + VBE + (+1)IBRE

Vth VBE= IB(RB+(+ 1)RE)

Or( )1

th BE

B

B E

V VI

R R

=

+ +

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12/24

SASIDHAR SAJJA

DEPARTMENT OF ECE

12

=3.33 0.7

3.3 101 500K

+

2.63 2.6348.88 .

3300 50500 53800

. 4888 .

B

C B

I A

I I A

= = =+

= =

4888 48.88 49.6E C BI I I A= + = + =

Part (b) VCE= ?

VCC= ICRC+ VCE+ IERE

Or VCE= VCC ICRC IERE

= 10 4888 x 10-6

x 103 4937 x 10

-6x 500

= 10 04.888 2.468= 2.64 volts

IC= 4.89 mA

VCE 2.64 Volts

Q3) For the JFET shown in the circuit with the voltage divides bias as shown below.

Calculate VG, VS, VDand VDSif VGS= -2V. (Sep. 2006)

Solution:

( )

2

1 2

. 15 4 153.75

12 4 4

DDV R kVG V

R R k

= = = =

+ +

Since gate circuit is negligible

Voltage drop across RG= 0VGS= VG IdRs.

- 2 V = 3.75 - IdRS

IdRS= 3.75 + 2 = 5.75V = Vs.

Id = 5.75/1k = 5.75mA.Voltage drop across RL = IDR2

= 5.75 x 10-3 x 500 = 2.875 V

VDS= VDD IDR2 IDRS.

= 15 2.875 8.75 = 6.375 volts

VD= VDD IDRL= 15 2.875 = 12.125V.

3Q) For the circuit shown, calculate VE, IE, Ic and Vc. Assume VBE= 0.7V.

(Sep. 2006)Solution:

VB= VBE+ VE or VE= VB VBE= 4 0.7 = 3.3V

3.31

3.3

E

E

E

VI mA

R k= = =

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13/24

SASIDHAR SAJJA

DEPARTMENT OF ECE

13

Since is not given, assume Ic IE= 1mA.VC= VCC ICRL= 10 1 x 10

-3x 4.7 x 103= 5.3 volts

4 Q) In the circuit shown, if IC= 2mA and VCE= 3V, calculate R1& R3

(Sep. 2006)

Solution:

20.02

100B

Ic mAI mA

= = =

2 0.02 2.02E C BI I I mA= + = + =

2.02 500 1.01E E EV I R mA volts= = =

2 1.01 0.6 1.61R E BEV V V volts= + = + =

2

2

1.61 0.16110

RVI mAR k= = =

VR1= VCC VR2= 15 1.61 = 13.39 volts

( )1

1

13.3973.97

0.161 0.02

R

B

VR k

I I mA= = =

+ +

VR3= VCC VE VCE; VCE= 3V

VR3 = 15 1.01 3 = 10.99 volts

3

3

10995.49

2

R

C

VR k

I mA= = =

5Q) Design a self-bias circuit for the following specifications.VCC = 12V, VCE = 2V, IC= 4mA, hfc= 80. (Sep. 2006)

Solution:

IB=CI

= 4mA / 80 = 0.05mA

IE= IC+ IB= 4 + 0.05 = 4.05 mALet VB= 4V.

R2= 4k and R1= 8K

1 2

1 2

4 8 32 26674 8 12

B R RR k kR R = = = = + +

VB= IBRB+ VBE+ VREOr VRE = VB IBRB VBE= 4 0.05 x 10

-3x 2667 0.7

= 4 0.133 0.7 = 3.167 volts

3.1677.82

4.05

RE

E

E

VR

I mA= = =

VCC= VRC+ VCE+ VRE (OR)VRC= VCC VCE- VRE

= 12 2 3.167 = 6.833 volts

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14/24

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DEPARTMENT OF ECE

14

Rc=RC

C

V

I=

6.833

4 mA= 1708.

R1= 8k, R2= 4k, Rc = 1708and Rc = 782.But resistor of 1708 and 782 are not available commercially. We have to choosecommercially available resistors, which are nearest to these values.

Numerical of Unit III Question Bank1 Q) A 15 0 15 volts (rms) ideal transformer is used with a FWR with diodes

having fwd drop of 1 volt. The load resistance in 100and capacitor of 10,000 fis used on filter. Calculate the Dc load current and voltage.

(JNTU 2005)

Solution: -

4

DC

DC m

IV V

fc= where f is power line frequency. C in farads.

Vrms = 15V, Assume voltage drop (rms) across diode as 1V.

Vrms across load = 14V.dc dc

dc m

dc dc

dc

4170 I 4170 IV = V - = 19.8 -

C 10,000

100 I ; 19.8 (or) I ; 0.198 Amp

V = 19.8 Volts.

Vm = Vrms 2 = 142 = 19.8 volts.

2 Q) A FWR is used to supply power to a 2000load, choke of 20H and capacitor of16f are available. Compute ripple factor using filter 1 (i) one inductor (ii) onecapacitor (iii) single L type.

Solution: RL= 2000; C = 16f; L = 20H.

i) One Inductor Filter

32000 1 6.25 10 0.00616000 16000 20 160

LRrL

= = = = =

(ii) One capacitor filter:

32410 2410 75.31 10 0.07516 2000

L

rCR

= = = =

(iii) Single LC Type Filter

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15/24

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DEPARTMENT OF ECE

15

0.83 0.83

0.002520 16

rLC

= = =

(iv) Selection 2016 16

6

1 1

3330 3330325 10 .000325

16 16 20 2000L

rCC L R

= = = =

Filter in the Order of Merit:

a) Capacitor Filter (b) Inductor Filter

c) L Section (d) Section.3 Q) Design a full wave rectifier with an LC filter to provide 9V DC at 100mA with a

max ripple of 2%. Given line frequency f = 60Hz. (JNTU 2000)

Solution: -Given VDC= 9V, f = 60Hz.

IL100mA, r = 2% = 0.02To find: L, C.

0.83r= when f = 60 Hz. (1) (1)

Else2 1 1

. .3 2 2 .

rwc wL

=

Where LC= RL/ 1130.

Or 0.83 41.50.02

LC= = (2)

Critical Inductance (value of Inductance for which diode conducts continuously)

9.; 90

1130 100

DCL

C L

DC

VRL R

I mA= = = =

Lc = 41.5 - (2)

3

41.5521

79.6 10C f = =

Transformer rating Vrms = ?

Diode ratings Piv = Vm

current rating = load current

L = 796mHC = 521f

4 Q) A FWR operating at 50 Hz i.e., to provide DC current of 50mA at 30V with a

80f, C type filter. Calculate (i) Vm the peak secondary voltage of thetransformer (ii) Ratio of surge to mean currents of diode (iii) The ripple factor of

the output. (JNTU 2002)

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16/24

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DEPARTMENT OF ECE

16

S C

d S

V -VCurrent through the diode at any time

R +R

Solution: -

Given f = 50 Hz, C = 80fIDC= 50mA To find Vm= ? ratio of surge to mean current

VDC= 30V.

Part (i) Vm= ?

VDC= 0.636 Vm. Or Vm= VDC/0.636 = 30/0.636 = 47.17 volts.

Part ii Ratio of surge to mean current

----------------------------------------X-------------------------X--------------------------------------

Surge Current

It is the current flowing through the diode, when the power supply is just switched

on i.e., at time t = 0+. At time t = 0+. Voltage across capacitor will be zero.

--------------------------------X-------------------------------------X --------- X---------------------

When Vc = 0, Id will be max = maxS m

d S d S

V V

R R R R=

+ +

This is called surge current.

Mean diode current S dcd

d S

V VI

R R

=

+

Ratio of surge current to mean current =( )

( )d sm

d s m dc

R RV

R R V V

+

+

=47.17 47.17

2.7547.17 30 17.17

m

m DC

V

V V= = =

Note: Designer must cater for 3 times the required average current.

Part III : Ripple factor2410

L

rCR

= f = 60 Hz.

Or Ripple factor1

4 3L

rfcR

=

2300 3050

L

Vdc V R V

Idc mA= = = = 600

6

6

1 100.006

16627687.754 3.50.80 10 600r

= = =

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17/24

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DEPARTMENT OF ECE

17

5 Q) For a FWR circuit AC voltage input to transformer primary is 115V. Transformer

secondary voltage is 50V, RL=25. Determinei) Peak DC component, RMS and AC component of load voltage

ii) Peak DC component, RMS and AC component of load current.

(June 2002)

Solution:

Given Vrms = 50V, to find Vm, Vr, Im, Ir.

RL= 252

rVVm Vdc =

Part (i)

2

2; 2,50 70.7Rms Rms

VmV orVm V Volts

V= = = =

,rV

rVdc

= r of FWR (without filter) = 0.48

Vdc = 0.637Vm= 0.637x7.07=45 volts

Vr = , Vdc = 0.48 x 45 = 21.6 volts

Peak DC component = VDC + Ripple voltage = 45+21.6 = 66.6 volts

66.6V = = = 47 Volts

2 2rms

peak

Part II

m

70.7I 2.828 .

25

21.60.864 .

25

L

L

VmAmps

R

VrIr Amps

R

= = =

= = =

Peak DC current component = 66.6/25 = 2.664 Amps.

Runs DC current component = 47/25 = 1.8 Amps.

6 Q) Calculate ripple factor of capacitor filter with peak rectified voltage of 20V and C

= 50 f and IDC= 50mA. (June 2004)Solution: -

Vm = 20V, Idc = 50mA, C = 50f. VDCVr Vm = 20V

4DC

IdcV Vm

fc=

Suppose f = 50Hz, Then3

6

50 1020

4 50 50 10DCV

=

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18/24

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DEPARTMENT OF ECE

18

=1000

20 20 5 15200

volts = =

15 150 1000 30050 50

L VDCRIdc mA = = = =

61 1 10 100 1= 0.192

4 3 4 3 50 50 300 4 3 25 3 3 3L

rfcR

= = = =

Photo Transistor:Phototransistor is a BJT for which no base bias is given. When light falls on the

junction base current flows and transistor conducts.

Ic(mA)Symbol.

7.0

6.0

5.0

4.0

Base 3.0

current H = 1.25 mw/Cm2

IBA0 20 40 60 Vcc(V)

- Collector current does not vary much with Vcc

- Collector current increases with light intensity.Radiation flux

Density H(mw/in2)

Advantages of photo diode.

- Will produce ICmuch higher (times) IC(by photo diode)

Applications:

Capt. isolators are used to isolate input source and load i.e., high isolation logic

gates etc.,

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19/24


20/24

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DEPARTMENT OF ECE

20

5 Q) The readings obtained from a JFET are as follows: -Drain to source voltage (volts) = 5 12 12

Gate to source voltage (volts) = 0 0 -0.25Drain current Id (mA) = 8 8.2 7.5

Determine (i) AC drain resistance (ii) Trans. Conductance (iii) Amplification

Factor

SOLUTION:

(i) Ac Drain Resistance / constantDSd GS

VR V

ID

=

VGS constant

=3

12 5( ) 735

8.2 8( ) 0.2 10

Voltsk

mA

= =

(ii) Trans conductance

d

m

I

g VGS

= VDS constant

=8.2 7.5 0.7 70

2.80 ( 0.25) 0.25 25

mAm m

= = =

(iii) Amplification factor = gm. Rd = 2.8 x 10-3x 35 103= 98

6 Q) An SCR is used as a switch to supply an inductive load of L = 20H and negligible

resistance from a DC source of 100V. If the latching current of SCR is 100mA,find the min. pulse width of trigger pulse.

i

Solution:

SCR L RV V V V = + + VSCR= 0 + VL + 0

.

diV L

dt= VL 20

Ldt di

V= 100V

Integrating both sides VR 0320. .100 10 0.02sec.

100

Lt i

V

= = =

Minimum pulse width required is 0.02 sec.

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21/24

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DEPARTMENT OF ECE

21

NUMERICAL OF QUESTION BANK.

1 Q) An NPN transistor used in self-bias CE amplifier has a value of = 49 attemperature of 25c. The circuit has R1 = 90k. Vcc and Rc are adjusted toestablish Ic = 2mA. Calculate stability factor. (JNTU 2001)

Solution:

Stability factor

( )1 1

1

RB

RES

RB

RE

+ + =

+ +

& RE are given:1 2

1 2

90 10 900 9

9 ; 990 10 100 1

R R RB k

RB kR R RE k

= = = = = =+ +

( )( )

( )

1 49 1 9 50 108.47

1 49 9 59S

+ + = = =

+ +

2 Q) In the self-biased CE amplifier Rc = 4k, R1 = 90k, R2 = 10k, B = 45 andVBE = 0.6V. Compute stability factor for RE (i)1k (ii) 1.5K(iii) 1.8k.

(Dec. 2003)

Solution: -

Stability factor of self-bias circuit

( )1 1

1

B

E

B

E

R

RS

RR

+ +

=+ +

Given, = 45, RE =1 2

1 2

90 10 9009

90 10 100

R RRB k

R R

= = = =

+ +

Case (i) RE = 1K( )( )1 45 1 9 460

8.361 45 9 55

S+ +

= = =+ +

99

1

RB

RE= =

Case (ii) 91.5 , 61.5

KB kRE kKE k= = =

( )( )1 45 1 6 6.191 45 6

S + += =+ +

Case (iii)9

1.8 , 51.8

RB kRE k

RE k= = =

( )( )1 45 1 55.41

1 45 5S

+ += =

+ +

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22

BIAS CONPENSATION:

1 Q) Explain Bias compensation using sensistors.

Ic = (+ 1) ICBO + IB.For correct operation of transistor as an amplifier collector current should be

independent of temperature variations.

But when temperature increases ICBO increases. So to keep the collector currentIc constant, we must reduce current IB to compensate increase in ICBO. The technique

used is called Bias compensation.

+VCE

1. Sensistor compensation

R1 Rs RE

As shown in the diagram Rs can be

Connected across Rs (or it can beConnected across RE).

R2 RE

Sensistor (Rs) in a positive temperature

Coefficient resistance i.e., value of Rs increases with rise

in temperature. So, when temperature increases resistance offered by Rs (sensistor)

increases. So, parallel combination of Rs and R1 with also offer more resistance. More

voltage will be dropped across than and less voltage is applied to base. This reduces the

base emitter bias voltage resulting in reduction of base current. In this way sensistor

reduces the base current to compensate increase in ICBO due to rise in temperature.

1 b) In the circuit shown, if Ic = 2mA and VCE = 3V, calculate R1 and R3.

(May 07, Aug. 06, 07)

+ Vcc 15V

Solution: R1 R3

I+IB Ic

I

R2 10k R4500

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DEPARTMENT OF ECE

23

32 100.02

100

IcIB mA

= = =

2 0.02 2.02IE Ic IB mA= + = + = VE = IC RE = 2.02mA x 500 = 1.01 volts2 1.01 0.6 1.61E BEVR V V volts= + = + =

2

2

1.610.161

10

VRI mA

R k= = =

1 2 15 1.61 13.39CCVR V VR volts= = =

( )1

1

13.3973.97

0.161 0.02B

VRR K

I I mA= = =

+ +

3 CC E CE VR V V V =

= 15 1.01 3 = 10.99 volts3

3

10.995.49

2

VRR k

Ic mA= = =

1 c) Compare BJT, JFET and MOS FET in all respects. (Aug 06, 07)

S.No. BJT JFET MOS FET

1 Types NPN, PNP, Bipolar Nch JET, Pch

JFET, Unipolar

Enhancement &

depletion type, Unipolar

2 Current Both majority

&minority charge

carriers are used

Only majority

charge carriers are

used

Only majority charge

carriers are used.

3 Input

impedanceLow (k) High (100 M) Very high (1015)

4 Control Current controlled

device input current

controls outputcurrent

Voltage controlled

device. Input

voltage controlsoutput current

Voltage controlled

device.

5 Fabrication Difficult Easy Easy

6 Handling Easy No, preachedrequired

Easy Difficult, specialprecautions to be taken

7 Power

Dissipation

High Low Very low

8 Lifetime Less More Less

9 Switching

speed

Less High High

4 Q) Explain in detail about Thermal runaway and Thermal resistance.

(May 07)

Thermal Run away:

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Ic = IB + (+1) IcBo.

Leakage current IcBo increases with temperature and also increases with rise intemperature. IcBo doubles with every 10c rise in temperature. Therefore collectorcurrent also increases with temperature. More collectors current in turn will give rise to

more temperature at the junction. This problem of self-heating is called Thermal run

away and may result in damaging the transistor.Thermal Resistance (P 288 MMH)

The steady state temperature rise at the collector junction is proportional to the

power dissipated at the junction.

T = TJ TA= k PD

Where T = rise in temperatureTJ = Temperature at junctionTA = Ambient temperature

PD = Power dissipated

K = Proportionality constant, called Thermal resistance.The value of Thermal resistance depends on size of transistor, on convection or

radiation to the surroundings, on forced air cooling and on Thermal connection of the

device to metallic chassis or heat sink. The value of Thermal resistance varies from

0.2c/w for a high power transistor with efficient heat sink to 1000c / w for a low powertransistor in free air.

4 b) Q) For the circuit shown in figure, determine IE, VCand VCE. Assume VBE = 0.7V.

(May 2007)VEE= - 8V

Si

Rc = 1.8k

VCC= 10V

= 100

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Jntuk Edc Unit Vii Notes

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