Jan 6-10th, 2007 VLSI Design 2007 1 A Reduced Complexity A Reduced Complexity Algorithm for Minimizing Algorithm for Minimizing N N - - Detect Tests Detect Tests Kalyana R. Kantipudi Vishwani D. Agrawal Department of Electrical and Computer Engineering Auburn University, AL 36849 USA 20 th Intl Conf. on VLSI Design, Bangalore, Jan 6-10 th , 2006
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Jan 6-10th, 2007VLSI Design 20071 A Reduced Complexity Algorithm for Minimizing N-Detect Tests Kalyana R. Kantipudi Vishwani D. Agrawal Department of Electrical.
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Jan 6-10th, 2007 VLSI Design 2007 1
A Reduced Complexity Algorithm for A Reduced Complexity Algorithm for Minimizing Minimizing NN-Detect Tests-Detect Tests
Kalyana R. KantipudiVishwani D. Agrawal
Department of Electrical and Computer EngineeringAuburn University, AL 36849 USA
20th Intl Conf. on VLSI Design, Bangalore, Jan 6-10th, 2006
Jan 6-10th, 2007 VLSI Design 2007 2
Motivation for This Work
• Ability of N-detect tests to improve the defect coverage.
• Easy assimilation of N-detect tests into the normal test generation strategy.
• Main limitation of N-detect tests is their size.
• Inability of ILP based method to produce a time-bound optimal solution.
• Inability of previous test minimization strategies in finding minimal tests for c6288 benchmark.
Jan 6-10th, 2007 VLSI Design 2007 3
Outline
• ILP based N-detect test minimization
• Previous LP based methods
• Recursive rounding based approach
• The 3V3F example
• Minimal tests for c6288
• Results
• Conclusions
Jan 6-10th, 2007 VLSI Design 2007 4
ILP-Based N-Detect Test Minimization [1]
• Use any N-detect test generation approach to obtain a set of k vectors which detect every fault at least N times.
• Use diagnostic fault simulation to get the vector subset Tj for each fault j.
• Assign integer variable ti to ith vector such that,
• ti = 1 if ith vector is included in the minimal set.
• ti = 0 if ith vector is not included.
[1] K. R. Kantipudi and V. D. Agrawal, “On the Size and Generation of Minimal N-Detection Tests,” Proc. VLSI Design’06.
Jan 6-10th, 2007 VLSI Design 2007 5
Objective and Constraints of ILP
jfaultsNt
t minimize
jTvectori
k
1ii
ji
,:sConstraint
:Objective
Where, Nj is the multiplicity of detection for the jth fault.
Nj can be selected for each individual fault based on some criticality criteria or on the capability of the initial vector set.
ILP always generates an optimal solution for the given set of test vectors.
Jan 6-10th, 2007 VLSI Design 2007 6
A Linear Programming Approach
• Though ILP guarantees an optimal solution, it takes exponential time to generate the solution.
• Time bounded ILP solutions deviate from optimality.
• LP takes polynomial time (sometimes in linear time) to generate a solution.
• Redefining the variables tis as real variables in the range [0.0,1.0] converts the ILP problem into a linear one.
• The problem now remains to convert it into an ILP solution.
The optimal value of the relaxed-LP of the ILP minimization The optimal value of the relaxed-LP of the ILP minimization problem is a lower bound on the value of the optimal integer problem is a lower bound on the value of the optimal integer solution to the problem.solution to the problem.
Jan 6-10th, 2007 VLSI Design 2007 7
Previous Solutions (Randomized rounding)
• The real variables are treated as probabilities.
• A random number xi uniformly distributed over the range [0.0,1.0] is generated for each variable ti.
• If ti ≥ xi then ti is rounded to 1, otherwise rounded to 0.
• If the rounded variables satisfy the constraints, then the rounded solution is accepted.
• Otherwise, rounding is again performed starting from the original LP solution.
Jan 6-10th, 2007 VLSI Design 2007 8
Limitations of Randomized Rounding• Consider three faults f1,f2 and f3, and three vectors.
• We assign a real variable ti to vector i.
• Now the single detection problem is specified as:Minimize t1 + t2 + t3
Subject to constraints,f1 : t1 + t2 ≥ 1
f2 : t2 + t3 ≥ 1
f3 : t3 + t1 ≥ 1
• The number of tests is much larger
than the size of the minimal test set.
• The randomized rounding becomes a random search.
t3
LP Solution (0.5,0.5,0.5)
t1
t20
1
1
1
Jan 6-10th, 2007 VLSI Design 2007 9
Recursive Rounding (New Method)
• Step 1: Obtain an LP solution.
Stop if each ti is either 0.0 or 1.0• Step 2: Round the largest ti and fix its value to 1.0
If several ti’s have the largest value, arbitrarily set only one to 1.0. Go to Step 1.
Maximum number of LP runs is bounded by the final Maximum number of LP runs is bounded by the final minimized test set size.minimized test set size.
Final set is guaranteed to cover all faults. This method takes polynomial time even in the worst case.This method takes polynomial time even in the worst case. LP provides a lower bound on solution.