IP4777CZ38 DVI and HDMI interface ESD protection, DDC … · 2017-02-18 · 1. General description The IP4777CZ38 is designed for HDMI transmitter host interface protection. The IP4777CZ38
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The IP4777CZ38 is designed for HDMI transmitter host interface protection. TheIP4777CZ38 includes DDC buffering and decoupling, hot plug detect, backdriveprotection, CEC slew rate control, and high-level ESD protection diodes for the TMDSlines.
The DDC lines use a new buffering concept which decouples the internal capacitive loadfrom the external capacitive load. This allows greater design flexibility of the DDC lineswith respect to the maximum load of 50 pF specified in the HDMI 1.3 specification. Thisbuffering also boosts the DDC signals, allowing the use of longer HDMI cables having ahigher capacitive load than 700 pF. The CEC slew rate limiter prevents ringing on the CECline. The internal hot plug detect module simplifies the application of the HDMI transmitterto control the hot plug signal.
The DDC, hot plug and CEC lines are backdrive protected to guarantee HDMI interfacesignals are not pulled down if the system is powered down or enters standby mode.
All TMDS intra-pairs are protected by a special diode configuration offering a low linecapacitance of 0.7 pF only (to ground) and 0.05 pF between the TMDS pairs. Thesediodes provide protection to components downstream from ESD voltages of up to ±8 kVcontact in accordance with the IEC 61000-4-2, level 4 standard.
2. Features
n HDMI 1.3 compliant
n Pb-free and RoHS compliant; Dark Green
n Robust ESD protection without degradation after several ESD strikes
n Low leakage even after several hundred ESD discharges
n Very high diode switching speed (ns) and low line capacitance of 0.7 pF to ground and0.05 pF between channel can ensure signal integrity
n DDC capacitive decoupling between system side and HDMI connector side andbuffering to drive cable with high capacitive load (> 700 pF)
n Hot plug detect module
n CEC ringing prevention by slew rate limiter
n All TMDS lines with integrated rail-to-rail clamping diodes with downstream ESDprotection of ±8 kV in accordance with IEC 61000-4-2, level 4 standard
n Matched 0.5 mm trace spacing
IP4777CZ38DVI and HDMI interface ESD protection, DDC buffering,hot plug control and backdrive protectionRev. 02 — 12 February 2009 Product data sheet
NXP Semiconductors IP4777CZ38DVI and HDMI interface ESD protection
n Highest integration in a small footprint, PCB-level, optimized RF routing, 38-pinTSSOP lead-free package
3. Applications
n The IP4777CZ38 can be used for a wide range of HDMI source devices, consumerand computing electronics e.g.:
u SD and HD DVD player
u Set-top box
u PC graphic card
u Game console
u HDMI picture performance quality enhancer module
4. Ordering information
Table 1. Ordering information
Type number Package
Name Description Version
IP4777CZ38 TSSOP38 plastic thin shrink small outline package: 38 leads;body width 4.4 mm; lead pitch 0.5 mm
Product data sheet Rev. 02 — 12 February 2009 12 of 25
NXP Semiconductors IP4777CZ38DVI and HDMI interface ESD protection
10. Application information
10.1 TMDSTo protect the TMDS lines and also to comply with the impedance requirements of theHDMI specification, the IP4777CZ38 provides ESD protection with a low capacitive load.The dominant value for the TMDS line impedance is the capacitive load to ground. TheIP4777CZ38 has a capacitive load of only 0.7 pF.
10.2 DDC circuitThe DDC bus circuit contains full capacitive decoupling between the HDMI connector andthe DDC bus lines on the PCB. The capacitive decoupling ensures that the maximumcapacitive load is within the 50 pF maximum of the HDMI specification.
The slew rate accelerator supports high capacitive load on the HDMI cable side. VariousHDMI cable suppliers produce low-cost and long (typically 25 m) HDMI cables with acapacitive load of up to 6 nF.
The slew rate accelerator boosts the DDC signal independent of which side of the bus isreleasing the signal. The DDC circuit provides a level shifting option. The ENABLE signalis enabling and disabling the complete DDC buffer.
Product data sheet Rev. 02 — 12 February 2009 13 of 25
NXP Semiconductors IP4777CZ38DVI and HDMI interface ESD protection
10.3 Hot plug detect circuitThe IP4777CZ38 includes a hot plug detect circuit that simplifies the hot plug application.The circuit generates a standard logic level from the hot plug signal.
The hot plug detect circuit is pulling down the signal to avoid any floating signal. Thecomparator guarantees a save detection of the 2 V hot plug signal without any glitchesand oscillation at the hot plug output.
10.4 CECThe CEC signal can generate distortions caused by signal ringing in a 1 kHz domain. TheCEC slew rate limiter ensures that a signal does not ring independently of the CEC slavethat is releasing the signal.
A MOSFET transistor implements the backdrive protection which blocks signals in apower-down state.
The slew rate of the CEC bus is controlled by a slew rate that is defined independently ofthe load (resistive and capacitive) at the CEC bus.
(1) Dotted line indicates effect without slew rate accelerator.
Product data sheet Rev. 02 — 12 February 2009 14 of 25
NXP Semiconductors IP4777CZ38DVI and HDMI interface ESD protection
10.5 Backdrive protectionThe HDMI contains various signals which can partly supply current into an HDMI devicethat is powered down.
Typically, the DDC lines and the CEC signals can force 5 V into the switched off device.The IP4777CZ38 ensures that at power-down, the critical signals are blocked to preventany damage to the HDMI sink and HDMI source.
Fig 10. CEC module
SLEWRATE
LIMITER
001aag044
VCC(3V3)TMDS_BIAS
CEC_OUT CEC_IN
(1) Dotted line indicates effect without slew rate limiter.
Product data sheet Rev. 02 — 12 February 2009 15 of 25
NXP Semiconductors IP4777CZ38DVI and HDMI interface ESD protection
10.6 Schematic view of applicationOnly a few external components are needed at the application to adapt the HDMI port tothe parameters of the HDMI transmitter device.
Product data sheet Rev. 02 — 12 February 2009 16 of 25
NXP Semiconductors IP4777CZ38DVI and HDMI interface ESD protection
10.7 Typical applicationThe optimized pinning variant simplifies the printed-circuit board design. The pinningoptimizes the design of the microstrip lines for defined impedance.
Underneath the device a solid ground plane is part of the microstrip lines.
This application requires only a few external components to adapt the HDMI port to theparameters of the HDMI transmitter device or HDMI multiplexer.
Fig 14. Application of the IP4777CZ38 showing optimized PCB microstrip lines
Product data sheet Rev. 02 — 12 February 2009 19 of 25
NXP Semiconductors IP4777CZ38DVI and HDMI interface ESD protection
13. Soldering of SMD packages
This text provides a very brief insight into a complex technology. A more in-depth accountof soldering ICs can be found in Application Note AN10365 “Surface mount reflowsoldering description”.
13.1 Introduction to solderingSoldering is one of the most common methods through which packages are attached toPrinted Circuit Boards (PCBs), to form electrical circuits. The soldered joint provides boththe mechanical and the electrical connection. There is no single soldering method that isideal for all IC packages. Wave soldering is often preferred when through-hole andSurface Mount Devices (SMDs) are mixed on one printed wiring board; however, it is notsuitable for fine pitch SMDs. Reflow soldering is ideal for the small pitches and highdensities that come with increased miniaturization.
13.2 Wave and reflow solderingWave soldering is a joining technology in which the joints are made by solder coming froma standing wave of liquid solder. The wave soldering process is suitable for the following:
• Through-hole components
• Leaded or leadless SMDs, which are glued to the surface of the printed circuit board
Not all SMDs can be wave soldered. Packages with solder balls, and some leadlesspackages which have solder lands underneath the body, cannot be wave soldered. Also,leaded SMDs with leads having a pitch smaller than ~0.6 mm cannot be wave soldered,due to an increased probability of bridging.
The reflow soldering process involves applying solder paste to a board, followed bycomponent placement and exposure to a temperature profile. Leaded packages,packages with solder balls, and leadless packages are all reflow solderable.
Key characteristics in both wave and reflow soldering are:
• Board specifications, including the board finish, solder masks and vias
• Package footprints, including solder thieves and orientation
• The moisture sensitivity level of the packages
• Package placement
• Inspection and repair
• Lead-free soldering versus SnPb soldering
13.3 Wave solderingKey characteristics in wave soldering are:
• Process issues, such as application of adhesive and flux, clinching of leads, boardtransport, the solder wave parameters, and the time during which components areexposed to the wave
• Solder bath specifications, including temperature and impurities
Product data sheet Rev. 02 — 12 February 2009 20 of 25
NXP Semiconductors IP4777CZ38DVI and HDMI interface ESD protection
13.4 Reflow solderingKey characteristics in reflow soldering are:
• Lead-free versus SnPb soldering; note that a lead-free reflow process usually leads tohigher minimum peak temperatures (see Figure 17) than a SnPb process, thusreducing the process window
• Solder paste printing issues including smearing, release, and adjusting the processwindow for a mix of large and small components on one board
• Reflow temperature profile; this profile includes preheat, reflow (in which the board isheated to the peak temperature) and cooling down. It is imperative that the peaktemperature is high enough for the solder to make reliable solder joints (a solder pastecharacteristic). In addition, the peak temperature must be low enough that thepackages and/or boards are not damaged. The peak temperature of the packagedepends on package thickness and volume and is classified in accordance withTable 11 and 12
Moisture sensitivity precautions, as indicated on the packing, must be respected at alltimes.
Studies have shown that small packages reach higher temperatures during reflowsoldering, see Figure 17.
Table 11. SnPb eutectic process (from J-STD-020C)
Package thickness (mm) Package reflow temperature ( °C)
Volume (mm 3)
< 350 ≥ 350
< 2.5 235 220
≥ 2.5 220 220
Table 12. Lead-free process (from J-STD-020C)
Package thickness (mm) Package reflow temperature ( °C)
Product data sheet Rev. 02 — 12 February 2009 23 of 25
NXP Semiconductors IP4777CZ38DVI and HDMI interface ESD protection
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Objective [short] data sheet Development This document contains data from the objective specification for product development.
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