INVITED PAPER Nanoscale Thermal Transport and Microrefrigerators on a Chip Devices for cooling high power density and dynamic hot spots can be formed by solid-state thin films on the chip, or they could be buried in, bonded to, or mounted on substrates. By Ali Shakouri ABSTRACT | In this paper we review recent advances in nanoscale thermal and thermoelectric transport with an emphasis on the impact on integrated circuit (IC) thermal management. We will first review thermal conductivity of low- dimensional solids. Experimental results have shown that phonon surface and interface scattering can lower thermal con- ductivity of silicon thin films and nanowires in the sub-100-nm range by a factor of two to five. Carbon nanotubes are promising candidates as thermal vias and thermal interface materials due to their inherently high thermal conductivities of thousands of W/mK and high mechanical strength. We then concentrate on the fundamental interaction between heat and electricity, i.e., thermoelectric effects, and how nanostructures are used to modify this interaction. We will review recent experimental and theoretical results on superlattice and quantum dot thermoelectrics as well as solid-state thermionic thin-film devices with embedded metallic nanoparticles. Heat and current spreading in the three-dimensional electrode configuration, allow removal of high-power hot spots in IC chips. Several III-V and silicon heterostructure integrated thermionic (HIT) microcoolers have been fabricated and char- acterized. They have achieved cooling up to 7 C at 100 C ambient temperature with devices on the order of 50 "m in diameter. The cooling power density was also characterized using integrated thin-film heaters; values ranging from 100 to 680 W/cm 2 were measured. Response time on the order of 20–40 ms has been demonstrated. Calculations show that with an improvement in material properties, hot spots tens of micrometers in diameter with heat fluxes in excess of 1000 W/cm 2 could be cooled down by 20 C–30 C. Finally we will review some of the more exotic techniques such as thermotunneling and analyze their potential application to chip cooling. KEYWORDS | Carbon nanotubes (CNTs); embedded nanoparti- cles; microrefrigeration; nanoscale heat transport; nanotech- nology; quantum dots; superlattices; thermal boundary resistance; thermionics; thermotunneling; thermoelectrics I. INTRODUCTION Individual micro- and nanoscale electronic devices can generate heat fluxes exceeding thousands of watts per centimeter square in very small areas on the order of micrometers in size. Typical integrated circuit (IC) chips have millions of transistors. Variations in the activity of the transistors for different functional units create hot spots only a couple of hundred micrometers in diameter that can be 10 C–40 C hotter than the rest of the chip. Most of the conventional cooling techniques can be used to cool the whole chip. Since thermal design requirements are mostly driven by peak temperatures, reducing or elimi- nating hot spots could alleviate the design requirements for the whole package. In existing commercial silicon chips, since the substrate thickness is several hundred micrometers, and since silicon has a high thermal con- ductivity, the extremely nonuniform power dissipation in individual transistors and functional units gives rise to hot spots proportional in size to the silicon substrate’s thickness (a couple of hundred micrometers to milli- meters). This is substantially smaller than the size of the whole chip, so hot spot removal is a key enabler for future generation IC chips. On the other hand, as the silicon wafer thickness is reduced and stacked chips or three- dimensional (3-D) chips are investigated, there is less heat spreading in the bulk silicon. This can create smaller hot spots on the order of 50–100 "m in size with more severe temperature nonuniformity. In addition, when the device dimensions shrink enough and new materials such as Manuscript received May 4, 2006; revised June 5, 2006. This work was supported by Packard Fellowship, Intel Corp., Canon Corp., DARPA HERETIC and ONR MURI Thermionic Energy Conversion Center. The author is with the Jack Baskin School of Engineering, University of California at Santa Cruz, CA 95064 USA (e-mail: [email protected]). Digital Object Identifier: 10.1109/JPROC.2006.879787 Vol. 94, No. 8, August 2006 | Proceedings of the IEEE 1613 0018-9219/$20.00 Ó2006 IEEE
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INV ITEDP A P E R
Nanoscale Thermal TransportandMicrorefrigeratorsonaChipDevices for cooling high power density and dynamic hot spots can be formed by
solid-state thin films on the chip, or they could be buried in, bonded to,
or mounted on substrates.
By Ali Shakouri
ABSTRACT | In this paper we review recent advances in
nanoscale thermal and thermoelectric transport with an
emphasis on the impact on integrated circuit (IC) thermal
management. We will first review thermal conductivity of low-
dimensional solids. Experimental results have shown that
phonon surface and interface scattering can lower thermal con-
ductivity of silicon thin films and nanowires in the sub-100-nm
range by a factor of two to five. Carbon nanotubes are
promising candidates as thermal vias and thermal interface
materials due to their inherently high thermal conductivities of
thousands of W/mK and high mechanical strength. We then
concentrate on the fundamental interaction between heat and
electricity, i.e., thermoelectric effects, and how nanostructures
are used to modify this interaction. We will review recent
experimental and theoretical results on superlattice and
quantum dot thermoelectrics as well as solid-state thermionic
thin-film devices with embedded metallic nanoparticles. Heat
and current spreading in the three-dimensional electrode
configuration, allow removal of high-power hot spots in IC
chips. Several III-V and silicon heterostructure integrated
thermionic (HIT) microcoolers have been fabricated and char-
acterized. They have achieved cooling up to 7 �C at 100 �C
ambient temperature with devices on the order of 50 �m in
diameter. The cooling power density was also characterized
using integrated thin-film heaters; values ranging from 100 to
680 W/cm2 were measured. Response time on the order of
20–40 ms has been demonstrated. Calculations show that
with an improvement in material properties, hot spots tens
of micrometers in diameter with heat fluxes in excess of
1000 W/cm2 could be cooled down by 20 �C–30 �C. Finally
we will review some of the more exotic techniques such as
thermotunneling and analyze their potential application to
have been fabricated and characterized for applications in
1Even though this makes sense intuitively, there are no detailedcalculations of the effect of size nonuniformity on low-dimensionalthermoelectric properties.
Shakouri: Nanoscale Thermal Transport and Microrefrigerators on a Chip
Vol. 94, No. 8, August 2006 | Proceedings of the IEEE 1617
the integrated cooling of optoelectronic and electronicdevices [64]–[67]. The idea of thermionic energy conver-
sion was first seriously explored in the mid-1950s during
the development of vacuum diodes and triodes. A vacuum
diode thermionic refrigerator was proposed by Mahan
[68] in 1994. In the early to mid-1990s, several groups
pointed out the advantage of electron energy filters in
bulk thermoelectric materials [69]–[71], [150]. To over-
come the limitations of vacuum thermionics at lowertemperatures, thermionic emission cooling in hetero-
structures was proposed by Shakouri and Bowers [64]. In
these structures, a potential barrier is used for the
selective emission of hot electrons and the evaporative
cooling of the electron gas. The HIT cooler can be based
on a single-barrier or a multibarrier structure (see Fig. 4).
In a single-barrier structure in the ballistic transport re-
gime, which is strongly nonlinear, electric current isdominated by the supply of electrons in the cathode layer
and large cooling power densities exceeding kW/cm2 can
be achieved [64], [65]. In this design, it is necessary to use
a barrier several micrometers thick with an optimum
barrier height at the cathode, on the order of the thermal
energy of electrons kBT, where kB is Planck’s constant. A
large barrier height at the anode to reduce reverse current
is also needed [65].A few single-barrier InGaAs/InGaAsP/InGaAs thin-film
devices that were lattice matched to InP substrate were
fabricated and characterized [72]. The InGaAsP barrier
ð�gap �1.3 �mÞ was 1 �m thick and �100 meV high. Even
though cooling by 1 �C and cooling power density
exceeding 50 W/cm2 were achieved [72], [73], it was not
possible to increase the bias current substantially there by
Fig. 4. Hot electron filtering and thermionic emission in single-barrier and superlattice structures.
Shakouri: Nanoscale Thermal Transport and Microrefrigerators on a Chip
1618 Proceedings of the IEEE | Vol. 94, No. 8, August 2006
fully benefiting from the large thermionic emission
cooling. This is due to nonideal metal–semiconductor
contact resistance and Joule heating in the substrate. The
single-barrier HIT device in a nonlinear transport regime
was not anticipated to have an improved energy con-version efficiency. High efficiency typically requires small
perturbations from equilibrium. Electrons that are bal-
listically emitted release all their excess energy in the
anode and produce significant heating. The main motiva-
tion of the original study was to do temperature stabili-
zation of optoelectronic devices with monolithic structures
[67], [74].
In 1998 Mahan and Woods proposed to use thermionicemissions in multilayer structures in a linear transport
regime. They estimated an increase in the figure-of-merit
ZT by a factor of two [75]. Based on this idea, a few struc-
tures were synthesized by Kim et al.; however, due to the
poor material quality no improvement was reported [76].
Later calculations by Radtke et al. [77] showed that, in thelinear transport regime, the thermoelectric power factor in
multilayer thermionic devices is smaller than that of a
thermoelectric one; thus, the main advantage of super-
lattices is in the reduction of phonon thermal conductivity.
Mahan and Vining in a subsequent publication reached the
same conclusion [78]. This analysis was also based on
linearized ballistic transport over symmetric barriers.
In contrast to the previous publications, Shakouri et al.in 1999 proposed that tall barrier, highly degenerate
Fig. 5. Transmission electron micrograph of 3-�m-thick 200 � ð5 nm Si0:7Ge0:3=10 nm SiÞ superlattice grown symmetrically strained on a buffer
layer designed so that the in-plane lattice constant was approximately that of relaxed Si0:9Ge0:1. The n-type doping level (Sb) is 2 � 1019 cm�3.
The relaxed buffer layer has a ten-layer structure, alternating between 150-nm Si0:9Ge0:1 and 50-nm Si0:845Ge0:150C0:005. 0.3�m Si0:9Ge0:1 cap layer
was grown with a high doping to get a good ohmic contact.
Shakouri: Nanoscale Thermal Transport and Microrefrigerators on a Chip
Vol. 94, No. 8, August 2006 | Proceedings of the IEEE 1619
superlattice structures can achieve thermoelectric powerfactors (the square of the Seebeck coefficient times the
electrical conductivity) an order of magnitude higher than
bulk values [79]. In this analysis no assumption about
ballistic transport was made. The improvement was solely
due to the filtering of hot electrons in a highly degenerate
sample. For a multibarrier structure at small biases, one
can define an effective Seebeck coefficient and electrical
conductivity [80], [81]. In the linear transport regime,calculations based on effective thermoelectric materials or
based on solid-state thermionics will converge represent-
ing two points of view for the same electron transport
phenomena in superlattices. One can describe the effect of
potential barriers as a means to increase the thermoelec-
tric power factor.
Recently the theoretical analysis of electric and
thermoelectric transport perpendicular to the superlatticedirection has been expanded [80]–[82]. It is shown that
highly degenerate semiconductors and metallic-based
superlattices in the quasi-linear transport regime have
the potential to achieve thermoelectric power factors
significantly larger than bulk values. Assuming a lattice
contribution to thermal conductivity on the order of
1 W/mK, ZT values exceeding 5–6 are predicted. The
key requirement is nonconservation of lateral momentumduring the thermionic emission process. Basically, planar
barriers are only effective to filter out hot electrons movingwith large kinetic energy perpendicular to the barrier.
Many of the hot electrons with large in-plane kinetic
energy can not be selectively emitted. Nonconservation of
lateral momentum will allow a much larger number of hot
electrons to participate in the conduction process. This
could be achieved using nonplanar barriers or embedded
nanoparticles [40], [83]. It is important to note that the
role of nanoparticles in this case is quite different fromlow-dimensional thermoelectrics. Discrete energy states
are not directly used. Quantum dots act as 3-D scattering
centers and energy filters for electrons moving in the
material. Novel metallic-based superlattices with embed-
ded nano particles are synthesized by molecular beam
epitaxy (MBE) and by pulsed laser deposition systems.
These techniques allow a precise layer by layer growth
with a growth rate of 0.1–2 �m per hour. Large-scaleMBE growth of GaAs chips for cell phones and laser
diodes for compact disc applications have been demon-
strated [84], [151]. The epitaxial growth is done sim-
ultaneously on five to six wafers each 2–4 in in diameter.
Once the research phase is completed and electronic and
thermal properties of nanostructured materials opti-
mized, other techniques such as chemical vapor deposi-
tion could also be used for larger scale production ofmicrorefrigerators.
Fig. 6. Diagram showing current flow and heat exchange at various junctions in a single-element microrefrigerator.
Shakouri: Nanoscale Thermal Transport and Microrefrigerators on a Chip
1620 Proceedings of the IEEE | Vol. 94, No. 8, August 2006
IV. HETEROSTRUCTURE INTEGRATEDTHERMIONIC MICROREFRIGERATORSON A CHIP
Using the idea of heterostructure electron energy filtering,
thin-film coolers based on various materials have been
fabricated and characterized. InGaAsP/InP [67], [72], [85],
and InGaAs/InP [86], were grown with metal–organic
chemical vapor deposition (MOCVD), and InGaAs/InAlAs[87], InGaAsSb/InGaAs [88], SiGe/Si [89], [90], and
SiGeC/Si [66]) were grown with MBE. These structures
were lattice matched to either InP or silicon substrates to
ease their monolithic integration. Si-based heterostruc-
tures are particularly useful for monolithic integration
with silicon-based electronics. The basic idea was to use a
band offset between the different layers as a hot carrier
filter. The superlattice structure has also the potential toreduce the lattice thermal conductivity. Different su-
perlattice periods (5–30 nm), dopings (1 � 1015–
7 � 1019 cm�3), and thicknesses (1–7 �m) were analyzed.
A typical SiGe/Si microrefrigerator shown in Fig. 5
consists of a 3-�m-thick superlattice layer with a
200 � ð3-nm Si=12-nm Si0:75Ge0:25Þ structure doped to
5e19 cm�3, a 1-�m Si0:8Ge0:2 buffer layer with the same
doping concentration as the superlattice, and a 0.3-�m
Si0:8Ge0:2 cap layer with doping concentration of
1.9e20 cm�3. Various microrefrigerator devices were fab-
ricated using standard thin-film processing technology
(photolithography, wet and dry etching, and metalliza-
tion). In the single-leg microcooler geometry, a gold or
aluminum metal contact was used to send current to the
cold side of the device (Fig. 6). The Joule heating and heat
conduction in this metal layer had a strong impact on the
overall cooler performance. An electrical contact on the
backside of the silicon substrate, or on the front surface
far away from the device, was used as the second elec-
trode. Thus, 3-D heat and current spreading in the
substrate helped the localized cooling of the device. Fig. 7
shows a scanning electron micrograph of thin-film coolers
of the various sizes (40 � 40–150 � 150 �m2). Fig. 8
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[66] X. F. Fan, G. H. Zeng, C. LaBounty,J. E. Bowers, E. Croke, C. C. Ahn,S. Huxtable, A. Majumdar, and A. Shakouri,BSiGeC/Si superlattice microcoolers,[ Appl.Phys. Lett., vol. 78, pp. 1580–1582, 2001.
[67] C. LaBounty, A. Shakouri, P. Abraham, andJ. E. Bowers, BMonolithic integration ofthin-film coolers with optoelectronicdevices,[ Opt. Eng., vol. 39,pp. 2847–2852, 2000.
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[72] A. Shakouri, C. LaBounty, J. Piprek,P. Abraham, and J. E. Bowers, BThermionicemission cooling in single barrierheterostructures,[ Appl. Phys. Lett., vol. 74,no. 1, pp. 88–89, Jan. 4, 1999.
[73] C. LaBounty, A. Shakouri, and J. E. Bowers,BDesign and characterization of thin filmmicrocoolers,[ J. Appl. Phys., vol. 89, no. 7,pp. 4059–4064, Apr. 1, 2001.
[74] Y. Zhang, G. Zeng, J. Piprek, A. Bar-Cohen,and A. Shakouri, BSuperlatticemicrorefrigerators fusion bonded withoptoelectronic devices,[ IEEE Trans.Compon. Packag. Technol., vol. 28, no. 4,pp. 658–666, Dec. 2005.
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[81] VV, BElectronic and thermoelectrictransport in semiconductor and metallicsuperlattices,[ J. Appl. Phys., vol. 95, no. 3,pp. 1233–1245, 2004.
[82] VV, BHigh performance multi barrierthermionic devices,[ presented at the Int.Conf. Thermoelectrics, Adelaide, Australia,2004.
[83] Z. Bian and A. Shakouri, BEnhancedsolid-state thermionic emission in nonplanarheterostructures,[ Appl. Phys. Lett., vol. 88,no. 1, pp. 12102-1–12102-3, Jan. 2, 2006.
[84] A. Wilk, A. R. Kovsh, S. S. Mikhrin, C. Chaix,I. I. Novikov, M. V. Maximov,Y. M. Shernyakov, V. M. Ustinov, andN. N. Ledentsov, BHigh-power 1.3 �mInAs/GaInAs/GaAs QD lasers grown in amultiwafer MBE production system,[J. Crystal Growth, vol. 278, no. 1–4,pp. 335–341, 2005.
[85] R. Singh, D. Vashaee, Y. Zhang, M. Negassi,A. Shakouri, Y. Okuno, G. Zeng,C. LaBounty, and J. Bowers, BExperimentalcharacterization and modeling of InP-basedmicrocoolers,[ presented at the MaterialResearch Soc. Meeting, Boston,MA, Fall, 2003.
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[87] Y. Zhang, D. Vashaee, R. Singh, A. Shakouri,G. Zeng, and Y.-J. Chiu, BInfluence of dopingconcentration and ambient temperature onthe cross-plane Seebeck coefficient ofInGaAs/InAlAs superlattices,[ in MaterialsResearch Society Symp. Proc.: ThermoelectricMaterials 2003VResearch and ApplicationsSymp., 2004, vol. 793, pp. 59–65.
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[91] X. Fan, G. Zeng, E. Croke, G. Robinson,C. LaBounty, A. Shakouri, and J. E. Bowers,BSiGe/Si superlattice coolers,[ Phys.Low-Dimens. Struct., no. 5–6, pp. 1–9, 2000.
[93] S. Dilhaire, Y. Ezzahri, S. Grauby, W. Claeys,J. Christofferson, Y. Zhang, and A. Shakouri,BThermal and thermomechanical study ofmicro-refrigerators on a chip based onsemiconductor heterostructures,[ in Proc.22nd Int. Conf. Thermoelectrics (ICT’03),pp. 519–523.
[94] Y. Zhang, D. Vashaee, J. Christofferson,G. Zeng, C. LaBounty, J. Piprek, E. Croke,A. Shakouri et al., B3-D electrothermalsimulation of heterostructure thin filmmicrocooler,[ presented at the ASME Symp.Analysis and Applications of Heat Pump andRefrigeration Systems, Washington, DC,2003.
Shakouri: Nanoscale Thermal Transport and Microrefrigerators on a Chip
1636 Proceedings of the IEEE | Vol. 94, No. 8, August 2006
[95] D. Vashaee, J. Christofferson, Y. Zhang,A. Shakouri, G. Zeng, C. LaBounty, X. Fan,J. Piprek, J. Bowers, and E. Croke, BModelingand optimization of single-element bulk SiGethin-film coolers,[ Microscale Thermophys.Eng., vol. 9, no. 1, pp. 99–118, Mar. 2005.
[96] G. Zeng, X. Fan, C. LaBounty, E. Croke,Y. Zhan, J. Christofferson, D. Vashaee,A. Shakouri, and J. E. Bowers, BCoolingpower density of SiGe/Si superlattice microrefrigerators,[ in Materials Research Soc.Symp. Proc.: Thermoelectric Materials2003VResearch and Applications Symp.,vol. 793, pp. 43–49.
[97] A. Shakouri and C. LaBounty, BMaterialoptimization for heterostructure integratedthermionic coolers,[ Proc. 18th Int.Conf. Thermoelectrics (ICT’99), pp. 35–39.
[98] A. Fitting, J. Christofferson, A. Shakouri,X. Fan, G. Zeng, C. LaBounty, J. E. Bowers,and E. Croke, BTransient response of thinfilm SiGe micro coolers,[ presented at theInt. Mechanical Engineering Congr. andExhibition (IMECE 2001), New York, 2001.
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[100] K. Fukutani, Y. Zhang, and A. Shakouri,BSolid-state microrefrigerators on a chip,[Electron. Cooling Mag., Jul. 2006, to bepublished.
[102] D. Vashaee, Ph.D. dissertation, Univ.California, Santa Cruz, 2005.
[103] S. T. Huxtable, A. R. Abramson, C.-L. Tien,A. Majumdar, C. LaBounty, X. Fan, G. Zeng,J. E. Bowers, A. Shakouri, and E. T. Croke,BThermal conductivity of Si/SiGe andSiGe/SiGe superlattices,[ Appl. Phys. Lett.,vol. 80, no. 10, pp. 1737–1739, Mar. 11,2002.
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[109] R. Singh, Z. Bian, G. Zeng, J. Zide,J. Christofferson, H.-F. Chou, A. Gossard,J. Bowers, and A. Shakouri, BTransientHarman measurement of the cross-plane ZTof InGaAs/InGaAlAs superlattices withembedded ErAs nanoparticles,[ presented atthe Materials Research Soc. Fall Meeting,Boston, MA, 2005.
[110] K. Fukutani and A. Shakouri, BOptimizationof thin film microcoolers for hot spotremoval in packaged integrated circuitchips,[ in Proc. 22nd Annu. IEEE
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[111] K. Fukutani, Y. Zhang, and A. Shakouri, IEEETrans. Compon. Packag. Technol., 2006,submitted for publication.
[112] Y. Zhang, G. Zeng, A. Bar-Cohen, andA. Shakouri, BIs ZT the main performancefactor for hot spot cooling using 3-Dmicrorefrigerators?,[ presented at theIMAPS on Thermal Management, Palo Alto,CA, 2005, Student Competition Award.
[113] A. Bar-Cohen, P. Wang, B. Yang, Y. Zhang,and A. Shakouri, BThermo-electri modelingof multiple micro-coolers for hot-spotthermal management,[ presented at theInterPack’05 Conf., San Francisco,CA, 2005.
[114] Y. Zhang, A. Shakouri, A. Bar-Cohen,P. Wang, and B. Yang, BExperimentaldemonstration of microrefrigerator flip-chipbonded with IC chips for hot-spots thermalmanagement,[ presented at the InterPack’05Conf., San Francisco, CA, Jul. 2005.
[115] Y. Zhang, G. Zeng, A. Shakouri, andA. Bar-Cohen, B3-D microrefrigeratorsapplication on hot spot removal with trenchstructures,[ IEEE Trans. Compon. Packag.Technol., 2006, submitted for publication.
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ABOUT THE AUT HOR
Ali Shakouri received the undergraduate degree
from Ecole Nationale Superieure des Telecommu-
nications de Paris, France, in 1990 and the Ph.D.
from the California Institute of Technology, Pasa-
dena, in 1995.
He is Professor of Electrical Engineering at
University of California Santa Cruz (UCSC). He was
the Technical Director for DARPA Heretic project
that demonstrated SiGe-based microrefrigerators
on a chip. He is currently the Director of the
Thermionic Energy Conversion Center, an Office of Naval Research
multiuniversity research initiative aiming to improve direct thermal to
electric energy conversion technologies. His current research is on
nanoscale heat and current transport in semiconductor devices, sub-
micrometer thermal and ac imaging, microrefrigerators on a chip, and
novel optoelectronic ICs.
He received the Packard Fellowship in 1999, the NSF Career award in
2000, and the UCSC School of Engineering FIRST Professor Award in
2004.
Shakouri: Nanoscale Thermal Transport and Microrefrigerators on a Chip
1638 Proceedings of the IEEE | Vol. 94, No. 8, August 2006