INVITED PAPER Graphene Growth and Device Integration This paper describes one of the emerging methods for growing grapheneVthe chemical vapor deposition methodVwhich is based on a catalytic reaction between a carbon precursor and a metal substrate such as Ni, Cu, and Ru, to name a few. By Luigi Colombo, Fellow IEEE , Robert M. Wallace, Fellow IEEE , and Rodney S. Ruoff ABSTRACT | Graphene has been introduced to the electronics community as a potentially useful material for scaling elec- tronic devices to meet low-power and high-performance targets set by the semiconductor industry international road- map, radio-frequency (RF) devices, and many more applica- tions. Growth and integration of graphene for any device is challenging and will require significant effort and innovation to address the many issues associated with integrating the monolayer, chemically inert surface with metals and dielec- trics. In this paper, we review the growth and integration of graphene for simple field-effect transistors and present physical and electrical data on the integrated graphene with metals and dielectrics. KEYWORDS | Chemical vapor deposition (CVD); electrochemical transfer; graphene; mobility; Raman spectroscopy; X-ray photoelectron spectroscopy I. INTRODUCTION Over the past seven years or so there has been a lot of excitement in using graphene for many electronic applications among others [3]–[6]. Researchers have looked to graphene as a material with which to fabricate devices in order to exceed the performance characteristics of current device applications as well as developing new devices, especially for flexible electronics, transparent electrodes for displays and touch screens, photonic applications, energy generation, and batteries [3], [12], [13]. The first graphene films were only a few tens of micrometers on the side and so the principal first issue in making graphene devices a reality is the development of a graphene of sufficient quality and size to meet the basic physical and electronic properties. Since the isolation of graphene from natural graphite, a number of techniques and processes have been studied and are in development to form graphene materials for a variety of applications; an extensive and complete review of these processes has recently been summarized by Bonaccorso et al. [22] and a concise history of graphene is presented by Dreyer et al. [23]. It is still too early to select the final graphene growth process for high-performance electronic devices since none of the processes meets all of the basic requirements. Today, there are a few sources of high-quality graphene films: 1) exfoliated graphene from natural graphite or various other sources of graphite [24]; 2) graphene films on SiC single crystals formed by the evaporation of silicon from either the carbon- or silicon-rich surfaces of SiC [25]; and 3) graphene grown on metal substrates by chemical vapor deposition (CVD) [11], [26]–[29]. The latter two graphene growth techniques have emerged as having the highest potential for high-performance electronic applica- tions. There are other sources of ‘‘graphene,’’ for example, reduced graphene oxide or growth on various other metal surfaces. However, these are either discontinuous, ‘‘doped’’ with oxygen, or multilayered, as in the case of growth on metals with high carbon solubility, but these may be suited for applications having less stringent requirements [23], [30], [31]. Each of the graphene sources has its advantages and disadvantages: Graphene exfoliated from natural graphite Manuscript received June 4, 2012; revised April 1, 2013; accepted April 17, 2013. Date of publication May 24, 2013; date of current version June 14, 2013. This work was supported in part by the Nanoelectronic Research Initiative and the Southwest Academy of Nanoelectronics (SWAN–NRI) program. The work of R. M. Wallace was also supported by an IBM Faculty award. The work of R. S. Ruoff was also supported by the W. M. Keck Foundation, the National Science Foundation, and the U.S. Office of Naval Research. L. Colombo is with Texas Instruments Incorporated, Dallas, TX 75243 USA (e-mail: [email protected]). R. M. Wallace is with the University of Texas at Dallas, Richardson, TX 75080 USA (e-mail: [email protected]). R. S. Ruoff is with the University of Texas at Austin, Austin, TX 78712-0292 USA (e-mail: [email protected]). Digital Object Identifier: 10.1109/JPROC.2013.2260114 1536 Proceedings of the IEEE | Vol. 101, No. 7, July 2013 0018-9219/$31.00 Ó2013 IEEE
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INV ITEDP A P E R
Graphene Growth andDevice IntegrationThis paper describes one of the emerging methods for growing grapheneVthe
chemical vapor deposition methodVwhich is based on a catalytic reaction between
a carbon precursor and a metal substrate such as Ni, Cu, and Ru, to name a few.
By Luigi Colombo, Fellow IEEE, Robert M. Wallace, Fellow IEEE, and Rodney S. Ruoff
ABSTRACT | Graphene has been introduced to the electronics
community as a potentially useful material for scaling elec-
tronic devices to meet low-power and high-performance
targets set by the semiconductor industry international road-
map, radio-frequency (RF) devices, and many more applica-
tions. Growth and integration of graphene for any device is
challenging and will require significant effort and innovation to
address the many issues associated with integrating the
monolayer, chemically inert surface with metals and dielec-
trics. In this paper, we review the growth and integration of
graphene for simple field-effect transistors and present
physical and electrical data on the integrated graphene with
metals and dielectrics.
KEYWORDS | Chemical vapor deposition (CVD); electrochemical
phene, a dielectric such as SiO2 was employed to serve as a
‘‘back-gate dielectric’’ in order to probe the transport
properties of graphene transferred to SiO2/Si wafer
substrate [4]. The application of a ‘‘top-gate’’ dielectric
on such structures enables the study of FET saturation
characteristics for high-performance analog applications
such as radio-frequency (RF) circuits [138]. A review of the
recent developments in graphene transistor designs and
their potential utility has been recently published [139].
A number of strategies have been employed to enablethe deposition of dielectrics on graphene, including metal
evaporation and ALD. The challenges of nucleating thin
dielectric films on the surface of graphene have been
recognized for some time, particularly in view of prior
work on CNT surfaces [140].
For high-k dielectrics such as HfO2 or ZrO2, ALD
methods were employed on CNT transistor structures so
that the CNT channel was essentially encased within thehigh-k layer [141]. As the ALD process generally requires
reaction with the available surface bonds for film
nucleation and subsequent growth [142], it was later
shown that defects in the nanotubes can result in such
nucleation sites [140]. Alternative methods for nucleation
sites entailed the concepts of functionalizing the CNT
surface sufficiently to enable subsequent ALD of dielectrics
Table 2 Graphene Transfer Process Comparison
Colombo et al. : Graphene Growth and Device Integration
1546 Proceedings of the IEEE | Vol. 101, No. 7, July 2013
[143], based in part on earlier observations of CNTresistivity changes upon exposure to species such as NH3
and NO2 that were apparently physisorbed to the CNT
surface [144], [145]. Using a combination of NO2 and
trimethyl–aluminum (TMA), a well-known ALD precursor
for Al2O3 deposition, Farmer and Gordon [143] demon-
strated that a thin, uniform Al2O3 dielectric can be formed
on the single-wall CNT surface by ALD.
Without such functionalization of clean graphene,nonuniform film deposition occurs largely at defect sites,
as seen in Fig. 10 for the HOPG surface, which is thought
to be representative of the graphene surface [146]. It can
be seen that the ALD process decorates the step edges of
the surface, while the relatively inert terraces remain free
of detectable deposition under these conditions. The NO2-
functionalization strategy was subsequently adapted for top-
gate Al2O3 dielectric growth on the exfoliated graphenesurface for quantum Hall effect measurements of ambipolar
transport [147]. Later work on gFETs demonstrated,
however, that such NO2 functionalization can degrade
gFET mobility presumably through charge impurity scatter-
ing as well as interface phonons with the Al2O3 [148].
Another challenge for adopting NO2 in standard device pro-
cessing lies in the corrosive properties of the gas in
deposition tools where residual water may be present andsafety considerations due to the strong reactivity. As a result,
alternative functionalization methods are being explored.
A common point-of-use oxidizer, well established in
semiconductor fabrication technology, is ozone, and this has
been recently explored for surface functionalization of
graphene [16], [17], [149]. The effect of an O3 pre-treatment
to the HOPG surface on Al2O3 ALD is shown in Fig. 10(c). In
this work, the HOPG surface was exposed to O3 at 200 �Cresulting in substantial C–O bonding thus rendering the
surface active for subsequent Al2O3 ALD growth with a
TMA/water chemistry. Of course, the formation of detect-
able C–O bonding implies some disruption of the HOPG
surface, and thus damage to a graphene specimen with this
process would clearly be anticipated. Such elevated
temperature etch damage (and chemical doping) has also
been reported upon exposure to O2/Ar mixtures as well as to
ultraviolet light, for example, [150].The O3 process can be optimized for an exfoliated
graphene layer by conducting the O3 pretreatment at room
temperature, followed by an elevated temperature TMA/
water ALD process, as reported by Lee et al. [17] As seen in
Fig. 11(a), the Raman spectra of the 25 �C O3 exposure for
20 s results in no detectable defect band (‘‘D’’� 1350 cm�1),
while the elevated temperature clearly results in etch
damage and thus a detectable ‘‘D’’-band [Fig. 11(b)]. Theresultant Al2O3 film was then grown with a TMA/water
chemistry at 200 �C and incorporated as a top gate on a
dual-gated gFET device using exfoliated graphene. Electri-
cal characterization shows ambipolar behavior with an
extracted mobility [14], [151] as high as 5000 cm2/s [17].
The mechanism associated with functionalization by
O3 on clean graphene has been considered using first-
principles computational methods and in situ electricalcharacterization [152], [153]. It is found that the short time
25 �C O3 exposure is predicted to weakly chemisorb on the
surface, resulting in an epoxide species with submonolayer
surface coverage. This species then serves as a nucleation
site for subsequent ALD dielectric growth. Additionally,
the effect of extrinsic contamination with the O3 process is
also a consideration for film nucleation [154].
Organic species have also been shown to facilitatenucleation for subsequent ALD dielectric film growth, such
as perylene tetracarboxylic acid (PTCA) [155] or perylene-
3,4,9,10-tetracarboxylic dianhydride (PTCDA) [156], but
transport measurements of gFETs using these organic layers
have not yet been reported. Polymer-based nucleation layers
have also been employed and include photoresist materials
such as hydrogen silsesquioxane (HSQ) [157] as well as a
planarization polymer that performs as a low-k dielectricbuffer layer [158], [159]. In the latter case, an extracted
mobility up to 7700 cm2/s was reported for top-gated gFETs
with an HfO2 layer deposited on the buffer layer [159]. The
use of such ‘‘seed’’ layers for functionalization and subse-
quent high-k dielectric deposition has also been proposed to
decouple the surface phonon interaction associated with
Fig. 10. Atomic force microscope images of the HOPG surface after
(a) exfoliation and (b) exposure to an ALD process of TMA and water
at 250 �C, and (c) after exposure to an ALD process and ozone at
200 �C. (Reprinted with permission, �2008 American Institute of
Physics [16].)
Fig. 11. (a) Raman spectrum of a pristine single graphene layer
(bottom) and graphene treated with O3 at 25 �C for 20 s. (b) The same as
(a) except with O3 exposure at 200 �C. (Reprinted with permission,
�2010 American Institute of Physics [17].)
Colombo et al. : Graphene Growth and Device Integration
Vol. 101, No. 7, July 2013 | Proceedings of the IEEE 1547
such oxides and the graphene interface, potentially enhanc-ing the resultant mobility.
Given the ability of organic species to result in
nucleation and growth of ALD dielectric films by ALD,
one may also ponder the effects of spurious surface
contamination from, for example, atmospheric exposure.
Such contamination is well documented in the Si
integrated circuit fabrication community, and contains
organic species as well as physisorbed species such aswater [160]. Estimates of the formation of a monolayer on
a typically reactive surface have been less than 30 min
[161]. Enhanced surface contamination from B during
exposure of a surface under clean-room conditions has also
been reported [162]. The concentration of such species on
freshly exfoliated graphene may be anticipated to be
somewhat less than that on active surfaces such as the
native oxides of Si or III–V compounds, but their effect onnucleation in an ALD process cannot be ruled out.
Residues from processing also surely play a role in this
context. The impact of such contamination on ALD high-kdielectric growth has been recently reported [149].
An alternative method to ALD of gate dielectrics on
graphene includes the physical vapor deposition (PVD) of
metals and metal oxides. Early work on high-k gate
dielectric deposition on Si employed this concept [163].Examples include sputtered Zr [164] as well as evaporated
La and Al [165]. and subsequent oxidation to form thin
(�2–5 nm) ZrO2, La2O3, and Al2O3, respectively. In the
context of graphene, Kim et al. [14] utilized this approach
to produce a ‘‘seed layer’’ for subsequent Al2O3 ALD
growth. A 1–2-nm Al metal film was deposited by e-beam
evaporation on exfoliated graphene, followed by exposure
to the clean-room ambient resulting in extensive oxidationof the thin Al layer [166]. This surface was then submitted
to a water/TMA ALD process to produce a 15-nm Al2O3
dielectric film incorporated into a top-gated structure. A
dielectric constant of k ¼ 6:0 was reported for the
resultant Ni/Al2O3/AlOx/graphene gate stack, and an
extracted mobility as high as 8600 cm2/s was reported.
This work was recently extended by comparing Ti and Al as
nucleation layers. The data indicate that the Ti is a moreeffective and uniform metal as an adhesion layer yielding
an improved capacitance scaling for the Al2O3 top-gate
dielectric on exfoliated graphene [167].
Lemme et al. [168], [169] studied the use of an electron-
beam evaporated SiO2 layer (20 nm) as a gate dielectric on an
exfoliated graphene gFET and observed that the mobility is
reduced from �4800 cm2/V�s for electrons and holes to
�700 and 500 cm2/V�s, respectively, after deposition of thetop-gate stack. An interaction of the �-orbitals of the under-
lying graphene with the SiO2 resulting in van der Waals
bonding [170] was proposed as the source of mobility de-
gradation for this gFET. There are limited reports utilizing
such PVD methods to seed ALD on CVD graphene, and
mobilities greater than 4000 cm2/V�s have been extracted
from electrical measurements of Al2O3 top-gated films [11].
There are limited reports on the effect of the depositeddielectrics on the Raman signature. The limited data show
that there are no significant deleterious effects as established
by the absence of the Raman D-band for processes that yield
good electrical data [17], [171].
Scaling of deposited oxides has been extensively
studied with some nucleation–functionalization ap-
proaches better than others as described above, but scaling
down to monolayer levels without pinholes and low gateleakage has been difficult to achieve. The introduction of
hBN [134] and transition metal dichalcogenides (TMD)
[172] as potential dielectrics has changed the landscape of
dielectric scaling approaches and is now attracting a lot of
attention [173], [174]. Graphene, exfoliated and CVD on
Cu, transfer to hBN flakes has yielded excellent carrier
mobilities as a result of lower substrate induced disorder.
Deposition and growth of these materials is now beingextensively investigated because of the promising electri-
cal results using exfoliated films. However, the deposition
of the same materials on metal substrates and on graphene
at the monolayer level has not yielded the same transport
properties, to our knowledge, yet.
While ALD, perhaps in this case atomic layer epitaxy
(ALE), can still be a desired approach for the growth of
these ‘‘new’’ 2-D materials, there are other techniques suchas molecular beam epitaxy that could be equivalently
attractive. The advantage of processes like MBE is that one
could avoid the use of precursors that tend to introduce
unwanted hydrocarbons and perhaps metallic impurities
because of the difficulty in procuring very high purity
precursors, and thus provide purer films. At this time,
there are no reported data on the effect of specific
impurities in gate dielectrics on device performance.
C. Graphene-Dielectric Interface CharacterizationThe characterization of the graphene-dielectric inter-
face is also a topic of intense interest. An important
method in this work is X-ray photoelectron spectroscopy
[175], which enables the detailed understanding of the
interfacial bonding present. Particularly when coupled
with in situ treatments of the graphene surface, one canobtain a fundamental understanding of reaction pathways
during the dielectric growth process. Another important
technique is scanning tunneling microscopy/spectroscopy.
An example of in situ analysis of 1 nm of Al deposited
on HOPG is shown in Fig. 12 [7]. In this work, the effect of
annealing of the exfoliated HOPG sample, prior to Al
metal deposition was conducted, to remove physorbed
species on the surface, such as hydroxyls from (brief)atmospheric exposure. It is seen in Fig. 12(a) that the post-
anneal surface reveals a characteristic C1s line shape for
sp2 carbon, and that the Al2p spectra is consistent with
unoxidized Al on the clean HOPG surface. Upon exposure
to O2 at 200 �C, the aluminum is not completely oxidized,
as seen by the small remnant Al0 metal feature at�72.6 eV.
In contrast, if the exfoliated HOPG surface is not annealed
Colombo et al. : Graphene Growth and Device Integration
1548 Proceedings of the IEEE | Vol. 101, No. 7, July 2013
prior to deposition, the surface has remnant oxygen-related
physisorbed species (likely hydroxyls), and the deposited Al
reacts with these species to consume them forming AlOx at
the interface [Fig. 12(c)]. It is clear that subsequent
oxidation then results in complete oxidation of thedeposited Al. In contrast to the behavior of Al, a 1-nm Hf
layer deposited at room temperature can result in Hf–C
formation on HOPG, as seen in Fig. 13. Fig. 13(a) shows the
XPS spectra of Hf/graphene after Hf deposition; where a
C1s feature at �282 eV is clearly evident and indicative of
Hf–C bonding. Perhaps the formation of Hf–C reaction is
aided by the presence of adsorbates on the graphite surface;
graphite–titanium reactions have been reported afterannealing at high temperatures, and at T G 600 K
interfacial reactions have been observed. It is therefore
not surprising that Hf also reacts with graphite at room
temperature. In the case of Al, Al4C3 can also be formed,
but it readily reacts with water and is thus unstable [176]. In
the presence of oxygen as was the case for the Ti, Hf, and Al
interfacial layers reported by Fallahazad et al. [167], [177]
and Kim et al. [178], the graphene seems to be very stableagainst carburization. Such bonding would be anticipated
to be catastrophic for a monolayer graphene sheet. A
substantial amount of oxidized Hf is also noted on this
surface from the companion O1s and Hf4f spectra.
However, if one performs an anneal prior to deposition
and utilizes a liquid N2 cooled shroud in the e-beam
deposition process, thereby improving the vacuum during
deposition through the cryo-adsorption of residual gasspecies such as hydroxyls, carbide formation is suppressed
and the Hf metal getters the remaining oxygen to form
HfOx on the HOPG surface, as shown in Fig. 13(b). Again,
subsequent oxidation of this film results in the formation of
HfO2 [Fig. 13(c) and (d)]. A comparison of the topography
of these metal–oxide films using ex situ AFM (not shown)
reveals that the AlOx is clustered while the HfOx isrelatively smooth, presumably due to a lower surface
diffusion rate of Hf relative to Al, and is consistent with the
interfacial chemical behavior observed. Taken together,
these results point to the importance of controlling the
interfacial reactions through careful control of the depo-
sition tool conditions, and thus substantial optimization
can be achieved for device development. In situ studies of
the HfO2/graphene (derived from SiC) have also beenrecently reported [179].
As noted previously, improvements in the capacitance
scaling by engineering the interface are necessary.
Fallahazad et al. [167] used Ti as a nucleation layer to
improve the uniformity of the top dielectric as well as an
increase in the dielectric constant. The increase in
dielectric constant of the Al2O3/TiO2 stack was associated
Fig. 12. O1s, C1s, and Al2p spectra for graphite sample with
predeposition anneal at 500 �C to remove physisorbed interfacial
hydroxyls (a) Al as-deposited and (b) Al oxidized in 1000 mbar O2
at 200 �C for 10 min. Sample without predeposition anneal
(c) Al as-deposited and (d) oxidized under the same conditions as (b).
(Reprinted with permission, � 2009 American Institute of Physics [7].)
Fig. 13. 1-nm Hf deposited on (a) exfoliated graphite with
deposition chamber walls at 25 �C and P ¼ 1� 10�8 mbar, (b) annealed
(500 �C/30 min) graphite with chamber walls cooled by liquid N2
and P ¼ 4� 10�10 mbar, (c) Hf oxidized in 1000 mbar O2 at 25 �C,
(d) HfO2 deposited by reactive e-beam deposition with 1� 10�6 mbar
partial pressure of O2. A difference spectrum between the two
graphite+HfO2 C1s peaks is shown in (e); the peak for sample (c)
is broader than (d) by 0.13 eV. (Reprinted with permission,
� 2009 American Institute of Physics [19].)
Colombo et al. : Graphene Growth and Device Integration
Vol. 101, No. 7, July 2013 | Proceedings of the IEEE 1549
with a partial crystallinity of the Al2O3. It is interesting tonote that no interdiffusion of the Al and Ti took place as
perhaps expected given the low processing temperature. It
was also noted that the roughness of the oxidized Ti layer
(�0.24 nm) is about half of that for the oxidized Al layer,
consistent with a reduced surface diffusion rate for Ti
relative to Al. The extracted dielectric constant of the
Al2O3/TiO2 stack is larger than that for the Al2O3-only
stack, and that the extracted mobility is also impacted bythe higher dielectric capacitance density obtained through
the incorporation of Ti-based nucleation layer. The falloff
in the mobility with increasing (Al2O3) gate stack thickness
was attributed to Coulomb scattering from charged point
defects (e.g., oxygen vacancies) in the dielectric [167].
Recent studies have also examined the placement of Al2O3
nanoribbons on exfoliated graphene, where top-gate mobi-
lities as high as 23 600 cm2/V�s were reported for the thin-nest top dielectric, 38 nm and a residual carrier concentration
at the Dirac point of about 4.1� 1011 cm�2 [180].
Recently, in situ electrical measurements of ALD Al2O3
deposited on exfoliated graphene utilizing the ozone
functionalization methods described previously indicate a
back-gated mobility as high as 19 000 cm2/V�s have also
been reported [153]. Finally, extensions to deposited low-kdielectrics on exfoliated graphene have been reported forparylene-C, a dielectric normally employed for organic
thin-film transistor development [181]. Further work using
such dielectric deposition methods applied to large-area
CVD graphene is anticipated in the near term.
V. METAL CONTACTS
Successful device fabrication and operation requires lowcontact resistance for the source and drain regions since
this can limit device performance. There has been a
significant amount of effort in decreasing the metal
contact resistance in silicon devices. The contact resis-
tance of metals to graphene or to CNTs is still very high
compared to state-of-the-art contacts in silicon devices.
There have been some advancements in the contact
resistance of metals on graphene, but it is still about anorder of magnitude too high.
There are several issues at this time, metal selection,
graphene surface cleaning, and metal–graphene bonding
type and understanding. Metal selection involves ensuring
that the metal does not fully carburize thus destroying the
graphene or dissolving the graphene, and must have the
desired work function. With the exception of Cu, Ir, Au,
and Ag, most metals either react or can significantlydissolve the carbon under appropriate thermodynamic and
chemical conditions. A few studies have been carried out
to extract the contact resistance of metals on graphene
[10], [182]–[184]. The contact resistance of metals on
graphene was measured by the traditional transfer length
method (TLM) for a several metals and the graphene
carefully characterized. Robinson et al. [10] measured the
contact resistance of the following metals on graphene/SiC: Ti/Au, Cr/Au, Ni/Au, Pt/Au, Cu/Au, and Pd/Au after
various oxygen plasma treatments and found that while the
graphene quality degraded according to Raman measure-
ments, i.e., the D-band intensity increased significantly, the
specific contact resistance decreased to about 10�7 W cm2.
A summary of the process conditions and the effect on the
contact resistance is shown in Fig. 14. This is a major
advancement, but even though there was a large workfunction difference between the various metals, there was
no correlation to the contact resistance. The reasons for the
high contact resistance vary and the lack of correlation to
the specific metal may be associated with the lack of precise
understanding of the graphene–metal interface chemistry,
an area still to be carefully investigated.
Certainly, graphene on SiC maybe the best source of
‘‘clean’’ graphene since exposure to hydrocarbons and other
Fig. 14. Process showing that surface preparation has a significant
effect on the specific contact resistance of Ti to graphenen. (Reprinted
with permission, � 2011 American Institute of Physics [10].)
Colombo et al. : Graphene Growth and Device Integration
1550 Proceedings of the IEEE | Vol. 101, No. 7, July 2013
chemicals used in the processing and transfer of CVDgraphene is much lower. However, the multilayer nature of
graphene on SiC may introduce aspects in the understanding
and controlling the contact resistance in single-layer
graphene that have not been comprehended so far. Recently,
Xia et al. [185] also reported on the reduction of the contact
resistance of Pd to graphene down to about 170 W-cm, but
this is still too high for most device applications. Therefore, it
is important to continue to develop a basic understanding ofthe metal–graphene interface chemistry.
In addition to the basic understanding of the interface
chemistry, it is also important to select the appropriate
metal deposition technique in addition to graphene surface
cleaning and preparation. Nagashio et al. [186] have
recently reported that sputtered Ti led to extremely high
resistivity in comparison to evaporated Ti.
VI. SUMMARYSignificant advancements have been made in the growth
and integration of large-area graphene films over the past
eight years or so. Freestanding extremely large graphene
films can be grown using CVD on weakly interacting
substrates like Cu with transport properties equivalent to
graphene exfoliated from natural graphite. Because of theability to grow very large-area and high-quality graphene
films, the CVD growth process is enabling the develop-
ment of many different applications, from displays to RFdevices. In addition, the community is learning how to
grow relatively large single crystals of graphene on metal
surfaces that will hopefully help identify the material
requirements for the most demanding devices.
Because of the physical size demands and manufactur-
ability, it is likely that CVD processes, in general, will win
out over other graphene production means for HVM of
graphene-based high-performance devices. Growth ofgraphene on SiC can provide very high-quality material
but many applications require large substrate areas that
this technique cannot currently provide. CVD of graphene
on dielectrics would be a preferred process; however,
there are still many challenges that face this approach, and
more work needs to be done. The contact resistance also
requires a significant amount of work in understanding
metal–graphene interface, and the effect of extrinsicfactors of which at this stage of development there are
many. Finally, an equivalently challenging problem is the
scaling of gate dielectrics on graphene with a desired
dielectric constant. While dielectrics have been scaled on
Si down to about 1 nm in products and dielectrics of
thicknesses much lower than 1 nm can de deposited or
grown on Si, the deposition details of dielectrics on
graphene still need more work. The use and developmentof 2-D crystals such as hBN and TMD could help address
the need for scaled dielectrics. h
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ABOUT T HE AUTHO RS
Luigi Colombo (Fellow, IEEE) received the B.S.
degree in physics from the Iona College, New
Rochelle, NY, USA, in 1975 and the Ph.D. degree in
materials science from the University of Rochester,
Rochester, NY, USA, in 1980.
From 1980 to 1981, he was a Postdoctoral
Fellow at the Mechanical and Aerospace Science
Department, University of Rochester, Rochester,
NY, USA. In 1981, he joined Texas Instruments (TI)
Incorporated, Dallas, TX, USA, where he first
worked on infrared detector materials until 1995. Over this period, he
developed a HgCdZnTe liquid phase epitaxy process, which he also put in
production in 1991, and it is still in production today. Since then, he has
been responsible for the development of high-k capacitor metal–
insulator–metal structures for dynamic random access memories,
development of high-k gate/metal gate transistor gate stack using
Hf-based dielectrics, and low-leakage SiON-based 45-nm transistor gate
stack development. He is currently a TI Fellow in the External Research
Development Group at TI, where he is responsible for the development of
newmaterials such as graphene and its integration in new device flows for