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The MC34063A Series is a monolithic control circuit containing theprimary functions required for DC−to−DC converters. These devicesconsist of an internal temperature compensated reference, comparator,controlled duty cycle oscillator with an active current limit circuit,driver and high current output switch. This series was specificallydesigned to be incorporated in Step−Down and Step−Up andVoltage−Inverting applications with a minimum number of externalcomponents. Refer to Application Notes AN920A/D and AN954/Dfor additional design information.
Features• Operation from 3.0 V to 40 V Input
• Low Standby Current
• Current Limiting
• Output Switch Current to 1.5 A
• Output Voltage Adjustable
• Frequency Operation to 100 kHz
• Precision 2% Reference
• NCV Prefix for Automotive and Other Applications RequiringUnique Site and Control Change Requirements; AEC−Q100Qualified and PPAP Capable
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHSCompliant
Figure 1. Representative Schematic Diagram
S Q
R
Q2
Q1
100
IpkOscillator CT
Comparator
+
-
1.25 VReferenceRegulator
1
2
3
45
6
7
8DriveCollector
IpkSense
VCC
ComparatorInverting
Input
SwitchCollector
SwitchEmitter
TimingCapacitor
GND
(Bottom View)
This device contains 79 active transistors.
SOIC−8D SUFFIXCASE 751
PDIP−8P, P1 SUFFIX
CASE 626
1
8
See detailed ordering and shipping information in the packagedimensions section on page 12 of this data sheet.
ORDERING INFORMATION
x = 3 or 4A = Assembly LocationL, WL = Wafer LotY, YY = YearW, WW = Work WeekG or � = Pb−Free Package
Switch Collector to Emitter Voltage VCE(switch) 40 Vdc
Driver Collector Voltage VC(driver) 40 Vdc
Driver Collector Current (Note 1) IC(driver) 100 mA
Switch Current ISW 1.5 A
Power Dissipation and Thermal Characteristics
Plastic Package, P, P1 Suffix
TA = 25°C PD 1.25 W
Thermal Resistance R�JA 115 °C/W
SOIC Package, D Suffix
TA = 25°C PD 625 mW
Thermal Resistance R�JA 160 °C/W
Thermal Resistance R�JC 45 °C/W
DFN Package
TA = 25°C PD 1.25 mW
Thermal Resistance R�JA 80 °C/W
Operating Junction Temperature TJ +150 °C
Operating Ambient Temperature Range TA °C
MC34063A, SC34063A 0 to +70
MC33063AV, NCV33063A −40 to +125
MC33063A, SC33063A −40 to +85
Storage Temperature Range Tstg −65 to +150 °C
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionalityshould not be assumed, damage may occur and reliability may be affected.1. Maximum package power dissipation limits must be observed.2. This device series contains ESD protection and exceeds the following tests: Human Body Model 4000 V per MIL−STD−883, Method 3015.
Machine Model Method 400 V.3. NCV prefix is for automotive and other applications requiring site and change control.
Threshold Voltage Line Regulation (VCC = 3.0 V to 40 V)MC33063, MC34063MC33063V, NCV33063
Regline−−
1.41.4
5.06.0
mV
Input Bias Current (Vin = 0 V) IIB − −20 −400 nA
TOTAL DEVICE
Supply Current (VCC = 5.0 V to 40 V, CT = 1.0 nF, Pin 7 = VCC,VPin 5 > Vth, Pin 2 = GND, remaining pins open)
ICC − − 4.0 mA
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Productperformance may not be indicated by the Electrical Characteristics if operated under different conditions.4. Tlow = 0°C for MC34063, SC34063; −40°C for MC33063, SC33063, MC33063V, NCV33063
Thigh = +70°C for MC34063, SC34063; +85°C for MC33063, SC33063; +125°C for MC33063V, NCV330635. Low duty cycle pulse techniques are used during test to maintain junction temperature as close to ambient temperature as possible.6. If the output switch is driven into hard saturation (non−Darlington configuration) at low switch currents (≤ 300 mA) and high driver currents
(≥ 30 mA), it may take up to 2.0 �s for it to come out of saturation. This condition will shorten the off time at frequencies ≥ 30 kHz, and ismagnified at high temperatures. This condition does not occur with a Darlington configuration, since the output switch cannot saturate. If anon−Darlington configuration is used, the following output drive condition is recommended:
Forced � of output switch :IC output
IC driver – 7.0 mA *� 10
* The 100 � resistor in the emitter of the driver device requires about 7.0 mA before the output switch conducts.
8. If the output switch is driven into hard saturation (non−Darlington configuration) at low switch currents (≤ 300 mA) and high driver currents(≥ 30 mA), it may take up to 2.0 �s to come out of saturation. This condition will shorten the off time at frequencies ≥ 30 kHz, and is magnifiedat high temperatures. This condition does not occur with a Darlington configuration, since the output switch cannot saturate. If anon−Darlington configuration is used, the following output drive condition is recommended.
8
7
6
Rsc
Vin
1
2
Vout
Figure 10. External Current Boost Connections for IC Peak Greater than 1.5 A
Vsat = Saturation voltage of the output switch.VF = Forward voltage drop of the output rectifier.
The following power supply characteristics must be chosen:
Vin − Nominal input voltage.Vout − Desired output voltage,Iout − Desired output current.fmin − Minimum desired output switching frequency at the selected values of Vin and IO.Vripple(pp) − Desired peak−to−peak output ripple voltage. In practice, the calculated capacitor value will need to be increased due to its
equivalent series resistance and board layout. The ripple voltage should be kept to a low value since it will directly affect theline and load regulation.
NOTE: For further information refer to Application Note AN920A/D and AN954/D.
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel PackagingSpecification Brochure, BRD8011/D.
*NCV33063A: Tlow = −40°C, Thigh = +125°C. Guaranteed by design. NCV prefix is for automotive and other applications requiring site andchange control.
SENSEFET is a trademark of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates and/or subsidiaries in the United States and/or othercountries.
XXXX = Specific Device CodeA = Assembly LocationL = Wafer LotY = YearW = Work Week� = Pb−Free Package
GENERICMARKING DIAGRAM*
XXXXXXXXXXXXALYW�
�
*This information is generic. Please refer todevice data sheet for actual part marking.Pb−Free indicator, “G” or microdot “ �”,may or may not be present.
PIN ONEREFERENCE
*For additional information on our Pb−Free strategy and solderingdetails, please download the ON Semiconductor Soldering andMounting Techniques Reference Manual, SOLDERRM/D.
SOLDERING FOOTPRINT*
8X0.63
2.21
2.39
8X
0.80PITCH
4.30
0.35
(Note: Microdot may be in either location)
L1
DETAIL A
L
OPTIONALCONSTRUCTIONS
ÉÉÉÉÉÉÇÇÇ
A1
A3
L
ÇÇÇÇÇÇÉÉÉ
DETAIL B
MOLD CMPDEXPOSED Cu
ALTERNATECONSTRUCTIONS
L1 −−− 0.15
DETAIL B
NOTE 4
DETAIL A
DIMENSIONS: MILLIMETERS
PACKAGEOUTLINE
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regardingthe suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specificallydisclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor therights of others.
98AON15232DDOCUMENT NUMBER:
DESCRIPTION:
Electronic versions are uncontrolled except when accessed directly from the Document Repository.Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
XXXX = Specific Device CodeA = Assembly LocationWL = Wafer LotYY = YearWW = Work WeekG = Pb−Free Package
*This information is generic. Please refer todevice data sheet for actual part marking.Pb−Free indicator, “G” or microdot “ �”,may or may not be present.
A
TOP VIEW
C
SEATINGPLANE
0.010 C ASIDE VIEW
END VIEW
END VIEW
WITH LEADS CONSTRAINED
DIM MIN MAXINCHES
A −−−− 0.210A1 0.015 −−−−
b 0.014 0.022
C 0.008 0.014D 0.355 0.400D1 0.005 −−−−
e 0.100 BSC
E 0.300 0.325
M −−−− 10
−−− 5.330.38 −−−
0.35 0.56
0.20 0.369.02 10.160.13 −−−
2.54 BSC
7.62 8.26
−−− 10
MIN MAXMILLIMETERS
NOTES:1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.2. CONTROLLING DIMENSION: INCHES.3. DIMENSIONS A, A1 AND L ARE MEASURED WITH THE PACK-
AGE SEATED IN JEDEC SEATING PLANE GAUGE GS−3.4. DIMENSIONS D, D1 AND E1 DO NOT INCLUDE MOLD FLASH
OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS ARENOT TO EXCEED 0.10 INCH.
5. DIMENSION E IS MEASURED AT A POINT 0.015 BELOW DATUMPLANE H WITH THE LEADS CONSTRAINED PERPENDICULARTO DATUM C.
6. DIMENSION eB IS MEASURED AT THE LEAD TIPS WITH THELEADS UNCONSTRAINED.
7. DATUM PLANE H IS COINCIDENT WITH THE BOTTOM OF THELEADS, WHERE THE LEADS EXIT THE BODY.
8. PACKAGE CONTOUR IS OPTIONAL (ROUNDED OR SQUARECORNERS).
E1 0.240 0.280 6.10 7.11
b2
eB −−−− 0.430 −−− 10.92
0.060 TYP 1.52 TYP
E1
M
8X
c
D1
B
A2 0.115 0.195 2.92 4.95
L 0.115 0.150 2.92 3.81°°
H
NOTE 5
e
e/2A2
NOTE 3
M B M NOTE 6
M
STYLE 1:PIN 1. AC IN
2. DC + IN3. DC − IN4. AC IN5. GROUND6. OUTPUT7. AUXILIARY8. VCC
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regardingthe suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specificallydisclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor therights of others.
98ASB42420BDOCUMENT NUMBER:
DESCRIPTION:
Electronic versions are uncontrolled except when accessed directly from the Document Repository.Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
XXXXX = Specific Device CodeA = Assembly LocationL = Wafer LotY = YearW = Work Week� = Pb−Free Package
GENERICMARKING DIAGRAM*
1
8
XXXXXALYWX
1
8
IC Discrete
XXXXXXAYWW
�1
8
1.520.060
7.00.275
0.60.024
1.2700.050
4.00.155
� mminches
�SCALE 6:1
*For additional information on our Pb−Free strategy and solderingdetails, please download the ON Semiconductor Soldering andMounting Techniques Reference Manual, SOLDERRM/D.
SOLDERING FOOTPRINT*
Discrete
XXXXXXAYWW
1
8
(Pb−Free)
XXXXXALYWX
�1
8
IC(Pb−Free)
XXXXXX = Specific Device CodeA = Assembly LocationY = YearWW = Work Week� = Pb−Free Package
*This information is generic. Please refer todevice data sheet for actual part marking.Pb−Free indicator, “G” or microdot “�”, mayor may not be present. Some products maynot follow the Generic Marking.
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regardingthe suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specificallydisclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor therights of others.
98ASB42564BDOCUMENT NUMBER:
DESCRIPTION:
Electronic versions are uncontrolled except when accessed directly from the Document Repository.Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regardingthe suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specificallydisclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor therights of others.
98ASB42564BDOCUMENT NUMBER:
DESCRIPTION:
Electronic versions are uncontrolled except when accessed directly from the Document Repository.Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
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