Introduction to Power Consumption in Digital Integrated Circuits Arnaud Tisserand CNRS, IRISA laboratory, CAIRN research team ECOFAC 2010 Plestin les Gr` eves March 29th – April 2nd, 2010 Summary • Introduction • Power/energy consumption sources • Power/energy reduction methods • Examples on arithmetic operators • Conclusion & References A. Tisserand, CNRS–IRISA–CAIRN. Introduction to Power Consumption in Digital Integrated Circuits 2/90 Power: Orders of Magnitude 10 -12 pW 10 -9 nW 10 -6 μW 10 -3 mW 1 W 10 3 kW 10 6 MW 10 9 GW 10 12 TW 10 15 PW total power received by the earth from the sun (170 PW) total electric production capacity worldwide in 2007 (4.4 TW) France peak consumption in 2009 (92 GW) Three Gorges dam in China (18 GW) nuclear power plant “slice” (900 MW) Google data center (20 MW) ENIAC computer in 1946 (150 kW) electric heater (2 kW) high-performance microprocessor Xeon X3470 2.4 GHz (95 W) low-power microprocessor VIA C7 1.2 GHz (5 W) 16-bit MCU TI MSP430-2xx active 3V 16 MIPS (250 μA/MIPS) 65 nm NAND2-D2 HP @ 100 MHz dynamic power (1.2 μW/MHz) 65 nm NAND2-D2 HP static power (15 μW) quartz wristwatch (1 μW) 8-bit MCU sleep mode (10 nW) human cell (1 pW) A. Tisserand, CNRS–IRISA–CAIRN. Introduction to Power Consumption in Digital Integrated Circuits 3/90 Electric Energy Cost for Households US$/kWh 0 0.05 0.10 0.15 0.20 0.25 0.30 year 1999 2000 2001 2002 2003 2004 2005 2006 2007 France Canada Denmark Germany United States United Kingdom Switzerland Source: US Energy Information Administration. Aug. 2008 Electricity cost (EDF) in France, February/March 2010: • 0.0839 e/kWh day rate • 0.0519 e/kWh “night” rate • 6.54 e/month for a small house A. Tisserand, CNRS–IRISA–CAIRN. Introduction to Power Consumption in Digital Integrated Circuits 4/90
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Introduction to Power Consumptionin Digital Integrated Circuits
Arnaud Tisserand
CNRS, IRISA laboratory, CAIRN research team
ECOFAC 2010Plestin les Greves
March 29th – April 2nd, 2010
Summary
• Introduction
• Power/energy consumption sources
• Power/energy reduction methods
• Examples on arithmetic operators
• Conclusion & References
A. Tisserand, CNRS–IRISA–CAIRN. Introduction to Power Consumption in Digital Integrated Circuits 2/90
Power: Orders of Magnitude
10−12 pW
10−9 nW
10−6 µW
10−3 mW
1 W
103 kW
106 MW
109 GW
1012 TW
1015 PW
total power received by the earth from the sun (170 PW)
total electric production capacity worldwide in 2007 (4.4 TW)France peak consumption in 2009 (92 GW)Three Gorges dam in China (18 GW)nuclear power plant “slice” (900 MW)
Google data center (20 MW)ENIAC computer in 1946 (150 kW)
electric heater (2 kW)high-performance microprocessor Xeon X3470 2.4 GHz (95 W)low-power microprocessor VIA C7 1.2 GHz (5 W)
16-bit MCU TI MSP430-2xx active 3V 16 MIPS (250 µA/MIPS)
65 nm NAND2-D2 HP @ 100 MHz dynamic power (1.2 µW/MHz)65 nm NAND2-D2 HP static power (15 µW)quartz wristwatch (1 µW)
8-bit MCU sleep mode (10 nW)
human cell (1 pW)
A. Tisserand, CNRS–IRISA–CAIRN. Introduction to Power Consumption in Digital Integrated Circuits 3/90
Electric Energy Cost for Households
US$/kWh
0
0.05
0.10
0.15
0.20
0.25
0.30
year19
9920
0020
0120
0220
0320
0420
0520
0620
07
France
Canada
Denmark
Germany
United States
United Kingdom
Switzerland
Source: US Energy Information Administration. Aug. 2008
Electricity cost (EDF) in France, February/March 2010:
• 0.0839 e/kWh day rate
• 0.0519 e/kWh “night” rate
• 6.54 e/month for a small house
A. Tisserand, CNRS–IRISA–CAIRN. Introduction to Power Consumption in Digital Integrated Circuits 4/90
Electricity Consumption Worldwide 1980–2006PWh
2
4
6
8
10
12
14
16
0year
1980
1985
1990
1995
2000
2005
total
North America
Europe
Eurasia
Asia & Oceania
Central&South AmericaMiddle EastAfrica
Source: US Energy Information Administration, Forecasts & Analysis.
http://www.eia.doe.gov
year 1980 1985 1990 1995 2000 2005world population [Gp] 4.435 4.831 5.263 5.674 6.070 6.454
A. Tisserand, CNRS–IRISA–CAIRN. Introduction to Power Consumption in Digital Integrated Circuits 5/90
Electric Consumption Forecasts
PWh
4
8
12
16
20
24
28
32
0year
2006
2010
2015
2020
2025
2030
total, world
renewables, world
total, OECD
renewables, OECD
total, non-OECD
renewables, non-OECD
World population: 6.5 Gp in 2005 −→ 8.2 Gp in 2030 (expected value)
Source: US International Energy Outlook 2009. Energy Information Administration Office of
Integrated Analysis and Forecasting U.S. Department of Energy. May 2009,
http://www.eia.doe.gov/oiaf/ieo/index.html
A. Tisserand, CNRS–IRISA–CAIRN. Introduction to Power Consumption in Digital Integrated Circuits 6/90
Energy Production and Consumption in France
TWh
50
100
150
200
250
300
350
400
450
500
550
0year
1970
1975
1980
1985
1990
1995
2000
200520
0620
07
Mp
50
52
54
56
58
60
62
popul.
production
consumption
leakageimport
export
Source: Production-distribution de l’energie electrique en France et dans les regions en 2005
et 2006. Rapport du Commissariat general au developpement durable
A. Tisserand, CNRS–IRISA–CAIRN. Introduction to Power Consumption in Digital Integrated Circuits 7/90
Energy Production and Consumption in French Regions
TWh
0
20
40
60
80
100
120
Alsace
Aquitain
e
Auverg
ne
Basse
-Nor
man
die
Bourg
ogne
Breta
gne
Centr
e
Champag
ne-Ard
enne
Corse
Franch
e-Com
te
Hau
te-N
orm
andie
Ile-d
e-Fra
nce
Langu
edoc-
Rouss
illon
Limou
sin
Lorra
ine
Mid
i-Pyr
enee
s
Nor
d-Pas
-de-
Calai
s
Pays-
de-la
-Loi
re
Picar
die
Poito
u-Char
ente
s
Prove
nce-A
lpes
-Cot
e-Azu
r
Rhone-
Alpes
production consumption
Source: Production-distribution de l’energie electrique en France et dans les regions en 2005
et 2006. Rapport du Commissariat general au developpement durable
A. Tisserand, CNRS–IRISA–CAIRN. Introduction to Power Consumption in Digital Integrated Circuits 8/90
• all servers and data centers: 61 TWh (≈ 1.5 % US electricity)I cost 4.5 G$I requires 7 GW production (≈ 15 base-load power plants)I > consumption by nation’s color televisionsI consumption of ≈ 5.8 million average US householdsI 2× energy consumption in 2000 for this purpose
• federal servers and data centers: ≈ 6 TWh
• power and cooling infrastructure ≈ 50 % total consumption
• forecasts for 2011:I 2× energy (cost 7.4 G$)I would require 12 GW production and an additional 10 power plants
Source: Report to Congress on Server and Data Center Energy Efficiency. US Environmental
Protection Agency (EPA). Aug. 2007
A. Tisserand, CNRS–IRISA–CAIRN. Introduction to Power Consumption in Digital Integrated Circuits 13/90
Reasons for Reducing Power Consumption
year
1990
1995
2000
2001
2004
2005
2008
2010
$
0
500
1000
1500
2000
2500
3000
3500
server
total
infrastructure
energy
cost(energy for 1 server / 1 year) > cost(server)
Source: C. Belady. In the Data Center, Power and Cooling Cost More Than the IT Equipment
It Supports. Electronics Cooling Magazine, Vol. 13, N. 1, May 2007
A. Tisserand, CNRS–IRISA–CAIRN. Introduction to Power Consumption in Digital Integrated Circuits 14/90
Cooling in Data Centers
• cooling is a significant challenge
• < 50 % power for electronic equipments (30–40 % in some cases)
• problem: keeping the hardware cool and humidified
Source: J. Cho, T. Lim, B. S. Kim. Measurements and predictions of the air distribution
systems in high compute density (Internet) data centers. Energy and Buildings, vol. 41, pp.
1107-1115, 2009
A. Tisserand, CNRS–IRISA–CAIRN. Introduction to Power Consumption in Digital Integrated Circuits 15/90
Power Distribution in Data Centers
bu
ildin
gp
ower
sup
ply
serverAC/DC
serverAC/DC
server
server
server
server
UPS
AC/DC DC/AC
PDU
UPS
AC/DC
UPS
AC/DC DC/AC
PDU PSU
AC/DC
Source: California Energy Commission’s Public Interest Energy Research Program
PDU: power distribution unit, PSU: power supply unit, UPS: uninterruptible power supply
A. Tisserand, CNRS–IRISA–CAIRN. Introduction to Power Consumption in Digital Integrated Circuits 16/90
Supercomputing Sites
rank site country # cores perf. power Wcore
MFlopsW
TFlops kW
1 ORNL USA 224 162 1 759 6 950 31 2532 LANL USA 122 400 1 042 2 345 19 4443 NICS USA 98 928 8314 FZJ Germany 294 912 825 2 268 8 3645 NSCCT China 71 680 5636 NASA USA 56 320 544 2 348 42 2327 LLNL USA 212 992 478 2 329 11 2058 ANL USA 163 840 458 1 260 8 3649 TACC USA 62 976 433 2 000 32 217
28 CINES France 12 288 128 608 49 21129 LANL USA 14 400 126 276 19 45830 NICS USA 17 956 125 888 49 141
Energy Calculator PC Equipment:http://www.eu-energystar.org/en/en_008b.shtml
Assumptions: active energy saving modes, 0.0839 e/kWh
computer type use standby avg. power costh/day kWh/year e/year
small PC + 17” LCD 8 16 68 5.7
multimedia PC + 24” LCD 8 16 172 14.4
HPC workstation + 24” LCD 8 16 346 29.0
small server 24 0 274 23.0
ultra-portable 13” 8 16 18 1.5
notebook 17” 8 16 46 3.9
P. Huber. Dig more coal – the PCs are coming. Forbes, May 1999
A. Tisserand, CNRS–IRISA–CAIRN. Introduction to Power Consumption in Digital Integrated Circuits 21/90
Electromigration• high current density movement of atoms in a conductor• mean time to failure (MTTF) of a wire, Black’s equation:
MTTF = A× J−n × eEakT
A section, J current density, n ≈ 2 scale factor (cst), Ea activation energy (cst for a
material), k Boltzmann’s constant, T temperature
• decreases IC reliability (permanent and intermittent failures)
e
A. Tisserand, CNRS–IRISA–CAIRN. Introduction to Power Consumption in Digital Integrated Circuits 22/90
Electromagnetic Interferences (EMI)Electromagnetic emissions from a device or system (the culprit orattacker) that interfere with the normal operation of another device orsystem (the victim)
time
current
thermography 80C51 MCU by Philips
synchronous (left), asynchronous (right)
Electromagnetic compatibility (EMC):
• ability to avoid introducing intolerable electromagnetic disturbance
• circuit specific design rules
A. Tisserand, CNRS–IRISA–CAIRN. Introduction to Power Consumption in Digital Integrated Circuits 23/90
CoolingProblems due to temperature:
• performance decreases with temperature
25 oC → 105 oC 30 % performance reduction• reliability decreases with temperature
IC temperature > 125 oC faults and characteristics damage
Solutions:
• reduce power consumption
• cool circuits (air, water,...)
A. Tisserand, CNRS–IRISA–CAIRN. Introduction to Power Consumption in Digital Integrated Circuits 24/90
Series: both must be ON, Parallel: either can be ON
A. Tisserand, CNRS–IRISA–CAIRN. Introduction to Power Consumption in Digital Integrated Circuits 33/90
CMOS Logic
CMOS = complementary MOS
N and P transistors are only used for passing strong signals
0
1
G = 1G = 0
1 01
G = 0 G = 1
01 0
outputinputs
?
?
S D
G
P
S D
G
N
NetworkPull−up
P Transistors
N Transistors
Pull−downNetwork
A. Tisserand, CNRS–IRISA–CAIRN. Introduction to Power Consumption in Digital Integrated Circuits 34/90
Logic Gate: InverterThe simplest gate: only 2 transistors (1 N and 1 P)
A YA Y
0 1
1 0
P
N
1 1 1
0 0 0
0 1 1 0
circuit: behavior:
A Y
A. Tisserand, CNRS–IRISA–CAIRN. Introduction to Power Consumption in Digital Integrated Circuits 35/90
Logic Gate: NAND2 (2-input not–and)
A
BY
A B Y
0 0 1
0 1 1
1 0 1
1 1 0
BA
A
B
Y
All logic functions can be built using only NAND gates:
A
B
AB
A
B
A+BA A
A. Tisserand, CNRS–IRISA–CAIRN. Introduction to Power Consumption in Digital Integrated Circuits 36/90
Logic Gate: NOR2 (2-input not–or)
A
BY
A B Y
0 0 1
0 1 0
1 0 0
1 1 0
A
B
BA
Y
A. Tisserand, CNRS–IRISA–CAIRN. Introduction to Power Consumption in Digital Integrated Circuits 37/90
Logic Gate: AND2There is a very bad solution and a good one. . .
BA
D G
ATE
A
B
BA
Y
A
B
A
BY Y
• the bad one (left side): some output levels are degraded
• the good one (right side): AB = AB (6-transistor gate)
A. Tisserand, CNRS–IRISA–CAIRN. Introduction to Power Consumption in Digital Integrated Circuits 38/90
Logic Gate: NAND3 (3-input NAND)
A
B
C
Y
A B C Y
0 0 0 1
0 0 1 1
0 1 0 1
0 1 1 1
1 0 0 1
1 0 1 1
1 1 0 1
1 1 1 0
A
B
A B C
C
Y
The number of transistors in series is limited (3 to 5)
A. Tisserand, CNRS–IRISA–CAIRN. Introduction to Power Consumption in Digital Integrated Circuits 39/90
Fanout
The gate delay (change output state) de-pends on the output load. Fanout measuresthis load as the number of inputs of gateconnected to the output (normalized w.r.t.an inverter)
A. Tisserand, CNRS–IRISA–CAIRN. Introduction to Power Consumption in Digital Integrated Circuits 47/90
Power Consumption: Basic Definitions
Instantaneous power:
P(t) = iDD(t) VDD
Energy over some time interval T:
E =
∫ T
0iDD(t) VDD dt
Average power over interval T:
Pavg =E
T=
1
T
∫ T
0iDD(t) VDD dt
VDD
i DD
circu
it
Units:• current A• voltage V• power W• energy J or Wh
A. Tisserand, CNRS–IRISA–CAIRN. Introduction to Power Consumption in Digital Integrated Circuits 48/90
Power Consumption: Components
Power dissipation in CMOS circuits comes from 2 main components:
• static dissipation:I sub-threshold conduction through OFF transistorsI leakage current through P-N junctionsI tunneling current through gate oxideI . . .
• dynamic dissipation:I charging and discharging of load capacitances (useful + parasitic)I short-circuit current
Ptotal = Pstatic + Pdynamic
A. Tisserand, CNRS–IRISA–CAIRN. Introduction to Power Consumption in Digital Integrated Circuits 49/90
Leakage Current(s)
• leakage current in P-N junctions: I = Is(eqV /kT − 1)E
S
transistor Ptransistor N
p
nppnn
• sub-threshold leakage
type of transistor sub-threshold leakage current
HP high performance 100 nA/µmLOP low-operation power 5 nA/µmLSTP low-standby power 50 pA/µm
• gate leakage by tunneling
Solution: use “better” technologies
A. Tisserand, CNRS–IRISA–CAIRN. Introduction to Power Consumption in Digital Integrated Circuits 50/90
Short-Circuit Current in CMOS Gates
Occurs when both N and P transistors are ON while the input switches
P
N
In Out
t
t
V
II
In
SCsc
Solution : short transition (crisp edges)
A. Tisserand, CNRS–IRISA–CAIRN. Introduction to Power Consumption in Digital Integrated Circuits 51/90
Reducing Short-Circuit Current
low slope (gradient) huge short-circuit current
material copper aluminum tungsten
width (µm) 1 0.59 1 0.36 0.25
raising time (ps) 20 7 13 2 0.4
t
V
R
C
R
C
R
C
R
C
t
V
input output
A. Tisserand, CNRS–IRISA–CAIRN. Introduction to Power Consumption in Digital Integrated Circuits 52/90
Charging and Discharging Load Capacitances
There are capacitances everywhere in the circuit: transistor gate, routing,parasitics. . .
CMOSgate gates
routing
parasitic
Solutions:
• design small circuits (small transistor, short wires, technologyshrinking)
• reduce the activity (algorithms, data coding, sleep mode)
• reduce VDD(without lowering speed)
A. Tisserand, CNRS–IRISA–CAIRN. Introduction to Power Consumption in Digital Integrated Circuits 53/90
Capacitances are Everywhere (1/2)
• Capacitance due to transistors structure:
n n silicon
oxide
metal
• Capacitance due to routing:
x
yz
DA
B
C
M1
M2
VIA
A. Tisserand, CNRS–IRISA–CAIRN. Introduction to Power Consumption in Digital Integrated Circuits 54/90
Capacitances are Everywhere (2/2)
• Parasitic capacitance:
M1
M2
M3
M2
• I/O pad huge capacitance:
to package
output pad
buffer
driving gate
A. Tisserand, CNRS–IRISA–CAIRN. Introduction to Power Consumption in Digital Integrated Circuits 55/90
Transitions
There are 2 kinds of transitions:
• useful transitions (data switching)
• redundant or parasitic transitions (imperfections)
a=1
b=1
c
a
b
c
s
a
b
s
y y
A. Tisserand, CNRS–IRISA–CAIRN. Introduction to Power Consumption in Digital Integrated Circuits 56/90
Simple Power Consumption Model
Average dynamic power dissipation (no leakage, no short circuit):
P = α× C × f × V 2DD
where
• α is the activity factor
• C is the average switched capacitance (at each cycle)
• f is the circuit frequency
• VDDis the supply voltage
Remark: the gate delay is d = γ × C×VDD(VDD−VT )2 ≈ 1
VDD
A. Tisserand, CNRS–IRISA–CAIRN. Introduction to Power Consumption in Digital Integrated Circuits 57/90
Power/Energy Reduction
Typical methods:
• use better algorithms and data structures
• use better technology
• use smaller gates
• use better placement and routing
• reduce power supply VDD
• reduce frequency
• reduce activity
• . . .
Use combinations at all levels
A. Tisserand, CNRS–IRISA–CAIRN. Introduction to Power Consumption in Digital Integrated Circuits 58/90
Power Reduction at Technology Level
• reduce the wire dimensions reduce capacitances
• use better insulators
example: SiO2 −→ high k insulators: Al2O3,HfO2,TiO2,ZrO2. . .
• use technologies with less leakage, e.g. SOI (silicon on insulator)
+ + +−−− + −
oxide insulator
n n p p
S
E
p np p
p
nn
A. Tisserand, CNRS–IRISA–CAIRN. Introduction to Power Consumption in Digital Integrated Circuits 59/90
Power Reduction at Transistor Level
Higher threshold voltage VT :
• leads to lower leakage current
• leads to slower transistor
Idea: use multiple VT (2 or 3 in current technologies)
• lower VT for high-speed gates
• higher VT for gates off the critical path
critical path
low VT high VT
in1
in2
out1
out2
a b c d e
f
g
Example: 70 nm, VDD = 0.8 V, VTL= 0.2 V, VTH
= 0.3 VA. Tisserand, CNRS–IRISA–CAIRN. Introduction to Power Consumption in Digital Integrated Circuits 60/90
A. Tisserand, CNRS–IRISA–CAIRN. Introduction to Power Consumption in Digital Integrated Circuits 82/90
“Read” the Traces
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
• algorithm =⇒ decomposition into steps
• detect loopsI constant time for the loop iterationsI non-constant time for the loop iterations
A. Tisserand, CNRS–IRISA–CAIRN. Introduction to Power Consumption in Digital Integrated Circuits 83/90
Differences & External SignatureAn algorithm has a current signature and a time signature:
r = c0
f o r i from 1 to n doi f ai = 0 then
r = r + c1
e l s er = r × c2
I+ I×t
I
iai
1
0
2
1
3
1
4
0
5
1
6
0
7
0
8
1
T+T×t
T
A. Tisserand, CNRS–IRISA–CAIRN. Introduction to Power Consumption in Digital Integrated Circuits 84/90
Simple Power Analysis (SPA)
A. Tisserand, CNRS–IRISA–CAIRN. Introduction to Power Consumption in Digital Integrated Circuits 85/90
ConclusionABCDEFG
A
Photo source: Intel
Needs:• better technologies, transistors, gates, architectures, CAD tools• accurate power models at all levels• tools and languages to support power information
Power reduction is an interdisciplinary work:• micro-electronics• computer science• applied mathematics• applications
A. Tisserand, CNRS–IRISA–CAIRN. Introduction to Power Consumption in Digital Integrated Circuits 86/90
References (1/2)
Low-power Electronics Design
Edited by C. Piguet
2005, CRC PressISBN: 0–8493–1941–2
Micro et nanoelectroniqueBases, Composants, Circuits
H. Fanet
2006, DunodISBN: 2–10–049141–5
A. Tisserand, CNRS–IRISA–CAIRN. Introduction to Power Consumption in Digital Integrated Circuits 87/90
References (2/2)
CMOS VLSI DesignA Circuits and Systems Perspective