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Intermediate Language Design of High-level Language VMs Towards Comprehensive Concurrency Support VMIL Workshop, 25 th October 2009, Orlando, Florida Michael Haupt Hasso Plattner Institute University of Potsdam Theo D’Hondt Software Languages Lab Vrije Universiteit Brussel Stefan Marr Software Languages Lab Vrije Universiteit Brussel
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Intermediate Language Design of High-level Language VMs: Towards Comprehensive Concurrency Support

Dec 02, 2014

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Stefan Marr

Today, high-level language virtual machines (VMs) are becoming successful in providing an execution platform for a wide range of languages. With the transition from few-core to many-core processors, we argue that virtual machines will also have to abstract from concrete concurrency models at the hardware level, to be able to support a wide range of abstract concurrency models on a language level.
As a first step towards this goal, this paper presents a survey on intermediate language design of VMs. The different designs are analyzed and categorized according to used techniques. Special attention is given to the concurrency support at the intermediate language level and the state of the art is presented. The survey is complemented with a brief look at hardware instruction set architectures and their relevant features for concurrency support.
Furthermore, as an outlook, we are speculating on relevant features for comprehensive concurrency support as part of the inter- mediate languages.
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Page 1: Intermediate Language Design of High-level Language VMs: Towards Comprehensive Concurrency Support

Intermediate Language Designof High-level Language VMs

Towards Comprehensive Concurrency Support

VMIL Workshop, 25th October 2009, Orlando, Florida

Michael HauptHasso Plattner InstituteUniversity of Potsdam

Theo D’HondtSoftware Languages LabVrije Universiteit Brussel

Stefan MarrSoftware Languages LabVrije Universiteit Brussel

Page 2: Intermediate Language Design of High-level Language VMs: Towards Comprehensive Concurrency Support

04/09/2023 2

Agenda

• Motivation• Survey Design• Concurrency Support• Conclusion• Outlook

IL Design For VMs, Stefan Marr, VMIL, Oct. 2009

Page 3: Intermediate Language Design of High-level Language VMs: Towards Comprehensive Concurrency Support

04/09/2023 3

Motivation

• VMs support concurrency insufficiently!– Why? Because, we want multi-language VMs• Fast JITs, great GCs

• How to design an intermediate language?– To our knowledge• No surveys• No overview of design space/tradeoffs

IL Design For VMs, Stefan Marr, VMIL, Oct. 2009

Page 4: Intermediate Language Design of High-level Language VMs: Towards Comprehensive Concurrency Support

04/09/2023 4

SURVEY DESIGNHow to design an intermediate language?

IL Design For VMs, Stefan Marr, VMIL, Oct. 2009

Page 5: Intermediate Language Design of High-level Language VMs: Towards Comprehensive Concurrency Support

04/09/2023 5

Survey Design

IL Design For VMs, Stefan Marr, VMIL, Oct. 2009

2.6

Dis VM 4th ed.

Ruby 1.8/1.9Rubinius

V8 svn

1.4 JVM spec.

OTPR12

6.0 svn

4.4

Dalvik VM 1.0

1.3

5.1

CLI/ECMA-355

Squeak 3.9TraceMonkey

All trademarks and logos are the property of their respective owners.

Page 6: Intermediate Language Design of High-level Language VMs: Towards Comprehensive Concurrency Support

04/09/2023 6

Survey Criteria

• Specification vs. implementation• Abstraction level of intermediate language• Machine model• Representation, instruction encoding• Instruction categories– Arithmetic & logic, control flow, stack, …

• Optimizations

Survey Design

Page 7: Intermediate Language Design of High-level Language VMs: Towards Comprehensive Concurrency Support

04/09/2023 7

Survey

Survey Design

Type Abstraction Model #Regs Execution Length in Byte #Ops

CLI Spec. Bytecode stack 0- var >= 1 217

CPython Impl. Bytecode stack 0switch var 1 or 3 102

Dalvik VM Impl. Bytecode register ∞threaded var >= 2 218

Dis VM Spec. Bytecode mem-mem 0- var 1 - 33 158

Erlang Impl. Bytecode register 1024threaded, JIT fixed 4 148

JVM Spec. Bytecode stack 0- var >= 1 201

Lua Impl. Bytecode register 255switch fixed 4 38

Mozart Impl. Bytecode reg-mem ∞threaded var 4 - 24 97

Parrot Spec. Bytecode register ∞switch,threaded,JIT var >= 4 >1200

PHP Impl. Bytecode reg-mem ∞threaded fixed 76 136

Rubinius Impl. Bytecode stack 0 JIT var 4 -16 89

Ruby 1.8 Impl. AST stack 0switch - - 105

Ruby 1.9 Impl. Bytecode stack 2threaded var >= 32 77

Self Impl. Bytecode stack 0 JIT fixed 1 17

Squeak Impl. Bytecode stack 0switch, threaded var 1 or 2 71

TraceMonkey Impl. Bytecode stack 1threaded, JIT var >= 1 234

V8 Impl. AST - - JIT - - 38

Page 8: Intermediate Language Design of High-level Language VMs: Towards Comprehensive Concurrency Support

04/09/2023 8

Survey

Survey Design

Type Abstraction Model #Regs Execution Length in Byte #Ops

CLI Spec. Bytecode stack 0- var >= 1 217

CPython Impl. Bytecode stack 0switch var 1 or 3 102

Dalvik VM Impl. Bytecode register ∞threaded var >= 2 218

Dis VM Spec. Bytecode mem-mem 0- var 1 - 33 158

Erlang Impl. Bytecode register 1024threaded, JIT fixed 4 148

JVM Spec. Bytecode stack 0- var >= 1 201

Lua Impl. Bytecode register 255switch fixed 4 38

Mozart Impl. Bytecode reg-mem ∞threaded var 4 - 24 97

Parrot Spec. Bytecode register ∞switch,threaded,JIT var >= 4 >1200

PHP Impl. Bytecode reg-mem ∞threaded fixed 76 136

Rubinius Impl. Bytecode stack 0 JIT var 4 -16 89

Ruby 1.8 Impl. AST stack 0switch - - 105

Ruby 1.9 Impl. Bytecode stack 2threaded var >= 32 77

Self Impl. Bytecode stack 0 JIT fixed 1 17

Squeak Impl. Bytecode stack 0switch, threaded var 1 or 2 71

TraceMonkey Impl. Bytecode stack 1threaded, JIT var >= 1 234

V8 Impl. AST - - JIT - - 38

Page 9: Intermediate Language Design of High-level Language VMs: Towards Comprehensive Concurrency Support

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Survey

Survey Design

Type Abstraction Model #Regs Execution Length in Byte #Ops

CLI Spec. Bytecode stack 0- var >= 1 217

CPython Impl. Bytecode stack 0switch var 1 or 3 102

Dalvik VM Impl. Bytecode register ∞threaded var >= 2 218

Dis VM Spec. Bytecode mem-mem 0 - var 1 - 33 158

Erlang Impl. Bytecode register 1024threaded, JIT fixed 4 148

JVM Spec. Bytecode stack 0- var >= 1 201

Lua Impl. Bytecode register 255switch fixed 4 38

Mozart Impl. Bytecode reg-mem ∞threaded var 4 - 24 97

Parrot Spec. Bytecode register ∞switch,threaded,JIT var >= 4 >1200

PHP Impl. Bytecode reg-mem ∞threaded fixed 76 136

Rubinius Impl. Bytecode stack 0 JIT var 4 -16 89

Ruby 1.8 Impl. AST stack 0switch - - 105

Ruby 1.9 Impl. Bytecode stack 2threaded var >= 32 77

Self Impl. Bytecode stack 0 JIT fixed 1 17

Squeak Impl. Bytecode stack 0switch, threaded var 1 or 2 71

TraceMonkey Impl. Bytecode stack 1threaded, JIT var >= 1 234

V8 Impl. AST - - JIT - - 38

Page 10: Intermediate Language Design of High-level Language VMs: Towards Comprehensive Concurrency Support

04/09/2023 10

Survey

Survey Design

Type Abstraction Model #Regs Execution Length in Byte #Ops

CLI Spec. Bytecode stack 0- var >= 1 217

CPython Impl. Bytecode stack 0switch var 1 or 3 102

Dalvik VM Impl. Bytecode register ∞threaded var >= 2 218

Dis VM Spec. Bytecode mem-mem 0- var 1 - 33 158

Erlang Impl. Bytecode register 1024threaded, JIT fixed 4 148

JVM Spec. Bytecode stack 0- var >= 1 201

Lua Impl. Bytecode register 255switch fixed 4 38

Mozart Impl. Bytecode reg-mem ∞threaded var 4 - 24 97

Parrot Spec. Bytecode register ∞switch,threaded,JIT var >= 4 >1200

PHP Impl. Bytecode reg-mem ∞threaded fixed 76 136

Rubinius Impl. Bytecode stack 0 JIT var 4 -16 89

Ruby 1.8 Impl. AST stack 0switch - - 105

Ruby 1.9 Impl. Bytecode stack 2threaded var >= 32 77

Self Impl. Bytecode stack 0 JIT fixed 1 17

Squeak Impl. Bytecode stack 0switch, threaded var 1 or 2 71

TraceMonkey Impl. Bytecode stack 1threaded, JIT var >= 1 234

V8 Impl. AST - - JIT - - 38

Page 11: Intermediate Language Design of High-level Language VMs: Towards Comprehensive Concurrency Support

04/09/2023 11

Survey

Survey Design

Type Abstraction Model #Regs Execution Length in Byte #Ops

CLI Spec. Bytecode stack 0- var >= 1 217

CPython Impl. Bytecode stack 0switch var 1 or 3 102

Dalvik VM Impl. Bytecode register ∞threaded var >= 2 218

Dis VM Spec. Bytecode mem-mem 0- var 1 - 33 158

Erlang Impl. Bytecode register 1024threaded, JIT fixed 4 148

JVM Spec. Bytecode stack 0- var >= 1 201

Lua Impl. Bytecode register 255switch fixed 4 38

Mozart Impl. Bytecode reg-mem ∞threaded var 4 - 24 97

Parrot Spec. Bytecode register ∞switch,threaded,JIT var >= 4 >1200

PHP Impl. Bytecode reg-mem ∞threaded fixed 76 136

Rubinius Impl. Bytecode stack 0 JIT var 4 -16 89

Ruby 1.8 Impl. AST stack 0switch - - 105

Ruby 1.9 Impl. Bytecode stack 2threaded var >= 32 77

Self Impl. Bytecode stack 0 JIT fixed 1 17

Squeak Impl. Bytecode stack 0switch, threaded var 1 or 2 71

TraceMonkey Impl. Bytecode stack 1threaded, JIT var >= 1 234

V8 Impl. AST - - JIT - - 38

Page 12: Intermediate Language Design of High-level Language VMs: Towards Comprehensive Concurrency Support

04/09/2023 12

Survey

Survey Design

Type Abstraction Model #Regs Execution Length in Byte #Ops

CLI Spec. Bytecode stack 0- var >= 1 217

CPython Impl. Bytecode stack 0switch var 1 or 3 102

Dalvik VM Impl. Bytecode register ∞threaded var >= 2 218

Dis VM Spec. Bytecode mem-mem 0- var 1 - 33 158

Erlang Impl. Bytecode register 1024threaded, JIT fixed 4 148

JVM Spec. Bytecode stack 0- var >= 1 201

Lua Impl. Bytecode register 255switch fixed 4 38

Mozart Impl. Bytecode reg-mem ∞threaded var 4 - 24 97

Parrot Spec. Bytecode register ∞switch,threaded,JIT var >= 4 >1200

PHP Impl. Bytecode reg-mem ∞threaded fixed 76 136

Rubinius Impl. Bytecode stack 0 JIT var 4 -16 89

Ruby 1.8 Impl. AST stack 0switch - - 105

Ruby 1.9 Impl. Bytecode stack 2threaded var >= 32 77

Self Impl. Bytecode stack 0 JIT fixed 1 17

Squeak Impl. Bytecode stack 0switch, threaded var 1 or 2 71

TraceMonkey Impl. Bytecode stack 1threaded, JIT var >= 1 234

V8 Impl. AST - - JIT - - 38

Page 13: Intermediate Language Design of High-level Language VMs: Towards Comprehensive Concurrency Support

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CONCURRENCY SUPPORTHow to support concurrency in an intermediate language?

IL Design For VMs, Stefan Marr, VMIL, Oct. 2009

Page 14: Intermediate Language Design of High-level Language VMs: Towards Comprehensive Concurrency Support

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Reminder: Motivation

• VMs support concurrency insufficiently!– Why? Because, we want multi-language VMs• Fast JITs• Great GCs

↳Add concurrency to intermediate language

IL Design For VMs, Stefan Marr, VMIL, Oct. 2009

Page 15: Intermediate Language Design of High-level Language VMs: Towards Comprehensive Concurrency Support

04/09/2023 15IL Design For VMs, Stefan Marr, VMIL, Oct. 2009

Why Concurrency in ILs?

Page 16: Intermediate Language Design of High-level Language VMs: Towards Comprehensive Concurrency Support

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Concurrency Support in the IL?

IL Design For VMs, Stefan Marr, VMIL, Oct. 2009

2.6

Dis VM 4th ed.

Ruby 1.8/1.9Rubinius

V8 svn

1.4 JVM spec.

OTPR12

6.0 svn

4.4

Dalvik VM 1.0

1.3

5.1

CLI/ECMA-355

Squeak 3.9TraceMonkey

Page 17: Intermediate Language Design of High-level Language VMs: Towards Comprehensive Concurrency Support

04/09/2023 17

Concurrency Support in the IL?

IL Design For VMs, Stefan Marr, VMIL, Oct. 2009

2.6

Dis VM 4th ed.

Ruby 1.8/1.9Rubinius

V8 svn

1.4 JVM spec.

OTPR12

6.0 svn

4.4

Dalvik VM 1.0

1.3

5.1

CLI/ECMA-355

Squeak 3.9TraceMonkey

only 6 out of 17

Page 18: Intermediate Language Design of High-level Language VMs: Towards Comprehensive Concurrency Support

04/09/2023 18

Survey Criteria - Concurrency

• Concurrency support– Concurrency model– Included instructions– Standard library (stdlib)

IL Design For VMs, Stefan Marr, VMIL, Oct. 2009

Page 19: Intermediate Language Design of High-level Language VMs: Towards Comprehensive Concurrency Support

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Model Threads/LocksIL MarginalStdLib Low-/high-

level

Common Language Infrastructure

• volatile. (prefix instruction)

– marks a subsequent pointer reference

• Synchronized methods• Memory model– Atomic read or write of certain aligned data

• Standard library– Memory barriers, atomic updates– Parallel loops, futures,…

Concurrency Support

Page 20: Intermediate Language Design of High-level Language VMs: Towards Comprehensive Concurrency Support

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Dis VM (spec. 4th ed.)

• Inspired by CommunicatingSequentialProcesses

– spawn – new thread– new* – new channel– recv, send – on given channel– alt, nbalt – send or receive

on ready channel• Memory model unspecified

Concurrency Support

Model CSPIL High-levelStdLib High-level

Page 21: Intermediate Language Design of High-level Language VMs: Towards Comprehensive Concurrency Support

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Erlang

• Actors model– send, wait, wait_timeout– remove_message– timeout

• Pure, functional language– No memory model specified– Only high-level constructs in stdlib.

Concurrency Support

Model ActorsIL High-levelStdLib High-level

Page 22: Intermediate Language Design of High-level Language VMs: Towards Comprehensive Concurrency Support

04/09/2023 22

Model Threads/LocksIL MarginalStdLib Low-/high-

level

Java Virtual Machine

• monitorenter/-exit– For synchronized blocks

• Synchronized methods• Memory model• Standard library– Low- and high-level constructs

• DalvikVM promises the same

Concurrency Support

Page 23: Intermediate Language Design of High-level Language VMs: Towards Comprehensive Concurrency Support

04/09/2023 23

Model Data-flowIL MarginalStdLib High-level

Mozart

• LOCKTHREAD– No unlock

• Implicit support– Data-flow variables, distribution

• Standard library– High-level constructs– Futures, stream channels,…

Concurrency Support

Page 24: Intermediate Language Design of High-level Language VMs: Towards Comprehensive Concurrency Support

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Conclusion

• Wide range of supported models– No notion of multiple models– Often limited to implicit semantics or guaranties– Often most functionality in standard library

IL Design For VMs, Stefan Marr, VMIL, Oct. 2009

Model Threads/Locks CSP Actors Data-flow

IL Marginal High-level High-level Marginal

StdLib Low/high-level High-level High-level High-level

Page 25: Intermediate Language Design of High-level Language VMs: Towards Comprehensive Concurrency Support

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Outlook

• Multi-language VMs have to– Enable language designer to invent new

constructs/concepts– Provide low- and high-level constructs• Low-level: Memory barriers, atomic updates, …• High-level: Tuplespaces, STM, Actors, …

• Open question: tradeoffs IL vs. stdlib.

IL Design For VMs, Stefan Marr, VMIL, Oct. 2009

Page 26: Intermediate Language Design of High-level Language VMs: Towards Comprehensive Concurrency Support

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Dis

cuss

ion

IL Design For VMs, Stefan Marr, VMIL, Oct. 2009