INTERFACINGICsFull_8085

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Topics

Interfacing chips

Programmable Communication Interface PCI (8251)

Programmable Interval Timer (8253)

Programmable Interrupt Controller (8259)

Programmable Keyboard Display Interface (8279)

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8251 USART


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Serial Vs Parallel Data Transfer

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8251 USART

The 8251 USART (Universal Synchronous Asynchronous

Receiver Transmitter) is capable of implementing either

an asynchronous or synchronous serial data

communication.

As a peripheral device of a microcomputer system, the

8251 receives parallel data from the CPU and transmits

serial data after conversion.

This device also receives serial data from the outside and

transmits parallel data to the CPU after conversion.

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8251 Block Diagram

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Pin Description

D0 - D7 - This is bidirectional data bus which receive control words

and transmits data from the CPU and sends status words and

received data to CPU.

RESET - A "High" on this input forces the 8251 into "reset status.

The min. reset width is six clock inputs during the operating statusof CLK.

CLK - CLK signal is used to generate internal device timing. CLK

signal is independent of RXC or TXC.

WR - This is the "active low" input terminal which receives a signal

for writing transmit data and control words from the CPU into the

8251.

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Pin Description

RD - This is the "active low" input terminal which receives a signal

for reading receive data and status words from the 8251.

C/D - This is an input terminal which receives a signal for selecting

data or command words and status words when the 8251 is

accessed by the CPU.

CS - This is the "active low" input terminal which selects the 8251

at low level when the CPU accesses.

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Pin Description

TXD - This is an output terminal for transmitting data from which

serial-converted data is sent out.

TXRDY - This is an output terminal which indicates that the 8251 is

ready to accept a transmitted data character.

TXEMPTY - This is an output terminal which indicates that the 8251

has transmitted all the characters and had no data character.

TXC - This is a clock input signal (Active Low) which determines the

transfer speed of transmitted data.

In "synchronous mode," the baud rate will be the same as the frequency of

TXC. In "asynchronous mode", it is possible to select the baud rate factor by

mode instruction. It can be 1, 1/16 or 1/64 the TXC.

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Pin Description

RXD - This is a terminal which receives serial data.

RXRDY - This is a terminal which indicates that the 8251 contains a

character that is ready to READ. If the CPU reads a data character, RXRDY will be reset by the leading edge of

RD signal. Unless the CPU reads a data character before the next one isreceived completely, the preceding data will be lost. In such a case, an

overrun error flag status word will be set.

RXC - This is a clock input signal which determines the transfer

speed of received data. In "synchronous mode," the baud rate is the same as the frequency of RXC. In

"asynchronous mode," it is possible to select the baud rate factor by mode

instruction. It can be 1, 1/16, 1/64 the RXC.

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Pin Description

SYNDET/BD - This is a terminal whose function changes according

to mode.

In internalsynchronous mode,this terminal is at high level, if sync

characters are received and synchronized.

If a status word is read, the terminal will be reset.

In externalsynchronous mode,this is an input terminal. A "High" on

this input forces the 8251 to start receiving data characters.

In asynchronousmode, this is an output terminal which generates

"high level output upon the detection of a "break" character if

receiver data contains a "low-level" space between the stop bits of

two continuous characters.

The terminal will be reset, if RXD is at high level. After Reset is active,

the terminal will be output at low level.11


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Pin Description

DSR - This is an input port for MODEM interface. The input status of

the terminal can be recognized by the CPU reading status words.

DTR - This is an output port for MODEM interface. It is possible to

set the status of DTR by a command.

CTS - This is an input terminal for MODEM interface which is used

for controlling a transmit circuit. The terminal controls data transmission if the device is set in "TX Enable"

status by a command. Data is transmittable if the terminal is at low level.

RTS - This is an output port for MODEM interface. It is possible to

set the status RTS by a command.

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8251 Control Words

There are two types of control word.

1. Mode instruction (setting of function)

2. Command (setting of operation)

Apart from the control words, a Status Word is

present in 8251 to see the internal status.

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8253 Pin Diagram

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8253 Block Diagram

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Pin Description

Clock: This is the clock input for the counter. The counter

is 16 bits. The maximum clock frequency is 1 / 380 nanoseconds or

2.6 megahertz. The minimum clock frequency is DC or

static operation.

Out: This single output line is the signal that is the final

programmed output of the device. Actual operation of the out line depends on how the

device has been programmed.

Gate: This input can act as a gate for the clock input

line, or it can act as a start pulse, depending on the

programmed mode of the counter.

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Counter Features

Each counter is identical, and each consists of a 16-bit,

pre-settable, downcounter.

Each is fully independent and can be easily read by the

CPU.

When the counter is read, the data within the counter

will not be disturbed.

This allows the system or your own program to monitor

the counter's value at any time, without disrupting the

overall function of the 8253.

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Counter Selection

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Control Word Register

This internal register is used to write information to, prior

to using the device.

This register is addressed when A0 and A1 inputs are

logical 1's.

The data in the register controls the operation mode and

the selection of either binary or BCD counting format.

The register can only be written to.

You can't read information from the register.

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Introduction

PPI Programmable Peripheral Interface

It is an I/O port chip used for interfacing I/O

devices with microprocessor

Very commonly used peripheral chip

Knowledge of 8255 essential for students in the

Microprocessors lab for Interfacing experiments

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8255 Ports

8255 PPI has three 8-bit ports.

Port A (PA)

Port B (PB)

Port C (PC)

Port C composed of two independent 4-bit ports: PC7-4

(PC Upper)and PC3-0 (PC Lower)

Port A, Port B, Port C and Control port will have the

addresses as 7CH, 7DH, 7EH, and 7FH respectively.

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Block Diagram

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Pin Description

PA7-PA0 : These are eight port A lines that acts as either latched

output or buffered input lines depending upon thecontrol word loaded into the control word register.

PC7-PC4 : Upper nibble of port C lines. They may act as either

output latches or input buffers lines.This port also can be used for generation of handshake lines in

mode 1 or mode 2.

PC3-PC0 : These are the lower port C lines, other details are the

same as PC7-PC4 lines.

PB0-PB7 : These are the eight port B lines which are used as

latched output lines or buffered input lines in the same

way as port A.

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Pin Description RD : This is the input line driven by the microprocessor and

should be low to indicate read operation to 8255.

WR : This is an input line driven by the microprocessor. A

low on this line indicates write operation.

CS : This is a chip select line. If this line goes low, it enablesthe 8255 to respond to RD and WR signals, otherwise

RD and WR signal are neglected.

A1-A0 : These are the address input lines and are driven by the

microprocessor.

RESET : The 8255 is placed into its reset state if this input line is

a logical 1. All peripheral ports are set to the input

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8255 Operations

The lines A1-A0 with RD, WR and CS form the following

operations for 8255.

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Programming 8255

8255 has three operation modes: mode 0, mode 1, and

mode 2

Mode 0 - Simple Input or Output mode

Mode 1 - Input or Output with Handshake mode

Mode 2 - Bidirectional Data Transfer mode

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8255 Modes Summary

Port A can work in Mode 0, Mode 1, or Mode 2

Port B can work in Mode 0, or Mode 1

Port C can work in Mode 0 only, if at all

Port A, Port B and Port C can work in Mode 0

Port A and Port B can work in Mode 1

Only Port A can work in Mode 2

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8255 Control Words

There are 2 control words in 8255.

1. Mode Definition (MD) Control word and

2. Bit Set / Reset (BSR) Control Word

MD control word configures the ports of 8255 as

input or output in Mode 0, 1, or 2.

PCBSR control word is used to set to 1 or reset to

0 any one selected bit of Port C


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Features of 8279

Scans and encodes up to a 64-key keyboard.

Controls up to a 16-digit numerical display.

Keyboard has a built-in FIFO 8 character buffer to

store the keyboard Entries and an Interrupt signal

with each Entry.

The display is controlled from an internal 16x8RAM that stores the coded display information.

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8279 Pin

Diagram

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