Intelligent Solid-State Current Limiter to Prevent Sympathetic ...

Design and Model: Intelligent Solid-State Current Limiter to Prevent

Sympathetic Tripping Problem on Power and Energy Applications

by

Boker Agili, MS

A Dissertation

In

Electrical and Computer Engineering

Submitted to the Graduate Faculty

of Texas Tech University in

Partial Fulfillment of

the Requirements for

The Degree of

Doctor of Philosophy

Approved

Dr. Stephen Bayne

Co-Chair of Committee

Dr. Michael Giesselmann

Co-Chair of Committee

Dr. Miao He

Dr. Brian Nutter

Mark Sheridan, Ph.D.

Dean of the Graduate School

August , 2019

Texas Tech University, Boker Agili, May 2019

ii

Copyright 2019, Boker Agili


ii

ACKNOWLEDGMENTS

This Ph.D. work is the result of invaluable guidance and assistance provided to me

by a team of professionals at Texas Tech University and the Saudi Electricity Company. I

wish to thank engineers Zakari Dagariri, Jalal Ghawi, Ahmed Najmi, Yahiya Derbishi, Alla

Al-Deen and Ali Dagariri of the Saudi Electricity company for providing me network

information and guidance. I would also like to thank all of the technicians who helped me

handle instruments during my site tests.

I extend my deepest gratitude to my advisors, Dr. Miao He, Dr. Stephen Bayne, Dr.

Brain Nutter and Dr. Michael Geisselmann. I will never forget the support and guidance of

my MS degree committee at Cairo University for their efforts to start this research topic.

Special thanks to my wife and kids who helped me to finish my PhD

dissertation/degree that was a result of 10 years of research experience. Finally, I want to

thank all my family for continuous support including my parents , my brothers and sisters,

Anod , Yara , Layla, Mohammad, Jori , Almas , America , Abdurrahman, Rose , Malak

and new babies.


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TABLE OF CONTENTS

ACKNOWLEDGMENTS ................................................................................................ ii

TABLE OF CONTENTS ................................................................................................ iii

ABSTRACT ....................................................................................................................... v

LIST OF TABLES ........................................................................................................... vi

LIST OF FIGURES ........................................................................................................ vii

INTRODUCTION............................................................................................................. 1

Other Conventions ........................................................................................................ 3

Problem Description ..................................................................................................... 3

Literature Review.......................................................................................................... 6

Solutions Previously Recommended .......................................................................... 11

Methodology ............................................................................................................... 14

SYMPATHETIC TRIPPING CASE STUDY .............................................................. 16

An Instance of the Sympathetic Tripping Problem ..................................................... 19

Single-Phase Air Conditioner Behaviors .................................................................... 23

Equipment and Procedure Needed ............................................................................ 24

Test Plan .................................................................................................................... 24

PROBLEM ANALYSIS ................................................................................................. 29

Voltage Dip Analysis Power World ........................................................................... 30

Voltage Dip Analysis On PSCAD .............................................................................. 40

Case 1: Observation of the System ............................................................................ 41

Case 2: Using a Resistively Grounded System on PS-CAD ..................................... 43

Case 3: Replacing the SVCs with Synchronous Condensers .................................... 45

ISSFCL DESIGN AND SIMULATION ....................................................................... 50

Background ................................................................................................................. 51

Review of Available FCL in the Market..................................................................... 52

The Single-Phase - ISSFCL ........................................................................................ 55

Intelligent Solid-State Fault Current Limiter Design .................................................. 56

Substation Model 33 kV ............................................................................................ 57

How the ISSFCL Works ............................................................................................. 64

Uses of the ISSFCL ................................................................................................... 65

ISSFCL Design ........................................................................................................... 67

ASM Code (Brain)..................................................................................................... 67


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Limiting Device Elements Design ............................................................................. 68

Fault Device ........................................................................................................... 72

HYPOTHETICAL SYSTEM TEST ............................................................................. 74

Simple Single-Phase Test System ............................................................................... 74

Three-Phase System Test ............................................................................................ 78

CONCLUSION AND CONTRIBUTION ..................................................................... 96

Contributions............................................................................................................... 96

Conclusion .................................................................................................................. 97

Future Work ................................................................................................................ 99

WORKS CITED............................................................................................................ 101

BIBLIOGRAPHY ......................................................................................................... 103


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ABSTRACT

This paper analyzes the Sympathetic Tripping Problem and proposes and tests a

solution to it. To do so, it considers a case study, develops a model to explain this case

study, and uses this model to test transient stability improvement with limiting fault current

using new solid state fault current limiter. The results reveal that transferring power near

the system voltage stability limit is a major cause of the Sympathetic Tripping Problem.

Limiting fault current and using synchronous condensers for reactive power support were

shown to solve the Sympathetic Tripping Problem.


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LIST OF TABLES

1.1 Stalling Conditions for Different Dip Depths and Durations [11] ............................ 8

2.1 The Jizan System Generation Data ......................................................................... 17

2.2 Jizan System Transmission Line Data .................................................................... 18

2.3 Jizan System Load Data .......................................................................................... 18

2.4 Fault Current in Jizan Power System. ..................................................................... 19

2.5 List of Interrupted Feeders ...................................................................................... 22

2.6 Actual Values for Single A/C when Compressor On ............................................. 26

2.7 Actual Values for Single A/C when Compressor Off ............................................. 26

2.8 Actual Values for Current Harmonics of Single A/C when Compressor On ......... 27

2.9 Actual Values for Current Harmonics of Single A/C when Compressor off ......... 27

3.1 Voltage Magnitude and Angle at Each Bus ............................................................ 32

3.2 Single Line to Ground Fault at Bus 5 ..................................................................... 33

3.3 Three Line to Ground Fault at Bus 5 ...................................................................... 33

3.5 Voltage Dip % and Recovery Time for Case 1 ....................................................... 43



4.1 Overview of Existing Types of Fault Current Limiters .......................................... 54

5.1 Rated Values of System Voltages and Feeders currents ......................................... 80

5.2 Summary of Cases Motor 1 versus Motor 1 ........................................................... 95


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LIST OF FIGURES

2.1 Part of Jizan Power System Layout ....................................................................... 17

2.2 Current profile for TR4 at Sammtah S/S during the fault ...................................... 20

2.3 Voltage profile for bus coupler at Sammtah S/S during the fault .......................... 20

2.4 Incoming transmission Line 2 current profile during fault .................................... 20

2.5 Current profile for Capacitors 2 and 3 at Sammtah S/S......................................... 21

2.6 Voltage and current curves for A/C when compressor on ..................................... 26

2.7 Voltage and current curves for A/C when compressor off .................................... 27

3.1 Simplified power system (JPS) .............................................................................. 29

3.2 Load flow and voltage drop results ........................................................................ 31

3.3 Four main generators rotor angle and terminal voltage (unstable) ........................ 35

3.4 System 8 loaded buses voltage and current (unstable) .......................................... 36

3.5 Four main generators rotor angle and terminal voltage (stable) ............................ 38

3.6 System 8 loaded buses voltage and current (stable) .............................................. 39

3.7 Simplified layout of the Jizan power system ......................................................... 42

3.8 Voltage profile JCPS, Sammtah, and Al-Ahead S/S (Case 1) ............................... 43

3.9 All sources are resistively grounded (Case 2)....................................................... 44

3.10 Voltage profile JCPS, Sammtah, and Al-Ahead S/S (Case 2) .............................. 45

3.11 Sources are resistive grounded/the SVCs replaced with SCs ............................... 46

3.12 Voltage profile for the JCPS, Sammtah, and Al-ahead S/S (Case 3) ................... 47

3.13 Fault current profile at Sammtah Substation ........................................................ 49

4.1 Simplified multi-level limiting current device ...................................................... 51

4.2 Overview of ISSFCL Device ................................................................................ 55

4.4 Substation Resistance Values ............................................................................... 57

4.5 33 kV substation hypothetical model .................................................................... 57

4.6 Step down Transformer Model ............................................................................. 58

4.7 Load Model – Induction Motor............................................................................. 58

4.8 Fault model on LTspice ........................................................................................ 59

4.9 Multi-level limiting device model (ISSFCL) ........................................................ 60

4.10 Fault current detector circuit model ...................................................................... 60

4.11 Control circuit diagram model for ISSFCL .......................................................... 61

4.12 Developed ode for ISSFCL control ...................................................................... 62

4.13 The RMS voltage detector on LTspice ................................................................. 63


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4.14 Three single limiters in ISSFCL ........................................................................... 64

4.15 ISSFCL connected to Source neutral point ........................................................... 66

4.16 ASM code test setup in lab ................................................................................... 67

4.17 Three level voltage dips and LED indicators ........................................................ 68

4.18 Switching on time voltage profile ......................................................................... 68

4.19 Schmatic for RMS detector ................................................................................... 69

4.20 Schmatic for control devices ................................................................................. 71

4.21 Schmatic for limiting devices on LT spice ........................................................... 72

4.22 Fault model used on LT spice ............................................................................... 73

5.1 Simplified test system upstream fault ................................................................... 75

5.2 Feeder, bus, and switches voltage (Case 1) .......................................................... 75

5.3 Simplified test system mid-fault ........................................................................... 76

5.4 Feeder, bus, and switches voltage (Case 2) .......................................................... 76

5.5 Simplified test system downstream fault .............................................................. 77

5.6 Feeder, Bus, and Switches Voltage (Case 3) ........................................................ 77

5.7 Hypothetical Test System without ISSFCL .......................................................... 79

5.8 Hypothetical Test System with ISSFCL ............................................................... 79

5.8 Source Voltage and Current without ISSFCL (Case 1) ........................................ 81

5.9 Source Voltage and Current with ISSFCL (Case 2) ............................................. 81

5.10 Feeder 1 and Feeder 2 currents without ISSFCL (Case 1) ................................... 82

5.11 Feeder 1 and Feeder 2 currents with ISSFCL (Case 2) ........................................ 82

5.12 Motor 1 and Motor 2 currents without ISSFCL (Case 1) ..................................... 83

5.13 Motor 1 and Motor 2 currents with ISSFCL (Case 2) .......................................... 83

5.14 Motor 1 and Motor 2 speed up and torque down (Case 1) ................................... 85


5.16 Source voltage and current without ISSFCL (Case 3) .......................................... 86

5.17 Source Voltage and Current with ISSFCL (Case 4) ............................................. 87




5.21 Motor 1 and Motor 2 Currents without ISSFCL (Case 4) .................................... 89



5.24 Source voltage and current without ISSFCL (Case 5) .......................................... 91


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5.25 Source voltage and current with ISSFCL (Case 6) ............................................... 91




5.29 Motor 1 and Motor 2 Currents with ISSFCL (Case 6) ......................................... 93


5.31 Motor 1 and Motor 2 speed up and Torque Down (Case 6) ................................. 94


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CHAPTER I

INTRODUCTION

To meet the ever-increasing consumer demand for energy, utility companies must

continue to grow. As they expand, companies sometimes minimize their required

investments by connecting to and exchanging power supplies with nearby systems.

Growing power systems in this way has advantages and disadvantages. Advantages include

more robust systems, less system impedance, and increased customer satisfaction.

Disadvantages include huge required investments, complex protection systems, and

increases in fault current, especially in looping systems. The main concern in this paper is

the increases in fault current that result from reductions in system impedance and the ability

of this current to drive systems to the Sympathetic Tripping (STP) Problem. The

Sympathetic Tripping Problem is a type of voltage-stability-limit violation caused by the

high, long-duration fault currents that result from the nonlinear loads of certain systems.

The Sympathetic Tripping Problem occurs when non-fault distribution feeders trip because

of fault on an adjacent feeder. Our objectives in this paper are to analyze the Sympathetic

Tripping Problem and to develop effective solutions for it. These solutions could be applied

to existing systems affected by the Sympathetic Tripping Problem, and they could be

incorporated into the designs of future systems.

We begin by providing an overview of the Sympathetic Tripping Problem,

examining its root causes and a number of solutions proposed from the perspectives of

power system protection and power system planning. This analysis approaches the problem

from the perspective of power system planning. We first analyze a case study, identifying

single-phase window air conditioners as the root cause of an instance of sympathetic


2

tripping on the Jizan power system. We then use PS-Cad to model a generic power system

with the same issues and to evaluate two potential solutions. The results reveal that these

solutions are cost-effective and will not expose systems to additional stresses during

disturbances. We conclude by discussing additional work that could be done to solve the

Sympathetic Tripping Problem.

Utility companies must grow constantly to meet the ever-increasing consumer

demand for energy. To avoid construction costs and exchange power supplies with minimal

investment, companies sometimes connect with nearby systems. This type of power system

growth has advantages and disadvantages. Its advantages include stronger systems, less

system impedance, and increased customer satisfaction. Its disadvantages, which should

be reviewed during planning, include huge required investments, complex protection

systems, and increases in fault current, especially in looping systems. Our concerns in this

paper are the increase in fault current that occurs when system impedance is reduced and

the capacity of this current to drive systems to the “sympathetic tripping problem.” The

sympathetic tripping problem is a type of voltage stability limit violation caused by the

high, long-duration fault current that results from the nonlinear loads of certain systems.

The sympathetic tripping problem occurs when a power system’s non-fault distribution

feeders trip because of the fault on an adjacent feeder.

Our objectives in the paper are to study, review, and analyze the sympathetic

tripping problem and to develop an efficient solution for it. The solution we propose could

be applied to existing systems affected by STP and could be incorporated into the designs

of future systems. Load type is an important focus of studies into power system stability,


3

and this study focuses on single-phase window air conditioners and their impact on system

voltage and system voltage stability.

While numerous studies have considered the sympathetic tripping problem from

the perspective of power systems protection, this study considers it from the perspective of

power systems planning. It examines the problem holistically, describing its root causes

and examining solutions proposed from both the power systems protection and the power

systems planning perspectives. First, it reviews previous studies into the sympathetic

tripping problem. Next, it analyzes a case study to identify the power system components

responsible for the sympathetic tripping problem and uses PS-Cad to generate a model of

a universal power system with these components. Finally, it uses this model to test two

proposed solutions to the sympathetic tripping problem.

Other Conventions

Delay Voltage Recovery is another convention for sympathetic tripping problem

which is a voltage drop of transmission line voltage below 90% following fault and delayed

to be back to its nominal values after clearing the fault due to stalling of single-phase air

conditioners in warm climate regions such as the Middle East and southern California.

Problem Description

In many warm-dry climate areas all over the world, single-phase air conditioners

also called window type air conditioners are used in residences in order to regulate the

room temperature within the desired limits. In major installations such as hospitals, offices

etc. the three-phase air conditioner are deployed. Those kinds of load have specific load

style and requirements (constant power). For example, the input voltage and current should


4

be within the designed value hence the electrical input power should match the mechanical

load at all the times for satisfactory performance.

Any power system is exposed to system disturbances that causes significant change

of voltage and current level at the input terminals of air conditioners. As a result of such

variations in voltage and current level, air conditioners might be forced to operate at stalling

mode instead of steady state operating mode. Stalling mode of air conditioners (A/Cs) can

be defined as a mismatch of operating condition between the electromagnetic torque fed to

the electric motor and the load torque of air conditioner motor. Moreover, any changes in

temperature level inside the room, i.e. temperature rise or decline, cause the motor

(compressor) to run on or off, which creates a considerable change in voltage and current

level at input terminal of (A/Cs). Houses in hot areas usually utilize more than one air

conditioner to provide required cooling in the home and these (A/Cs) units would draw

larger current from the network disturbances events which will cause a drop in the voltage

at the coupling point at the energy meter of that house. Every distribution feeder at

substation serves many houses that utilize (A/Cs) and these (A/Cs) would draw larger

current during network disturbances events ultimately contributing for increase of current

in distribution feeder to which the A/Cs form major part of the load.

The feeder current when it surpasses the safe loading limit dictated by the setting

of the over current protection element of the assigned feeder circuit breaker, a signal will

trigger the circuit breaker to switch off. Such trappings are encountered under two

conditions as stated under:

Tripping due to delayed voltage recovery caused by a fault in transmission and

distribution network


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Tripping due to COLD RUSH (energizing the feeder after a long outage duration)

Both of these cause a voltage dip at the coupling point where distribution feeders are

connected. In a weak power system where short circuit ratio less than 20, the voltage dip

at medium voltage bus may extend to affect voltage level of the entire MV network. Such

kind of load behavior that affects the system performance and system stability is called

Delayed Voltage Recovery (DVR) event, or more popularly today, a Fault Induced

Delayed Voltage Recovery (FIDVR). FIDVR is the phenomenon whereby system voltage

remains at significantly reduced levels for several seconds following transmission or

distribution fault clearance.

Whenever a power system clears a fault in Transmission and distribution network

DVR usually occurs the duration of which depending upon the penetration and loading of

room Air conditioners connected in the network The source generation delivers the

additional reactive power (MVARs) required to boost the voltage to reaccelerate the

“robust” motors; the tripping of the stalled motor by thermal protection eventually returns

the system to normal. An additional reactive power is also needed to compensate the

reactive power loss when shunt capacitors are subjected to drop in voltage. The high system

impedance does not enable adequate reactive power to be transmitted to the load.

The factors that are mainly responsible for the voltage recovery problem are density

of air conditioners which experiences a voltage dip during a fault and the reduced load

impedance under stalled motor conditions. Equation 2 shows the air conditioner impedance

characteristics and motor slip:

𝑍𝐿𝑜𝑎𝑑 =𝑅𝑀𝑒𝑡𝑒𝑟

𝑆𝑙𝑖𝑝 + 𝐽𝑋𝑀𝑒𝑡𝑒𝑟 eq 1 [2]

Where slip = 0 at synchronous speed.


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The root cause is the voltage dips which could cause the light inertia induction motors to

lose their speed rapidly. The voltage dip is defined as a drop-in system voltage between

10% to 90% of nominal voltage and stays for around one minute long. There are three

classifications for voltage dip according to their time period. The first is instantaneous dip

where the duration comes between 0.5 Cycle to 30 cycles. The second voltage dip is called

momentary and is longer than Instantaneous where voltage drop stays between 30 cycles

and 3 seconds. The last is temporary voltage dip, which stays in the system during

disturbances for more than 3 seconds to one minute long. The duration of voltage dip in a

system depends on many factors and the most common factor is the speed of protection

system and the operating mechanism that isolate the fault [1].

Literature Review

The Sympathetic Tripping Problem (also known as the “Induced Fault Delay

Voltage Recovery Problem”) occurs when non-faulty distribution feeders fail because of

the fault on an adjacent feeder or, occasionally, because of the fault on a different

substation. It can be explained briefly as follows. Voltage dips longer than 100 ms cause

certain devices to stall. When these devices stall, they contribute with fault current that can

cause the system undergoes longer voltage dip. While these devices’ thermal protection

elements may eventually disconnect them from the system, until they are disconnected,

their continued demands for current slow the voltage recovery of the system [3].

Like other power-system problems, the Sympathetic Tripping Problem can be

viewed from two different perspectives. Some consider it a problem for system protection,

arguing that protective relays (i.e. overcurrent relays) should have sensitivities high enough

to distinguish faulty feeders from non-faulty feeders. Others consider it a problem for


7

system planning, arguing that it should be addressed during design and construction and

system limitations.

Voltage dips are dips in voltage of a system’s nominal voltage below 90% for one

second as per IEE standard, and they can occur at any point along the system. Studies have

recorded and analyzed voltage dips that varied in magnitude from 50% to 90% and in

duration from 5 to 60 cycles [11]. Different kinds of household loads are affected by voltage

dips, but not necessarily to the same degree. There are two types of loads: linear loads

include lamps, fans, and most fixed-impedance loads, and nonlinear loads include

electronics, induction motors, and most non-fixed-impedance loads. While some loads are

not sensitive to voltage dips, examples of loads that include air conditioners, lighting loads,

DVD players, and televisions.

The magnitude and duration of the voltage dip determine whether a given device

such as single-phase air conditioners will stall. For example, voltage dips below 65% and

longer than 10 cycles have a high probability to cause air conditioners to stall as shown in

table [1]. The stalling of such devices can expose the overcurrent protection relays of non-

faulty feeders to currents up to five times their normal loads, eventually causing these

relays to trip [1]. For this reason, fault-current-reduction techniques must be used to ensure

that the system voltage does not dip below 80% for longer than 8 cycles [1].


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Table 1.1 Stalling Conditions for Different Dip Depths and Durations [11]

60% 50% 40% 30% 20% 10%

5 cycles N N N N N N

10 cycles N N N N N N

12 cycles Y N N N N N

15 cycles Y Y N N N N



40 cycles Y Y Y N N N





150 cycles Y Y Y N

N: Non-stalling condition Y: Stalling condition

Sympathetic Tripping problem is one special case of power system transient voltage

stability. The problem as will be illustrated is a stalling of single-phase air conditioners

during system disturbances where voltage drop below the voltage stability limit at specific

bus. The power system would be driven into unstable zone during fault if at least one bus

become unstable due to voltage dip less than limit and longer than critical time to clear

faults [1]. The sympathetic tripping problem occurs when non-faulty distribution feeders

fail because of the fault on an adjacent feeder or, occasionally, because of the fault on a

different substation. In 2003, the Jizan power system in southern Saudi Arabia experienced

a major blackout from the sympathetic tripping problem [2]. The problem occurred when

a breaker failure relay failed to work properly, leading to breaker breakdown. The backup

breaker eventually cleared the fault, though only after a delay designed to allow fault to


9

clear. In this instance, the sympathetic tripping problem was caused by high fault levels

resulting from the rapid growth of the power system, voltage dips in the system, and the

use of single-phase air conditioners. Raising the overcurrent limits and increasing the delay

settings of non-faulty feeders exposes systems to additional stress during fault conditions,

potentially degrading other components in the system. Some innovative solutions attempt

to use smart-grid features (such as fast communication techniques) to allow changes to the

tripping-relay settings of non-faulty feeders during disturbances, but these solutions expose

systems to under-voltage and high-current stresses and limit their ability to support all

reactive power needs during disturbances. In this study, we propose a cost-effective

solution that will not expose systems to additional stresses during disturbances [2].

General power systems have three components: generation, transmission, and

distribution. Though the previous section discusses the sympathetic tripping problem from

the perspective of distribution, some studies consider the problem from the perspective of

transmission. Such studies refer to the sympathetic tripping problem as the “delay voltage

recovery problem.” Though the sympathetic tripping problem will be analyzed in detail in

the Analysis section, it can be described briefly as follows. Voltage dips longer than 100

ms cause single-phase air conditioners to stall. Depending on the fault level caused by the

stalled air conditioners and the impedance in the system, the system voltage dips for a

period and begins to recover after the fault is cleared by the protection system. The stalled

ACs slow the recovery of system voltage, but their thermal protection elements eventually

disconnect them from the system. How quickly these elements disconnect the stalled ACs

depends on the magnitude of the voltage dip at a different point in the system. This


10

asynchronous disconnection causes the delay voltage to recover to 90% of nominal voltage

[3].

Some power systems have adopted the CBEMA standard curve to avoid the

enormous impact of voltage dips on sensitive loads, such as air conditioners and power

electronics. Researchers are working on CBEMA standard curves for loads that have stalled

and switched off because of voltage dips. The CBEMA standard curves were developed in

the 1970s by the Computer Business Equipment Manufacturers Association and are used

as guidelines for the design and construction of electronics devices. "The CBEMA standard

curve was adapted from IEEE Standard 446 (Recommended Practice for Emergency and

Standby Power Systems for Industrial and Commercial Applications - Orange Book),

which is typically used in the analysis of power quality monitoring result” [4].

Various kinds of household loads are affected by voltage dips, albeit not to the same

degree. “Voltage dips” are dips in voltage below 90% of a system’s nominal voltage. They

can occur at any point along the system. There are two types type of loads: linear loads,

including lamps, fans, and most fixed-impedance loads; and nonlinear loads including

electronics, induction motors, and most non-fixed-impedance loads. Some loads are

sensitive to voltage dips, while others are not. Air conditioners, lighting loads, DVD

players, and televisions are examples of sensitive equipment. Studies into voltage dips have

recorded and analyzed voltage dips of different magnitudes and durations. The voltage dips

tested have varied from 90% to 50% with steps of 10%, and the dip durations tested have

varied from 5 to 60 cycles with a step of 10 cycles [7].

This paper is primarily concerned with devices whose capacities are close to that

of the type of window air conditioner that caused the blackout in the Jizan Power system.


11

The magnitude and duration of a voltage dip determines whether an air conditioner will

stall. Given this fact, this study concludes that voltage dips below 65% that last longer than

10 cycles cause air conditioners to stall. This exposes the overcurrent protection relays of

non-faulty feeders to currents up to five-times their normal loads, eventually causing these

relays to trip [5]. It is worth mentioning that high penetration of AC in weak power systems

causes transient voltage stability issues. In estimating voltage stability limits, therefore,

load voltage limits must be considered. AC devices tend to stall if voltage dips to less than

less than 65% for more than 80MS. Magnitude reactive power support can help, but it

should be fast enough to react before AC devices stall [2].

Previously Recommended Solutions

Like other power system problems, the sympathetic tripping problem is viewed

from two debated perspectives. Some power system experts consider it a system protection

problem, claiming that protective relays (i.e. overcurrent relays) should have sensitivities

high enough to distinguish faulty feeders from non-faulty feeders. Other power system

experts consider it a system planning problem, claiming that it should be addressed during

design and construction. Since the sympathetic tripping problem causes healthy feeders to

trip during a fault at the same bus (or even at a different bus), many solutions have been

proposed to address it. These solutions fail to contain the problem, however, allowing

sympathetic tripping in the worst cases. Several of these solutions are described below.

One proposed solution is prevention of the sympathetic tripping problem on power

systems and fault level management: to prevent healthy feeders from tripping, fault current

reduction techniques should be employed to ensure that voltage dips are not below 65%

and do not last more than 8 cycles [2]. Jeff, Terrence, and Andres proposed in their paper,


12

“Sympathetic Tripping Problem Analysis and Solutions,” a relay-based solution to the

sympathetic tripping problem. Their proposed solution was that, during a fault on a

distribution network, an analysis for fault current should be conducted to determine

whether a third harmonic is available to trip the faulty feeder for decision-making in regard

to trip or not to trip. The disadvantage of this proposed solution is time needed for

computing and decision-making might exceed the critical fault clearing time depending on

individual system [8].

Another proposed solution is to increase the overcurrent protection setting of loaded

feeders to prevent them from tripping in the absence of faults. This is a protection-based

solution, and it might generate voltage instability in the system when fault is cleared in

longer time the critical fault clearing time.

Others’ recommendation is reducing the time settings of overcurrent protection

relays. This solution is superior to the last, though it was an issue of relay coordination

problem between distribution feeder's protection and overcurrent protection of substation

transformers and sub-transmission line protection and time setting. For fast and high fault,

current both overcurrent protection could trip as instantaneous overcurrent protection

which is against relay selectivity and more consumers are expected to suffer [2].

The Saudi Electricity Company has installed static VAR compensators (SVCs) on

its network to minimize delays in voltage recovery following faults. These SVCs could trip

during a severe disturbance, however, making the situation worse [6]. The GOOSE

messaging with the IEC61850 (Sympathetic Tripping Protection Scenario - IEC 61850)

has been proposed to avoid the sympathetic tripping problem. Such messaging could

change the LN-PVOC operating curve during faults to ensure system stability [7].


13

Solutions to the sympathetic tripping problem proposed from the protection

perspective include conducting fault current analysis, increasing overcurrent settings,

reducing the time settings for relays to trip, reducing system impedance, and using static

VARs for reactive power compensation. The Jizan power system has employed these

techniques, but they have merely hidden the problem. Other solutions are too costly to

implement. For example, one way to reduce system impedance is to build additional

transmission and distribution lines, reducing the load on a given line and eventually

reducing overall system impedance. Doing so would cost millions of dollars, but this

money would be wasted since the problem would still exist. For example, the system used

used in the present study tried load bifurcation and construction of a new distribution feeder

to reduce the feeder loads and the sympathetic tripping/fault induced delay voltage

recovery still existed.

Several solutions to the Sympathetic Tripping Problem have been proposed, but

they each fail to prevent sympathetic tripping in the worst cases. Several of these solutions

are described below.

1) Conducting fault-current analyses. In “Sympathetic Tripping Problem Analysis

and Solutions,” Jeff, Terrence, and Andres propose that during fault conditions,

network analyses for fault current should be conducted to determine whether a third

harmonic is available to trip the faulty feeder [2].

2) Increasing overcurrent limits. One solution from the perspective of system

protection is to increase the overcurrent limits of loaded feeders to prevent them

from tripping in the absence of faults. This solution could generate voltage

instability in the system when the fault is cleared in a longer time, however, and it

could expose system components to additional stresses during fault conditions [2].

3) Increasing delay settings. Another solution from the perspective of system

protection is to increase the delay settings of loaded feeders to X. Although this

solution is superior to increasing overcurrent limits, it could also expose system

components to additional stresses during fault conditions. Moreover, it was an issue

of relay coordination problem between distribution feeder's protection and


14

overcurrent protection of substation transformers and sub-transmission line

protection and time setting. For fast and high fault, current both overcurrent

protection could trip as instantaneous overcurrent protection which is against relay

selectivity and more consumers are expected to suffer [2].

4) Reducing system impedance. Another solution is to reduce system impedance,

including by building additional transmission and distribution lines to reduce the

load on a given line. Doing so could cost millions, however, and the Sympathetic

Tripping Problem could still occur [2].

5) Installing VARs. Another solution is to install static VAR compensators (SVCs)

on loaded buses to speed the voltage recovery after faults. These SVCs could trip

during a severe disturbance, however, making the situation worse [6].

6) Utilizing smart-grid features, including rapid communication techniques.

Several innovative solutions permit changes to the settings of the tripping relays of

non-faulty feeders during disturbances. For example, GOOSE messaging via the

IEC61850 could be used to change the LN-PVOC operating curve during faults to

ensure system stability. Such solutions expose systems to under-voltage and high-

current stresses, however, and limit their ability to supply reactive power during

disturbances [7].

7) Some power systems have adopted the CBEMA standard curve to avoid the

enormous impact of voltage dips on sensitive loads, such as air conditioners and

power electronics. Many people are working on CBEMA curves for loads that have

stalled and switched off because of voltage dips. The CBEMA standard curves were

developed in the 1970s by the Computer Business Equipment Manufacturers

Association and are used as guidelines for the design and construction of electronic

devices. "The CBEMA curve was adapted from IEEE Standard 446

(Recommended Practice for Emergency and Standby Power Systems for Industrial

and Commercial Applications - Orange Book), which is typically used in the

analysis of power quality monitoring result” [4].

Methodology

Reading papers on sympathetic tripping problem worldwide and find examples.

Most of papers showed the voltage dip effect on loads are variant and single-phase

air conditioners stalling due to voltage dips less than 0.65pu and longer than 80 ms.

Reading papers air conditioners stalling and field test on AC behaviors with voltage

dips.

Reading papers on voltage dips on power system causes and ways to mitigate it,

many ways one is to limit fault current during system disturbances.

Reading papers on FCL existing technologies to prevent voltage dips on power

systems.


15

I came up with the basic idea, the root causes of the sympathetic tripping problem

in nonlinear loads, such as stalling of induction motor loads due to voltage dips on

system. If the effect of voltage dip on the system can be prevented/reduced, that

would prevent non-desired behaviors of loads and prevent sympathetic tripping.

One way is to use fault current limiting devices technology. The core contribution

of this Ph.D. research work is the new intelligent solid-state fault current multi-

level limiter.

The hypothesis was tested using software tools as passive limiting devices on

PSCAD.

A real system to illustrate the problem (Jizan Power System Case study) was

selected.

The next step was to model a real system that is suffering the same problem on

software and illustrate the problem.

Designed and modeled the new fault current multi limiting device on LT spice.

Used a hypothetical system the show the problem existing and used the new devices

to mitigate the voltage dips and reduce the load post fault average/RMS current

demand of three-phase load used to represent the effect of voltage dependent loads

such as single-phase air conditioner in real world as residential loads.


16

CHAPTER II

SYMPATHETIC TRIPPING CASE STUDY

The Sammtah substation is located approximately 60 km south of the Jizan

generating station of Saudi Arabia, as shown in Fig 2.1. The Jizan generating station was

built to meet a variety of standards, including standards governing the circulation of fault

current. In 1980, all 132 kV and 33 kV lines were solidly grounded due to the low fault

current, while a 13.8 kV line was resistively grounded due to high fault current. Now, all

new extensions to the system are solidly grounded. The Sammtah substation includes four

power transformers (two 132/33 kV transformers and two 132/13.8 kV transformers), four

incoming transmission lines, four transmission lines outgoing to the Al-Ahead and Al-

Atwal substations, and 36 distribution feeders. Since the four incoming transmission lines

arrive from different sources, the bus coupler is normally open.

The Sammtah substation frequently experiences the Sympathetic Tripping Problem

because its distribution feeder’s load and transformers are heavily loaded and because the

network supports numerous window air conditioners. Instances of the Sympathetic

Tripping Problem originating from the Sammtah substation have occurred during the

summer peak since the substation was built in 1996 [1], although why Sympathetic

Tripping Problem occurred was initially unknown. This sympathetic tripping is especially

challenging because it is triggered by load behavior largely beyond the control of the Saudi

Electricity Company.

To protect the Sammtah substation against the Sympathetic Tripping Problem, it

was equipped with 4x25 MVAR manually switched capacitor banks that supply it with

reactive power during both normal operations and disturbances. These manually switched


17

capacitors (MSCs) were chosen because reactive power cannot be transmitted over long

distances. Though they were installed to reduce delays in voltage recovery, the MSCs are

unable to the support the Sammtah network during disturbances (as this case study

indicates) and are not liable and trips during the very high current disturbances opposed to

what they were installed to mitigate.

Figure 2.1 Part of Jizan Power System Layout

Table 2.1 The Jizan System Generation Data

Source Name Voltage pu MW MVAR

Kudmi 1.05 Ref Ref

JCPS1 1.05 500 250

JCPS2 1.05 1000 500

Al-Darb 1.05 500 250


18

Table 2.2 Jizan System Transmission Line Data

Table 2.3 Jizan System Load Data


19

An Instance of the Sympathetic Tripping Problem

On July 13, 2016, at 11:40 a.m., the Jizan Power System in Saudi Arabia

experienced an instance of the Sympathetic Tripping Problem. All events were recorded

by the system’s fault recorders. A single-phase air conditioner was pushed to the stalling

point, at 100 ms from the initial time of a fault, because of a single-phase-to-ground fault

(red phase) of a transient nature to occur on one of the 33 kV overhead distribution feeders

that emanated from the Sammtah substation.

Table 2.4 Fault Current in Jizan Power System

Substation Three-Phase Fault Single-Phase Fault

132Kv 33KV 13.8KV 132Kv 33KV 13.8KV

JCPS 31021 13658 18262 36513 18383 776

jcps2 20892 22206.8

SABYA 21838 13096 17436 15762 17390 1586

SAMATAH 9392 15950 23533 7531 15864 22099

KFH 9079 15628 6363 1583

JIZ-NORTH 19274 17241 1747 1586

JIZ-NEW 8819 10754 6503 14265

ABUARISH 7985 14963 4242 10654

AYBAN 7287 10778 16212 6324 14376 774

DAYER 5038 9566 15084 4553 12806 772

BAISH 9039 10838 15994 6565 14354 773

DARB 10071 12230

7322 11006

The air conditioner remained stalled for 500 ms (see Figure 2). The fault was cleared at

100 ms (as TL 2 in Figure 4 shows), but this 100 ms delay was enough to stall some of

the other air conditioners connected to the system.


20

Figure 2.2 Current profile for TR4 at Sammtah S/S during the fault

Figure 2.3 Voltage profile for bus coupler at Sammtah S/S during the fault

Figure 2.4 Incoming transmission Line 2 current profile during fault


21

Figure 2.5 Current profile for Capacitors 2 and 3 at Sammtah S/S


22

Table 2.5 List of Interrupted Feeders

The ensuing fault caused an increase in line current from 379 A to 409 A on the

132 kV line, and the voltage dipped from 79 kV to 27 kV, as is shown by the voltage profile

of the bus coupler (presented in Figure 3). One of the jumpers connecting the OHL to the

substation gave way under the severe fault current, and the voltage dip at the 33 kV bus

caused stalling and overcurrent on 21 feeders of two different substations—Al Ahead and

Atwal—all of which sympathetically tripped. The system experienced a total load loss of

Substation Name Feeder

Name

Tripping

Name

Restoration

Time

Tripping

Period

ABU-ARISH NEW 132KV B413 11:40 13:33 1:53

KFH NEW 132KV B328 11:40 11:45 0:05

KFH NEW 132KV B305 11:40 11:45 0:05

ALAHAD NEW 132 KV B413 11:40 11:48 0:08

ALAHAD NEW 132 KV B412 11:40 11:48 0:08

ALAHAD NEW 132 KV B307 11:40 11:48 0:08

ALAHAD NEW 132 KV B314 11:40 11:48 0:08

ALAHAD NEW 132 KV B404 11:40 11:48 0:08

KFH NEW 132KV B320 11:40 11:45 0:05

ABU-ARISH NEW 132KV B453 11:40 11:46 0:06

KFH NEW 132KV B306 11:40 11:45 0:05

INDUSTRIAL CITY B313 11:40 11:50 0:10

SAMTAH B332 11:40 11:48 0:08

SAMTAH B328 11:40 11:48 0:08

SAMTAH B324 11:40 11:48 0:08

SAMTAH B321 11:40 11:48 0:08

SAMTAH B418 11:40 12:19 0:39

ALTUWAL B312 11:40 11:48 0:08

ABU-ARISH CENTER 33KV B333 11:40 11:46 0:06

SAMTAH B412 11:40 11:48 0:08

AYBAN B405 11:40 11:46 0:06


23

180 MW during the incident, including load losses due to sympathetically tripped feeders

and thermally tripped air conditioners. A list of disrupted feeders is presented in Table 6.

Data from this incident are presented in Tables 2.2, 2.3, 2.4, and 2.5. The current profiles

for incoming transmission line 2 and power transformers 2 and 4 are presented in Figures

2.2, 2.3, and 2.4, respectively.

As the record of this incident makes clear, when power is transferred near the

voltage stability limit, high loads on the transmission and distribution network can leave

the system vulnerable to even small changes in voltage. Table 2.5 shows the fault levels at

all of the substations in the existing Jizan system, including the Abu-Arish and Sammtah

substations. The fault current at the Sammtah substation is greater than 20 KA, and it is

above 15 KA and 33 kV where the system is solidly grounded. The Jizan power system

has implemented all of the aforementioned solutions—conducting fault-current analyses,

increasing overcurrent limits, increasing delay settings, reducing system impedance, and

using static VARs for reactive power compensation—but doing so has merely hidden the

problem.

Single-Phase Air Conditioner Behaviors

Objectives Experiments were performed in site tests at southern operation area (SOA) of

electrical network in the Kingdom of Saudi Arabia using ZERA testing kit manufactured

by GmbH, type MT300 on 08/13/2015 at 10:17 in the morning. The low voltage side is

220/110 V as RMS value at normal operation condition. However, The Electricity &

Cogeneration Regulatory Authority (ECRA), a Saudi organization, which regulates the


24

electricity there, stated that voltage level in low voltage side should be within ±5 %

variation of 220 V. The single-phase air conditioner test was performed after applying all

safety rules and with expert technicians and professional engineers and witnessed by us.

Equipment and Procedure Needed

All proper setting for the testing equipment were done before we started the

electrical connection to the tested unit. For example, the voltage limit was set to 250V max,

the current to 100 max, voltage and current transformers ratio and 4 wire configuration, so

the neutral current was noted to observed if any harmonics presence. The first test was

performed for A/C on the normal operation condition where compressor was on. The

single-phase voltage from the source socket was 122.24V phase to neutral and 212.27 as

phase to phase voltage, where it supposed to be 127 V 220V respectively with no load. The

recorded result is shown in Table 2.1. The coupling point voltage was 122.24 V and the

current pulled by the A/C to produce the needed cooling to the room to achieve 200 C was

15.019 A on phase while it is supposed to be 127V (It is important to mention that the

distribution transformer is following IEEE standard Delta/Wye11 connection at 60 HZ. It

is also important to mention that the angle difference between voltage and current was

23.10 lagging). This information is important since it give an indication of power

transferred and high reactive power demands when AC compressor is on.

Test Plan

One of major plan for this test was to take the measurements while the compressor

on, off, and on again to show how the electrical input power changes with the change of

set point of temperature that A/C requires to achieve inside the room beside the difference

in real, reactive, and apparent power for a single unit A/C.


25

The specification of tested units is 18000 BTU and the energy efficiency Ratio

around is 10 as per American standard. The step one was to test the A/C when compressor

on and it showed that the consumed real power is 1591 W, 685 VAR and a total of 1732

VA as apparent power. The power factor was 0.918 a, angle -23.29, the coupling point

frequency was 59.972 HZ, and the terminal voltage (ph-n) and current was 121.94V,

14.309 A, respectively. The second step was to adjust the new temperature above 350C, so

it takes around half second to disconnect the compressor and the current drops to 0.774 A

and the coupling point voltage improved to 126.28V, as shown in Table 2.2. The

percentage of current drop was 94.5% and the percentage of coupling point voltage

increased was 3.5%. The important point here is that the very high drop in reactive power

demand by A/C during compressor off mode, since it drops from 685 VAR to 41VAR and

the real power also dropped from 1591 W to 89 W which is the amount of power needed

by the A/C fan to run. In the last step, we reset the thermostat to the original value and

switch the A/C off for five minutes then switch on the A/C again. The compressor starts

running to cool the room, and since the room temperature was warmer, the amount of

electrical power needed to cool the room was more and the voltage at coupling point to

122.24 and the drawn current more 15.019A while the real and reactive power demand

increased to 1678 W and 716 VAR respectively. The amount of harmonics observed in

the current was not much: only 1% on the third harmonic and the voltage and current

distortions at on condition was within the allowable limits.


26

Table 2.6 Actual Values for Single A/C when Compressor On

Table 2.7 Actual Values for Single A/C when Compressor Off

Figure 2.6 Voltage and current curves for A/C when compressor on


27

Figure 2.7 Voltage and current curves for A/C when compressor off

Table 2.8 Actual Values for Current Harmonics of Single A/C when Compressor On

Table 2.9 Actual Values for Current Harmonics of Single A/C when Compressor off


28

As mentioned before, the amount of current during stalling would be five times the

fall load curent which was show in Table 2.2. The amount of reactive power also increased

beyond system designed cabability where we need other fast sources of reactine power

during system diturbances and to avoid voltage dip belw 65% of normal voltage at load

terminals [1].


29

CHAPTER III

PROBLEM ANALYSIS

To model Sympathetic Tripping Problem and test proposed solutions, the Jizan

Power System, shown in Figure 3.1, was presented in the case study section also was

selected in this section to compare results for two reasons. First, the Jizan Power System

sympathetic tripping is a real-world industry problem that started 1996 and still exists, even

the Saudi Electricity Company tried many different solutions (as mentioned in the solutions

section), but the problem still exists. Second, the availability of Jizan Power System data

makes it more visible to be used as a test system for proving the existence of the problem

and the ability of limiting current to solve the problem and compare result with the same

system in case study.

Figure 3.1 Simplified power system (JPS)


30

Voltage Dip Analysis Power World

In order to test an affected system and determine that it suffers from Sympathetic

Tripping Problem, we needed to model the system on power world software and run three

power system analysis tools: power flow, contingency analysis for weakest bus, and last

transient stability analysis without/with fault current passive limiting and reactive power

support. Two solutions were tested: the reactive power support using SVC and limiting

fault current at the distribution level. The system parameters and equipment data are shown

in Tables 2.2, 2.3, and 2.4 in the previous section. System transient stability was tested in

three different scenarios: an existing system without any reactive power support (unstable),

system reactivity power supported at load centers, the system was reactive power supported

and fault current was limited (stable system-proposed solution).

As shown in Figure 3.1, the simplified single line diagram for the tested system.

Two generation stations and two interconnections with neighboring systems. The fault was

created at bus 5 which most loaded bus in the system. The system is interconnected on a

132KV network.


31

Figure 3.2 Load flow and voltage drop results

The results of load flow analysis on simulator which are shown in Figure 3.2, the

voltage profile/ drops at each bus, the blue zone in this figure represent the voltage dip

below limits 0.9pu. The most voltage dip is happening at bus 5 and that is where fault and

sympathetic tripping case was initiated in the case study of this paper. Table 3.7 presents

the same graphical date buses voltage and angle in table form. The red points are the

voltage drop point in the entire system (weak points).


32

Table 3.1 Voltage Magnitude and Angle at Each Bus

The fault analysis tool on the power world was used to investigate problem and

solution. From problem point of view, the fault current proved to be responsible for voltage

dips on the faulty bus to zero and nearby buses below 0.7 pu. These voltage dips for longer

than 100 ms would initiate the stalling of connected ACs on the distribution feeders. Four

types of faults were created in sequence in four separate tests on bus 5 with three scenarios

used each time: system without limiting fault current, only sources within the system

neutral to ground limited (10 ohm), only distribution feeders ware with fault current

limiting and last, and the system sources resistively grounded and distribution feeders, fault

current limited. The results are shown in Tables 3.2, 3.3, and 3.3 for each type of fault:

single-phase to ground, three-phase to the ground and two-phase no ground.


33

Table 3.2 Single Line to Ground Fault at Bus 5

S Substation Name Single line to ground fault A, N

Type of Fault Solid Ground FCL-N to G FCL_in phase Both

Fault A, angle If, F_Angle If, F_Angle If, F_Angle If, F_Angle

7.38, -45.96 0.0, -90.0 0.0, -90.0 0.0, -90.47

1 CPS1 0.594 0.99868 0.99868 0.99868

2 Sammtah 0 0 0.00039 0.00039

3 Abu Arish 0.60803 0.95407 0.95407 0.95407

4 Sabya 0.63285 0.97562 0.97562 0.97562

5 Baish 0.71719 0.99545 0.99545 0.99545

6 Aldarb 0.74621 1.02241 1.02241 1.02241

7 Jizan Town 0.55226 0.92761 0.92761 0.92761

8 Jizan North 0.63672 0.99909 0.099909 0.99909

9 Al twal 0.0906 0.918 0.0918 0.918

10 Al Ahad 0.09101 0.92219 0.92219 0.92219

Table 3.3 Three Line to Ground Fault at Bus 5

S Substation Name Three-Phase to ground fault A, B, C, N

Type of Fault Solid Ground FCL-N to G FCL_in phase Both


7.38, -45.96 7.38, -45.96 0.065, -45.9 0.065, -45.49

1 CPS1 0.59457 0.59457 0.99479 0.99479

2 Samtah 0 0 0.91737 0.91737

3 Abu Arish 0.60803 0.60803 0.95055 0.95055

4 Sabya 0.63285 0.63285 0.97235 0.97235

5 Baish 0.71719 0.71719 0.97235 0.97235

6 Aldarb 0.74621 0.74621 0.97235 0.97235

7 Jizan Town 0.55226 0.55226 0.92399 0.92399

8 Jizan North 0.63672 0.63672 0.99541 0.99541

9 Al twal 0.0906 0.0906 0.91051 0.91051

10 Al Ahad 0.09101 0.09101 0.91466 0.91466


34

Table 3.4 Line to Line Fault at Bus 5

S Substation Name Line to Line Fault B, C

Type of Fault Solid Ground FCL-N to G FCL in phase Both


6.392, -135.96 6.392, -135.96 0.111, -135.49 0.111, -135.49

1 CPS1 0.57919 0.57919 0.99135 0.99135

2 Samtah 0.46275 0.46275 0.91349 0.91349

3 Abu arish 0.54836 0.54836 0.947 0.947

4 Sabya 0.61746 0.61746 0.96937 0.96937

5 Baish 0.69218 0.69218 0.99016 0.99016

6 Aldarb 0.7354 0.7354 1.01741 1.01741

7 Jizan Town 0.53797 0.53797 0.9208 0.9208

8 Jizan North 0.57424 0.57424 0.99169 0.99169

9 Al twal 0.40929 0.40929 0.90646 0.90646

10 Al Ahad 0.41115 0.41115 0.9106 0.9106

It is clear from green columns in above tables the voltage dip improvement on other

adjacent buses, even though bus 5 voltage dropped to zero in all cases but the voltage

limiting device in the same faulty feeder helped to keep voltage on the system above

desired limit (0.8pu).

To verify the fault current limiting effect on voltage dip limit to 0.8pu, and to assure

that Jizan system transient stability before and after implementing fault limiting technique,

transient stability tools were used in power world. The existing system without fault current

limiting was tested, that is, unstable, as shown in Figure 3.3, the generators angles and

voltage at generators become unstable after creating fault at Sammatah substation (bus 5)

for fault cleared in 100 ms. Figure 3.4 shows the most loaded buses in the system, each bus

voltage profile and current profile during fault (at bus 5 for 100 ms). The load's voltage and


35

current in Figure 3.4 show that with the existing fault current level any fault on distribution

feeder close to Sammtah Bus (bus 5) would drive the entire Jizan system to unstable voltage

zone.

Figure 3.3 A. Four main generators rotor angle (unstable)

Figure 3.3 B. Four main generators terminal voltage (unstable)


36

Figure 3.4 A : System 8 loaded buses voltage (unstable)

Figure 3.4 B : System 8 loaded buses current (unstable)


37

On the other side, we limited the fault current at the distribution level at bus 5 by

inserting an impedance of 2 pu and the results are shown in Figures 3.5 and 3.6. The system

was able to sustain the fault on both sides generation and loaded buses smoothly. These

two figures show how the system was stable during fault on bus 5 with limiting current. It

is important to mention here that the voltage dips might not drop below 0.7 pu with the

system stable in the Jizan system in the case where we limited fault current. For the Jizan

system to be clear of sympathetic tripping, as concluded in this section, Jizan system fault

current should be limited and fixed capacitors need to be replaced by STATCOM at the

most loaded buses. A reactive power support with a fixed capacitor might not be the desired

solution (as was done in the existing Jizan Power System currently). The STATCOM

would perform better for transient stablity improvement compared to manual fixed

conpensation.


38

Figure 3.5 A: Four main generators rotor angle (stable)

Figure 3.5 B: Four main generators terminal voltage (stable)


39

Figure 3.6.A: System 8 loaded buses voltage (stable)

Figure 3.6.B: System 8 loaded buses current (stable)


40

Three main conclusions can be drawn from these analyses of the Jizan power system:

1) When the fault level of the system is near the designed limit, voltage dips can

push the fault level beyond the limit (unstable voltage at different buses). One

unstable bus is enough to drive the system to major blackout, just as what

happened in 2003 [1].

2) Because the system employs centralized reactive power support at the main

power station, it transfers reactive power across long distances. It is not

recommended to transfer reactive power over long distance.

3) The fixed capacitors (SVCs) currently in use are not the best way to achieve

reactive power compensation because they contribute little to system

impedance and lower output during voltage dips. Those fixed caps have to be

replaced by STATCOM to improve system transient stability.

4) The system fault current is high enough to take the voltage dip deeper below

0.65pu, an immediate action needs to be taken using available fault current

limits in the market and bus coupler to be opened where needed (proposed

solution is new devices called Intelligent Solid-State Fault Current limiter).

Voltage Dip Analysis On PSCAD

A system model was built using the PS-CAD to simulate the case study and to test

the proposed solution (see Figure 1). The existing PS-CAD could not run the power flow

needed to unitize the system model. So, this simulation and modeling use the previous 2010

PSSE data in the system for initialization the PS-CAD file. System data (including

generation, transmission, and load data) for three different cases are shown in the above

tables. We continue to reference the faulty bus voltage and the load current on the highly


41

loaded JCPS (V1), Sammtah (V2), Al-ahead (V3) and Abu Arish (V4) substations. in

addition to more loaded buses to observe the voltage dip level effect on that buses and

recovery time needed for each bus voltage to come back to 90% of nominal voltage. As in

the case study, the fault bus was Sammtah 132KV. It is important to mention that after the

system was installed in 1980, power generation increased in response to continuous

increases in load demand. Because the system required increasing amounts of power and

new means of generation would have taken a long time to construct, a remarkable number

of links were established with nearby systems. In our model, the Al-Drab Substation was

used to approximate these links.

Case 1: Observation of the System

The model revealed voltages on some buses lower than 1 up. These voltage dips

occurred because of loading and because the power sources were centralized. As is shown

in figure 6, the system used a fixed capacitor at the Sammtah substation for reactive power

compensation. As was mentioned, however, fixed SVC using Caps compensation depends

on the voltage across caps terminals.

During voltage dips, the SVCs output less voltage than is needed by far away

sources, making the voltage dips worst. When a fault was initiated at 0.5 seconds on the

Abu Arish bus, events unfolded much as they did in the case study. The voltage on the

Sammtah bus dropped to 27% of nominal and the fault lasted 100 MS. It took another

75MS for the voltage of the Sammtah bus to recover to 90% of nominal.


42

Figure 3.7 Simplified layout of the Jizan power system

Voltage dips of sufficient intensity and duration can cause single-phase air

conditioners connected to a loaded feeder to stall. The voltages of feeders connected to

Sammtah faulty bus should be much higher than those at the end of the feeders, depending

on the load. Modeling the system revealed, however, that the voltages at different buses

were affected to different degrees and recovered at different times. Table 3.5 summarizes

the voltage dips and the recovery times at each bus. As is noted above, voltage dips lower

than 65% and longer than 100MS cause voltage-dependent loads (like ACs) to stall,

thereby rendering the system unstable. The voltage profiles of all the monitored buses are

shown in Figure 3.8. The buses most affected were those closest to the fault and those that

were the most heavily loaded.


43

Figure 3.8 Voltage profile JCPS, Sammtah, and Al-Ahead S/S (Case 1)

Table 3.5 Voltage Dip % and Recovery Time for Case 1

Case 2: Using a Resistively Grounded System on PS-CAD

Since system stability depends on system status before, during, and after

disturbances are cleared, one solution to the sympathetic tripping problem is to use a solid-

state current limiter. Since the magnitude of a voltage dip depends on both the fault

impedance and the system impedance form fault point to the sources [9], a solid-state

current limiter can mitigate voltage dips and increase voltage distribution stability during

disturbances.


44

Figure 3.9 All sources are resistively grounded (Case 2)

The duration of a voltage dip is determined in part by how quickly the circuit

breaker can isolate the fault. The model assumed the fastest time to clear a fault via

instantaneous overcurrent protection: 100MS. As is shown in Figure 8, the proposed

solution was to insert 20-ohm of resistance ahead of the fault. The improvement in voltage

dip duration is shown in Table 8.

Maintaining voltages above 80% at each of the main busses is sufficient to prevent

ACs from stalling, but additional voltage is needed to compensate for dips across the line

and at the ends of the distribution feeders. As Table 8 shows, in the case of Abu Arish S/S,

the magnitude of the voltage dip improved to only 7.6% (which is significant). To ensure

that the voltages at the ends of the feeders never drop below 70%, systems should be

designed so that voltage dips do not exceed 10%. So long as voltage dips do not exceed

10%, the voltages at all system buses should remain above the stability limit. If this safety

margin is observed, moreover, recovery times should improve by 50%.


45

Figure 3.10 Voltage profile JCPS, Sammtah, and Al-Ahead S/S (Case 2)


Bus Name Bus Voltage # Pre-Fault During Fault Voltage Dip % Recovery Time

JCPS S/S V1 1.0086 0.9739 3.44 0

Samtah S/S V2 0.9273 0.8595 7.31 25

Al Ahad S/S V3 0.9189 0.8512 7.37 25

Abu Arish S/S V4 0.8873 0.8534 3.82 0

Case 3: Replacing the SVCs with Synchronous Condensers

Since SVCs do not output sufficient voltage to ensure system recovery, another

solution is to replace them with synchronous condensers. As mentioned previously and

shown in Figure 10, both SVCs were disconnected during the fault due to overloading limit,

which is bad for the system. The system needs the highest CAPs performances now when

it gives less reactive power and, in some cases, it disconnected and make it worst.

The proposed solution replaced the SVCs with synchronous condensers. The

layout of the system is shown in Figure 3.11. The reactive power needs to be closer to load

and not exceeding 40% of reactive power need. For this case, we used fixed Caps to avoid

leading at the fewer load moments [1]. No restrictions were needed in the present case

because SCs are sensitive to load demands, producing and absorbing reactive power. As


46

Table 3.12 illustrates, the voltage dip was reduced to less than 3%, which is certainly

acceptable. Moreover, the recovery time was reduced to zero seconds.

Figure 3.11 Sources are resistive grounded/the SVCs replaced with SCs

The main advantage of using SCs is that they allow nominal system voltage

recovery. As mentioned before, whether an AC stalls depends on both the magnitude and

the duration of the voltage dip. Therefore, shorter recovery times improve system stability

and help to prevent stalling.

One final and important point is that real and reactive power should not be

centralized, as they are in the Jizan power system (Figure 2.1). However, the effect of

reactive power centralizing on system voltage stability is more. In the model, reactive

power was produced as close as possible to the load. The Jizan power system should install

SCs at the Abu Arish substation since it is highly loaded and connected to the other

substations via a radial system.


47

Figure 3.12 Voltage profile for the JCPS, Sammtah, and Al-ahead S/S (Case 3)


Bus Name Bus Voltage # Pre-Fault During Fault Voltage Dip % Recovery Time

JCPS S/S V1 1.0286 0.1.0135 1.41 0

Samtah S/S V2 0.9936 0.96687 2.69 0

Al Ahad S/S V3 0.9852 0.9584 2.72 0

Abu Arish S/S V4 0.9452 0.9391 0.65 0

Three main conclusions can be drawn from the sympathetic tripping that occurred

in the Jizan power system:

1) Because the system has fault current near the designed limit, voltage dips push

the faulty Bus Voltage beyond the stability limit, fault current should be limited

to point where voltage dips keep within 80%.

2) The system employs centralized reactive power support at the main power

stations and transfers reactive power across long distances.

3) The fixed capacitors (SVCs) currently in use are not the best way to achieve

reactive power compensation because they contribute little to system

impedance and lower output during voltage dips.

These three root causes are tested on the next section system modelling with

proposed solutions. Recently, a paper issued on March 12, 2014 investigated the


48

Sympathetic Tripping Problem in a power system with large penetration of disturbed

generation impact on DGs. It mentioned that it was not only that voltage-dependent loads,

such as single-phase air conditioners, are disconnected by voltage dips, but also the area

that is penetrated by high number of DG system, such as small micro grids, are

disconnected too. The inverter protection system that is used for protecting the

microsystem was reported in different incidents in UK [12] trips during fault condition

before fault is cleared. The effect of sympathetic tripping due to voltage dips which is

initiated by high fault current need to be solved in both area where elevated temperatures

and where DG system become part of power system economics challenges. The paper

proposed modifying network protection setting to mitigate the risk associated with

inverters tripping during system disturbances [12].

As per analysis above, the future work would focus on solving STP that is related

to voltage dips by limiting the fault current and better management of the reactive power

during fault to keep voltage dips above 80%, as per solutions which were tested. More

specifically, future work will be designing two new intelligent solid-state devices to

address the mentions solutions. Those two devices are intelligent fault current limiter and

double side intelligent transformer to improve the micro grid and power system stability

during fault.

This figure shows the fault current on Sammtah Substation and the voltage dip

below 565%, in addition, it shows the amount of reactive power absorbed by the fault at

any time fault is true. This huge amount of reactive power will be stress on the generation

station during fault and the reactive power support using SVC would release this stress if

installed. In addition to the advantage of SVC to supply the fault reactive demand it also


49

speed up the recovery after fault clearing. The SVC installation at load center is a demand

not to prevent STP and Speed DVR but also improve the system transient stability to

overcome most system disturbances.

Figure 3.13 Fault current profile at Sammtah Substation


50

CHAPTER IV

ISSFCL DESIGN AND SIMULATION

An intelligent solid-state fault limiter and a smart solid-state tap changer must be

developed to replace traditional, motorized tap changers at different voltage levels and limit

voltage dips to 80% during system disturbances to prevent the Sympathetic Tripping

problem in power and energy system. Because manual tap changers do not enable fast

reactive power support at medium and high voltage levels, they should be replaced with

smart solid-state tap changers that can better regulate bus bar voltage before and after

disturbances. These actions can be quickly accomplished in two ways. The first way is to

drive a tap changer with a microcontroller and solid-state switches instead of with the

mechanism used by manual tap changers. On the other side, new fast acting fault current

should be developed as shown in figure 4.1. This schematic shows a top view of the new

invented device. It consists of three levels of limiting in series, each level contains one

limiting resistor in parallel with a solid-state switch driven by a control circuit (which will

be discussed in following sections).


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Figure 4.1 Simplified multi-level limiting current device

This section presents a new type of solid-state fault current limiter called the

Intelligent Solid-State Fault Current Limiter (ISSFCL). The ISSFCL has all of the benefits

of other fault current limiters, but it is more intelligent because it uses a microcontroller to

communicate with other devices. In addition, because it monitors the voltage instead of the

current, it can limit voltage dips caused by system disturbances and otherwise improve

voltage stability. To limit fault current conditions with multi-level of current limitation.

Background

Power systems are designed to accommodate specific ratings, especially ratings for

voltage, current, and frequency. To protect power systems from ratings that are too high or

too low, distribution feeders include protection relays that enforce over and under limits:

overcurrent relays prevent feeders from overdrawing current, and under voltage relays

protect power systems from the under-voltage conditions that can occur during system

disturbances. Because both overcurrent and under voltage relays generally require a relay

time of 2–3 cycles and circuit-breaker time of 3–5 cycles to isolate faults, they can require


52

up 80 milliseconds to do so. However, new types of loads—including single-phase air

conditioners and some electronics used in manufacturing—are not designed to handle

voltage dips under 65% of nominal that last longer than 100 ms. To help accommodate

these new types of loads, intelligent solid-state devices, which can act in micro seconds,

should be employed to mitigate voltage dips.

This chapter begins by reviewing the literature on the devices currently used to limit

fault current, identifying their challenges and limitations. It then introduces a new type of

intelligent solid-state device and evaluates its current and voltage capabilities by modeling

and simulating it in LTspice. The results of these simulations reveal that the device can

limit voltage dips, keeping the voltage within the desired range. The ASM code of the

device is then lab tested, and the results reveal that it can be modified to suit other

applications and uses.

Review of Available FCL in the Market

Technological changes have increased the risk of fault current on power systems.

These changes include power system integration, the emergence of new types of loads, and

increased reliance on micro-grids and sources of renewable energy [2, 3]. As the risk of

fault current has increased, so too have its dangers and costs. Its dangers include the

Sympathetic Tripping Problem and damage to system components. Its costs include the

upgrading of circuit breakers and other line equipment to handle additional fault current.

Because they limit the occurrence and severity of fault current, fault current limiters

(FCLs) have become indispensable in power system protection. They also have a number

of ancillary benefits. For example, because FCLs increase impedance, they improve power

quality. They also improve the stability of a variety of relays—including overcurrent,


53

distance, differential, and directional relays—and they facilitate pick-up, processing, and

coordination. In addition, they allow the use of smaller, cheaper superconductors and are a

good alternative to fuses, which require time and money to replace.

FCLs can also be employed across a range of applications, including both AC

systems—such as Flexible Alternating Current Transmission Systems (FACTS)—and DC

systems. Because DC systems do not feature natural zero crossings, which help to clear

fault current, FCLs are especially valuable in DC systems. FCLs can also be used in

conjunction with network splitting and are often located in overcurrent relays. They can

also be located both inside and outside of primary protection zones.

As Table 4.1 shows, there are two types of fault current limiters. Active fault current

limiters are switched on when needed, and passive fault current limiters remain connected

at all times. Active FCLs increase impedance only during fault conditions, while passive

FCLs increase impedance during both fault and normal operating conditions [2, 4]. The

three existing FCL technologies are listed below:

SCFCL – Superconductor FCLs: Resistive Superconducting FCLs show zero

resistivity during normal operations, but high resistivity during fault conditions

[2,5]. They utilize the transitionary properties of superconducting materials, which

heat up at quenching time and are used as shunts to prevent damage. With a critical

temperature of 39 K, Magnesium Diboride (MgB2) is a low-cost superconductor

ideal for use in SCFCLs [5].

SSFCL – Solid State FCLs: SSFCLs use power semiconductor devices—such as

IGBTs, GTOs, and GCTs—to limit the initial increase of fault current and prevent


54

it from reaching its peak. Materials commonly used in SSFCL switches include

Silicon (Si) and Silicon Carbide (SiC).

Hybrid FCL: Hybrid FCLs are composed of two units. A detection unit monitors the

current for fault conditions, and a limiting unit is controlled by the detection unit. Because

hybrid FCLs are incredibly fast, they are used under normal operating conditions to reduce

costs.

Table 4.1 Overview of Existing Types of Fault Current Limiters

Passive Measures Active Measures

Busbar Splitting

Grid Splitting

High voltage delivery at transmission

and distribution level

Superconducting FCLs (SCFCLs)

Solid State FCLs (SSFCLs)

Hybrid FCL

The Material used for the existing FCL, switching capacity of silicon devices was

improved by advance manufacturing process where leakage currents are extracted at high

temperature and Silicon based devices can sustain in high currents.

The conventional way to use fuses to limit current for protection is still exists

whenever new FCL are not fit. There are some high rupturing capacity fuses which has

safely interrupt up to 300 kA at 600 VAC. The time current curve can be used to identify

the current limiting response. By a thermal device current limiting such as fuse, it will clear

fault faster with a high current. A limitation of such devices is that the voltage level induces

across the switch during off time, however it can be utilized for low voltage limiting right

now due to technology limitations.


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The Single-Phase - ISSFCL

The Intelligent Solid-State Fault Current Limiter (ISSFCL) is a power electronics

device featuring a programmable microcontroller that uses the voltage at a point of interest

(usually a terminal point of source voltage) to decide when to flip two or three parallel

solid-state switches containing/composed of current-resistive elements. As Figure 4.2

shows, the ISSFCL’s microcontroller allows it to communicate with the world around it.

The ISSFCL can be categorized as a hybrid FCL, though it is smarter than other hybrid

FCLs and enables multi-level protection.

Figure 4.2 Overview of ISSFCL Device

The sizes of the microcontroller and the switches can be adjusted for particular

applications, and different resistive elements with different limiting capacities can be used

to achieve different results. For example, the resistive limiter can be used for its power

dissipation, the inductive limiter can be used for its limiting capacity, and the compound

limiter can be used for both. Because its limiting components can be varied, the ISSFCL

can be used as six distinct devices:

PMU IGBTs

Microcontroller ASM programming

New Power System

Intelligent Devices 4 in 1


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1) A resistive limiter with three switches

2) A reactive limiter with three switches

3) A compound limiter with three switches

4) A binary resistive limiter

5) A binary reactive limiter

6) A compound binary limiter

Figure 4.3 Schematics of the ISSFCL

Intelligent Solid-State Fault Current Limiter Design

Intelligent Solid-State Fault Current limiter is a power electronic-based device

designed as a multi-level limiting device. The number of levels depends on fault level at

specific location in the power or energy system and the length of the distribution lines in

different substations. The length of feeders is not the same, in some case such as rural areas

it exceeds 20 miles. In this case, we used three level of limiting as prototype device with

10 ohm in each element; however each substation with different fault level will have

different resistance values as shown in Figure 4.4.


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Figure 4.4 Substation Resistance Values

Substation Model 33 kV

Figure 4.5 shows a 33 kV substation hypothetical model with a source and two

distribution feeders of the same voltage. Note that 33 kV is a standard medium voltage in

a distribution network. Each feeder has one circuit breaker with protection devices to

safeguard the system from overcurrent and earth fault conditions.

Figure 4.5 33 kV substation hypothetical model with a source and two distribution feeders

of the same voltage

Figure 4.6 illustrates a transformer model used in this study: the transformer is a three-

phase 33 kV to 208 V. The inductance is calculated for 100 kVA apparent power, and 33

kV and 208 V are primary and secondary voltages, respectively. All other parameters are

also shown in Figure 4.6.


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Figure 4.6 Step down Transformer Model

The load model is for a three-phase induction motor with a resistive load, as shown in

Figure 4.7. The induction motor used in this study as load due to the similarity of voltage

dip effect on slip and motor resistance with the single-phase air conditioners. The induction

motor was used because of the high level of IM penetration into load types; in some cases,

it can reach 70% of the induction motor loads.

Figure 4.7 Load Model – Induction Motor

The fault in this study was modeled after the fault clearing in a real system. The duration

of the fault is 100 ms, which is the minimum time needed for protection and relay to isolate


59

the fault form system, using an instantaneous relay in the traditional protection system?

The fault created in our study is a three-phase to ground balanced fault, the highest fault

level system exposed to the nearby substation short circuit. As shown in Figure 4.8, the

fault will be applied to the distribution’s feeder at a different location after 2.5 seconds of

running using the (.param Tfaul) and the duration will be 100 ms using the (.Tdur)

command, as shown. The time of 2.5 seconds was selected to give the three-phase induction

enough time for a smooth start while the duration was stimulating the minimum time that

instantaneous relay might need to isolate a fault form a system.

Figure 4.8 Fault model on LTspice

Figure 4.9 is a schematic for the multilevel limiting device; the device is comprised of three

limiting resistances each of 10 ohms in parallel with a normal closed solid-state switch for

the nominal voltage and current of the system and has the capability to block the same

voltage when it is open circuit. The three switches are controlled using a programmable

microcontroller; however, in our study we represent the microcontroller by control circuit,

which we will discuss in the next section. The device has three limiting levels in a series

and each limiting level is one solid state switch in parallel with a resistive element, as

shown in Figure 4.9.


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Figure 4.9 Multi-level limiting device model (ISSFCL)

This circuit is the fault current detector as well as the multilevel fault current limiter that

enables the switch, on fault, to measure the feeder current and compare it with the reference

value. It used an SR flip flop and time delay circuit in continuously measuring the current

passing through the limiter. Since the multi-level would be installed on each feeder of

affected substation the circuit would help to discriminate between faulty feeder and other

adjunct feeders.

Figure 4.10 Fault current detector circuit model


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The section is the control circuit that represent the control part of programmable

microcontroller to switch on/off the solid-state switches according to controlled point

voltage level in distribution feeder. This control circuit consists of three important parts.

The first part as shown in lift side of Figure 4.11 is three set and reset flip flop that compare

the controlled point voltage with programmable set points, in this case 90, 80, and 70% of

the nominal voltage which is 33KVline to line in this case. The second part is the three-

delay circuit were introduced to overcome the problem of continuous switch trigging. As

the voltage drop during fault before it is cleared from the system the voltage will take time

to drop to 70% passing 80 and 90%. The three-delay circuit will assure the flip flop would

not reset till the voltage dip still to a point. The third part on the right side of Figure 4.11

is the top delay circuit added to give enough time for the three voltage detectors and fault

current detector current to send signal to activate the multilevel limiting switch.

Figure 4.11 Control circuit diagram model for ISSFCL


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The code that generated the microcontroller used to drive the ISSFCL with multiple

limiting levels is displayed in Figure 4.12. The three-level of voltage dip protection is

programmable, which means it can be modified to match the load requirements. One last

advantage of the ISSFCL is its capability to help pinpoint the fault location to decrease the

lineman’s patrolling time since each level or switch operation during fault would

correspond with a specific section of feeder length. For example, a fault with two switch

operation means the fault in in the middle part of the distribution feeder and so on.

Figure 4.12 Developed ode for ISSFCL control

In a real system of protection, a potential transformer enables us to measure the system

voltage by dropping the voltage to small values with a transformation ratio of N. The low

voltage (5V) is then converted to DC voltage to be compared to set point and control circuit

could make the decision. In our case, we represent all that instrumentation with an AC to

DC converter circuit (LTC19966) to generate the feedback voltage to closed control the


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multi-level switch, as shown in Figure 4.13. One microfarad capacitor will be used to

reduce the ripples in the output DC voltage that will represent the RMS voltage value

needed to control the multilevel fault current limiter by the system voltage level.

Figure 4.13 RMS voltage detector on LTspice

Figure 4.14 illustrates the three-phase, multi-level limiter composed of three single-phase

limiters used in the hypothetical system sympathetic tripping problem and solution test.


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Figure 4.14 Three single limiters in ISSFCL

How the ISSFCL Works

Unlike other fault current limiters, the ISSFCL measures the voltage instead of the

current. Its circuity includes a potential transformer that can reduce the voltage to between

1 V and 5 V, an embedded microcontroller coded to switch resistive elements in or out in

response to the voltage level, an analog-to-digital converter, two or three solid state

switches, and resistors or inducers composed of limiting elements. A generic schematic of

its circuitry is show in Figure 4.11.

Under normal conditions, the ISSFCL will continuously measure the system

voltage using a sampling rate suited to the particular application and to the need for

information on the performance of the system. As Figure 4.11 shows, the ISSFCL will

recognize high voltage levels and reduce them to between 1 V and 5 V using the potential

transformer selected. An A/D converter chosen for the specific application will


65

continuously convert the PT’s output reading from AC to DC and convey this reading to

the microcontroller. On the basis of this reading—or on the basis of calculations made

using its own, embedded A/D converter—the microcontroller will signal for switches to be

turned to “off.” The default setting for the switches is “on,” at which they transmit the

current and voltage with minimum resistance. So long as the voltage remains between 90%

and 100%, all of the switches remain at “on.” If the voltage drops to between 80% and 90

%, however, the microcontroller will signal for the first switch to be opened and the first

resistance element to be inserted. If the voltage continues to drop and reaches between 70%

and 80%, the microcontroller will signal for the second switch to be opened and the second

limiting element to be inserted. Because the resistive elements will limit the current, they

will work to keep the voltage within the desired range. If the voltage continues to drop,

however, the microcontroller will signal the source breaker to trip. Binary sequences can

be used to design three additional devices featuring fewer switches, but these will be

discussed later.

Uses of the ISSFCL

The ISSFCL was initially designed to solve the Sympathetic Tripping Problem,

which can cause outages. In the Sympathetic Tripping Problem, no faulty devices or

feeders trip because of the fault on an adjacent feeder. This fault can be the result of long

and severe voltage dips caused by new types of voltage dependent loads, which can require

up to 5 times the normal amount of current to remain functional. A separate paper analyzed

the Sympathetic Tripping Problem, finding that the use of fault current limiters and static

VAR compensation could help to prevent it [5]. As Table 1 shows, the ISSFCL could be

installed on lines at the distribution level to limit fault current. As is shown in Table 2 and


66

Figure 3, however, the ISSFCL could also be installed between neutral and ground points

of voltage sources to limit single-phase to ground which is has more probability to happen

on power system at different levels.

Although the ISSFCL was initially designed to solve the Sympathetic tripping

problem, it can be used to limit both overcurrent and under voltage in many other

applications, including power electronics, energy systems, and communications. To enable

such applications, the designer reviewed the specifications of a variety of new devices,

especially their voltage and current ratings. Since a 15KV IGPT must be developed for the

ISSFCL to limit 100–200 A on 15 KV, at present stacking up the IGPTs would be a way

to achieve needed current and voltage. GTO could be used since the technology is

available. The choice of switches would depend on the availability in the market and

requirements. The ISSFCL was modelled and simulated in a power system featuring

devices with low ratings. For this reason, the ISSFCL can currently only be used in

low/medium voltage applications.

Figure 4.15 ISSFCL connected to Source neutral point


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ISSFCL Design

ASM Code (Brain)

The main advantage of the ISSFCL is that its MSP430 microcontroller measures

the voltage instead of the current. As Figure 4.16 shows, to test the code for the MSP430,

we used a PC, a DC voltage source, an oscilloscope and white board, LEDs, wires, and the

MSP430. Figure 4.17 shows a diagram of the circuit.

Figure 4.16 ASM code test setup in lab

A DC voltage source was used for the microcontroller instead a potential

transformer and an A/D converter. The LEDs were connected to microcontroller output

pins: pins 1.0, 1.2, and 1.3. The microcontroller was programmed to switch on the yellow

LED connected to pin 1.0 if the input voltage fell between 2.7 V and 3.3 V (80–90% of the

nominal voltage), the blue and yellow LEDs if the input voltage fell between 2.4 V and 2.7

V (70–80% VN), and all LEDs if the input voltage dropped below 2.4 V (below 70% VN).

The microcontroller successfully switched on the LEDs in accordance with the program.

In real case the three LEDs will be replaced by solid state switch with voltage and current


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matching desired application driven by gate drivers since microcontroller in a small voltage

and current needed by power semiconductor devices.

Figure 4.17 Three level voltage dips and LED indicators

The results of the code test are shown in the following figures. As Figure 4.18

shows, the switching time of the solid-state microcontroller (1–2 µs) is much shorter than

those of existing FCLs.

Figure 4.18 Switching on time voltage profile

Limiting Device Elements Design

As Figure 4.18 shows, the operation of an ISSFCL featuring resistive and inductive

limiting elements was modelled and simulated in a radial system.

Switch Device

Figure 4.20 shows the four main parts of the ISSFCL: the RMS detector, the

microcontroller, the switch delay circuit, and the main limiting devices. The ISSFCL was


69

designed using Mat lab, and LTspice was used to model and simulate its performance on a

simplified radial single-phase line from a source to a load. Although LTspice is user

friendly and free, a circuit needed to be developed in LTspice to represent the action of the

microcontroller. The potential transformer was used to reduce the voltage to

instrumentation level (5 V) and the analog to digital conversion in order to make decision.

In our case we used RMS Detector and delay circuit to achieve the same function on

LTspice. A custom envelop detector was designed to determine the RMS value of the

source voltage because this value was not available in LTspice. The resistance and

capacitance were set at the values that would ensure the smoothest voltage profile, and

there is minimum repels that can be ignored. The parameters calculated by the system were:

R1 = 10, R2 = 10, R3 = 10, C = 4u, Rc = 3.35 k, C1 = 1 u, Rc1 = 33.5 k

Figure 4.19 Schmatic for RMS detector

The control system was design with three comparators: one that compared the

source voltage to 0.9 pu, one that compared the source voltage to 0.8 pu, and one that

compared the source voltage to 0.7 pu. These values represented the three voltages above

which the source voltage had to remain, depending on the level and location of the fault

current and its associated voltage dips. Though the generic model used these values,


70

specific values should be calculated for each application. As the simplified system

(presented later) shows, a voltage dip acts as a sort of voltage divider according to the

following equation:

Vd= Rf/(Rf+RS)*Vs

According IEEE, depending on the system impedance between the voltage source

and the location of the fault, a voltage dip can range from a minimum of .1 pu to a maximum

of 0.9 pu. For this reason, the ISSFCL was designed to be able to actuate its switches in

response to specific voltage dips. For example, if the voltage dips below 90% of nominal,

indicating that the fault is located far away from the source, the microcontroller can signal

for one limiting element to be used, which would suffice to prevent the voltage from

dipping below 70%. If the fault is located closer to the source, however, the voltage at the

fault location could conceivably drop below 80%; in this case, the microcontroller could

signal for two limiting elements to be used to keep the voltage from dipping below 70%.

Finally, in the worst-case scenario, if the fault is located close to source, the microcontroller

could signal for all three limiting elements to be used to keep the voltage from dipping

below 70%.

The sensitivity of the ISSFCL to voltage dips and the speed with which it can

respond to them could enable it to prevent the sympathetic tripping problem by ensuring

that the fault on a given feeder does not affect adjacent feeders in the time it takes for the

protection relay to isolate the fault. In addition, the limiting elements used neither increase

the cost of the ISSFCL nor reduce its selectivity and sensitivity.


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Figure 4.20 Schmatic for control devices

If the fault location is closer the voltage dip at fault location might drop below 80%

, in this case the control would sent two signals to two limiting element to limit the voltage

dip above 70 % according to the calculated values (voltage Divider) .The worst case is a

fault close to source in this case the control system will send three signals to the three

limiting element and keep the voltage dip above 70% regardless of the voltage dip on

effected feeder. In the last three scenarios we can see that ISSFCL try to protect the system

or source form the voltage dips at fault location in order the adjunct feeder would not

effected by another feeder fault by the time protection relay isolate the fault .The values of

limiting resistance are assumed for the generic model however it should be calculated for

each case or application .The huge value of limiting element would not affect the cost, it

also would affect the overall system protection selectivity and sensitivity. As we know, the

speed or the protection relays depends on the value of fault current and with limiting the

fault current limiting technology fault current should be calculated precisely.


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Figure 4.21 Schmatic for limiting devices on LT spice

LT spice is friendly software since it is cost is zero; on the other hand, we needed

to come up with some circuit to represent the microcontroller function. It is clear for

electrical engineer the using the potential transformer to reduce the voltage to

instrumentation level 5 V and the analog to digital conversion in order to make decision.

In our case we used RMS Detector and delay circuit to achieve the same function on

LTspice.

Fault Device

The fault was created using ideal switches at three different locations, and three levels

of system impedance were established between the source and the location of the fault. The

duration of the fault remained constant, however, and represented the minimum time that

the protection relay and breaker mechanism could take to isolate instantaneous overcurrent

of earth fault (80 ms). The fault parameters for the three resulting senarios were:

Tfault = 0.3

Tdur = 0.08


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Figure 4.22 Fault model used on LT spice


74

CHAPTER V

HYPOTHETICAL SYSTEM TEST

Simple Single-Phase Test System

The ISSFCL was tested on a simplified single line of a distribution feeder. The

source voltage was represented by the voltage source, and the internal resistance was 0.01.

The ISSFCL was installed after the main circuit breaker, which isolated the load during

maintenance and used the protection scheme to isolate the fault during disturbances. The

load was 1000 ohm, and three different fault points on the feeder—one close to, one at an

intermediate distance from, and one far from the source—were split with a 0.033 ohm

resistance. In the above Figure 10, VA is the source voltage, which had to remain above

70% to prevent a single-phase air conditioner on an adjacent feeder from stalling. VB is

the output voltage at the location of the ISSFCL, the closest point to the source and where

the fault current was the greatest. The fault was generated at VB, and the voltage at VA,

the Vrms, and the on/off signals to the switches were monitored.

In the first case, in which the feeder was split closest to the source, the voltages at

VA and VB dropped to zero before the protection clear is fault 80 ms. The control system

made a decision to insert the three-limiting element since the voltage dipped below 70% of

nominal. The ISSFCL was able to restore the Vrms and the voltage at VA within 30 ms

and protected the system from further voltage dips while the protection system cleared the

fault.


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Figure 5.1 Simplified test system upstream fault

Figure 5.2 Feeder, bus, and switches voltage (Case 1)

In the second case, in which the feeder was split at an intermediate distance from

the source, the controller activated just two limiting elements in response to the voltage at

VB. The fault was created at point VC, and because the voltage at point VV did not drop


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to zero, only two limiting elements were required to keep the voltage at VA above 70%. In

this case as well, the ISSFCL was able to act in under 30 ms.

Figure 5.3 Simplified test system mid-fault

Figure 5.4 Feeder, bus, and switches voltage (Case 2)


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In the third case, in which the feeder was split far from the source, the voltage dip

was limited to 80–90% of nominal voltage (Vrms).

Figure 5.5 Simplified test system downstream fault

Figure 5.6 Feeder, Bus, and Switches Voltage (Case 3)

According to IEEE, load devices are designed to withstand voltage dips in the range

of 10–90%. Because the control system signaled within 30 ms for the limiting elements to


78

be inserted, however, the ISSFCL was able to keep the source voltage above 90% until the

protection system cleared the fault. These results suggest that in addition to protecting

against short-term voltage dips, which many systems can, the ISSFCL can protect against

longer voltage dips and ensure rapid voltage recovery, thereby increasing the probability

that a system will endure a disturbance.

Three-Phase System Test

In this section, we used a three-phase system to test our new device and its impact

of load both on faulty and non-faulty feeders. The two monitored loads were installed: one

on faulty feeder 1 and the other on non-faulty feeder 2. Ae mentioned in case study section,

the Jizan power system was used to test the existing problem and we imposed the new FCL

on the same system to study the improvements on non-faulty feeder. As shown in Figure

1.2, the entire Jizan system was represented with source inductance and resistance while

the Sammtah substation was represented by two parallel and identical distribution feeders.

Figure 1 shows the test system without the ISSFCL while Figure 2 shows installed ISSFCL

on both feeders. The top feeder in Figure 1 is the faulty feeder and three locations ware

used to test the ISSFCL. The fault was created on three different location through feeder

1: upstream, mid, and downstream. On the bottom of Figure 1, feeder 2 is a non-faulty

feeder without fault, however its load behaviors were monitored as shown in next figures.

Those two circuit diagrams represent the unmodified system. The following figure (Fig. 2)

includes the modifying device, the ISSFCL. Figure 1 denotes the effected existing system

represented without the new limiting device. In contrast, Figure 2 reveals the effected

existing system represented with the new limiting device.


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Figure 5.7 Hypothetical Test System without ISSFCL

Figure 5.8 Hypothetical Test System with ISSFCL

The hypothetical system was tested through six cases; each case result is analyzed

and pinpointed. Those cases are: Case 1, a fault was created in the beginning of feeder 1

near the substation without a limiting device; Case 2, the same fault in case one was created,

however, it was with the new limiting device (ISSFCL); Case 3, the fault location was

pushed toward load in the middle of feeder 1 without any limiting device; Case 4, similar


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to case 3, but with the new limiting devices inserted at the beginning of distribution feeders

1 and 2. In Case 5, we tested the existing system behaviors by far ends fault need load

where voltage dip is minimum to test the system with limiting and check loads at end of

both feeders behaviors. Last is Case 6, which is identical to Case 5. However. the new

limiting device was inserted. The Nominal voltage and current of feeders and loads are

shown in Table 5.1.

Table 5.1 Rated Values of System Voltages and Feeders currents

Des. RMS

Source V RMS (V) 19.051

Source I RMS (A) 0.696

F1 I RMA (A) 0.261

F2 I RMA (A) 0.261

M1 I RMA (A) 13.65

M2 I RMA (A) 13.65

M1 S (V) 182.92

M2 S (V) 182.92

M1 T (V) 20.32

M2 T (V) 20.32

Figure 3 shows the existing system source voltage and current during fault that stayed in

the system for 100 ms before it was isolated by protection system, while Figure 4 shows

the same system source voltage and current during fault with inserted fault current limiter

device. Figure 4 reveals that the device was able to restore the system and current in 30 ms

while the protection system still working to isolate the fault.

It can be seen in Figure 3 that the system and adjacent feeder 2 would not suffer as

long as feeder 1; however, it is not present in Figure 3 and the voltage dip would be seen

longer by connected loads on feeder 1. The probability of loads on feeder 1 would be higher

compared to induction motor loads connected on feeder 2. As discussed in the literature


81

review, most single-phase motor loads need at least 80 ms voltage dip to stall. In both

cases, the source voltage dropped to zero and the fault current increased to 18KA; however,

in Case 2, the voltage and current was restored faster to avoid stalling on induction motors

load on Feeder 2.

Figure 5.8 Source Voltage and Current without ISSFCL (Case 1)

Figure 5.9 Source Voltage and Current with ISSFCL (Case 2)


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In Figure 5, which belongs to Case 1, shows both main feeder 1 and 2 currents and the

restoration time without limiting device. With a small difference of two current values due

to system impedance, both feeders suffer an increase in feeder load and stayed for the same

time as the fault stayed in the system. However, in Case 2, as shown in Figure 6, both

feeders current increased, but feeder 2 was able to recover to nominal faster and feeder 2’s

load would have less probability to trip by fault overcurrent protection because the fault

belonged to an adjacent feeder 1.

Figure 5.10 Feeder 1 and Feeder 2 currents without ISSFCL (Case 1)


83

Figure 5.11 Feeder 1 and Feeder 2 currents with ISSFCL (Case 2)

In Figures 7 and 8, last two feeder loads were captured- one of the faulty feeder (Fig. 7)

and the other of the non-faulty feeder (Fig. 8). It is clear that the feeder 2 load shows much

improvement and was able to restore faster than last feeder 1 load when ISSFCL was

installed.

Figure 5.12 Motor 1 and Motor 2 currents without ISSFCL (Case 1)

Figure 5.13 Motor 1 and Motor 2 currents with ISSFCL (Case 2)


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In Figures 9 and 10, the speed and torque of both last two loads on feeder 1 and feeder 2

are shown. Figure 9 highlights where no limiting was implemented that both motors suffer

the same torque increase and speed drop. Any speed drop of an induction motor lead would

reflect a drop in terminal voltage and such a load tends to keep constant power and, as

shown in Figure 9, a sudden increase of current demands represented by both motors torque

increase. Both end loads speed drop and torque increase stayed as long as the fault

continues in the system. However, in Case 2, as shown in Figure 10, a recovery of loads of

feeder 2 (non-faulty) will occur much faster with installed ISSFCL. In addition to faster

recovery of motor loads speed and torque compared to motor loads on faulty feeder, its

values were much lower than feeder 1 load. For example, the speed dropped to 0.8 pu and

the torque to 1.5 pu compare to 0.5 speed drop of load on faulty feeder and 3 pu increase

of load torque on faulty feeders. A summary of all case speed and torque of load on faulty

feeder versus load on non-faulty feeder are shown in Table 1.2. The table shows the

achieved improvement we gained by installing the FISSFCL to prevent stalling induction

motors and single-phase load air conditioners that prevents sympathetic tripping problem

as proposed. One additional advantage added by the new device is that the device helps the

system to reduce the stress much faster compared to a system without the limiting device

in all cases ISSFCL was used.


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Figure 5.14 Motor 1 and Motor 2 speed up and torque down (Case 1)


In these two cases, we tried to test the new designed device in a fault in the middle of the

distribution line and see the effect on adjacent feeder 2 loads. Cases 3 and 4 are mostly

identical to Cases 1 and 2; however, the fault location is different, the voltage dip is lower,

and the fault current even out limiting is lower. The ISSFCL also showed an improvement

not only on the different stresses that fault would impose on the system, such as voltage

dip and high current, but it helped to restore the nominal system voltage and current in

about 30 ms. It important to mention at this point that most protection system with breaker


86

time cannot act in less than 80 ms [1]. The new ISSFCL was able to act in 30 ms to reduce

the fault current and improve the system voltage by the time the protection system act and

isolate the system fault.

Figures 11 and 12 show both Case 3 and Case 4 source voltage profile during mid-

line fault and fault current without ISSFCL and with ISSFCL installed. There is not much

difference in voltage and current change; however, the interrupting time was greatly

reduced to 30 ms. The effect of limiting current and voltage dips on the source helped the

loads on feeder 2 (non-faulty) to recover faster and that reduce the probability of stalling

of air conditioner and induction motors load.

Figure 5.16 Source voltage and current without ISSFCL (Case 3)


87

Figure 5.17 Source Voltage and Current with ISSFCL (Case 4)

Figures 13 and 14 show the two main feeders loads during fault at 1 second; both feeder

currents increased during fault and did not restore its values before the fault was cleared,

as shown in Fig. 13. However, with the inserted limiting elements on the fault, the device

was able to limit the fault current as well as reduce the voltage dips on source bus voltage

and that tends to help all loads on feeder 2 to recover faster and avoid stalling. In fact, the

small motors are able to overcome short time interruption if it is less that 5 to 8 cycles [1].



88


In Figures 15 and 16, the load current is shown for the load on faulty feeder 1 (Fig. 15) and

load current of load on non-faulty feeder 2 (Fig. 16). The main difference in mid line fault

case is the speed to recover. The load current on non-faulty feeder was able to recover in

the time the ISSFCL was acted.



89

Figure 5.21 Motor 1 and Motor 2 Currents without ISSFCL (Case 4)

Figures 17 and 18 show the loads at the end of feeder 1 and feeder 2 speed and torque

changes. As seen in these figures, the system without limiting both the loads on faulty and

non-faulty tends to drop speed and increase the torque with the same values and recovers

at the same time. However, with the existence of ISSFCL load on non-faulty feeder, this

feeder suffers less speed drop and much less torque increase and load and was able to

recover within 30 ms of incident.



90


Downstream fault was the last two cases to test the new device (ISSFCL). As shown in

Figures 19 and 20, there is not much voltage dip and fault current on the source substation,

which is also the case for adjacent feeder 2. The far end feeder fault might affect the

protection coordination setting; however, it not the case with our system. In the system

where far end feeder fault current is lower than 20, this is critical since the ISSFCL would

add more resistance to the fault current that might stop the protection system for acting to

clear system fault. With our new device (ISSFCL), we consider that point where we give

the protection system engineer the opportunity to change the device limits and choose the

values of limiting elements according to each feeder and substation case by case. Figures

19 and 20 show the fast acting ISSFCL to limit the fault current and the ability of the

system to recover faster.


91

Figure 5.24 Source voltage and current without ISSFCL (Case 5)

Figure 5.25 Source voltage and current with ISSFCL (Case 6)

Figures 21 and 22 show the two feeders load increase without ISSFCL and with ISSFCL.

The system was able to restore its voltage and current in 30 ms with ISSFCL compared to

the existing system.


92



Figures 23 and 24 show the last two loads on both faulty and non-faulty feeders currents.

Both loads suffered an increase of current with much less difference; however, with the

inserted ISSFCL, the load on non-faulty feeder was able to recover in a short time where

stalling of load can be avoided.


93


Figure 5.29 Motor1 and Motor 2 Currents with ISSFCL (Case 6)

In figures 25 and 26, both loads at the end of feeder 1 and feeder 2 were compared without

limiting, as in Fig. 25, and with limiting, as in Fig. 26. As shown in Fig. 26, bottom speed

and torque of non-faulty feeder was able to overcome the interrupting without much drop

of speed neither increase in motor torque. It can be seen that the existing system would

suffer a huge change of motor loads speed and motor torque increase without limiting the

fault current while the figures also show that ISSFCL was able to improve that aspect,


94

which will lead to a much more stable system and prevent tripping of non-faulty feeders

during fault on adjunct feeder.


Figure 5.31 Motor 1 and Motor 2 speed up and Torque Down (Case 6)

The next two tables show the nominal voltage and current values of existing system before

fault (Table 5.1) and the last load on feeder 1 speed and torque versus the last load on

feeder 2 speed and torque (Table 5.2).


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Table 5.2 Summary of cases Motor 1 versus Motor 1 (Speed and Torque with and

without ISSFCL)

In conclusion, we can report that any power system in the world with a high

penetration of single-phase air conditioners is exposed to Sympathetic Tripping Problem.

The two root causes of STP is huge and lone voltage dips and stalling of air conditioner

loads. Fault current limiting is a visible way to prevent STP. PVQV tools play an important

role to identify the wreaks buses and the need to limit the FCL. A new Solid-State device

was designed and modeled on LTspice. Sympathetic tripping problem could be prevented

using ISSFCL. There is a huge need to speed the distribution transformers response to

voltage transients using new Intelligent Solid-State Distribution Power Transformers.


96

CHAPTER VI

CONCLUSION AND CONTRIBUTION

Power systems must meet many conditions to ensure voltage stability. One

condition is that they must keep the system voltage as close as possible to nominal both

before and after disturbances. Doing so helps to limit devices from stalling, thereby limiting

voltage drops. To help keep the system voltage close to nominal, faster and smarter tap

changing and systems that respond more quickly to load demand are needed. The goals of

our future work are to design, simulate, build and test smart limiting current devices and a

smart tap changer for power transformers. Such a solid-state device could be employed at

the farthest points downstream, near customers’ energy meters. It could also be used in

place of additional transformers, helping utilities to extend their low-voltage lines (< 250

m) and accommodate additional customers.

Contributions

The research in this dissertation and device design and application has several

contributions to the electoral engineering field. The greatest contributions are as follows:

ISSFCL could be used to limit the voltage dip by limiting fault current using both RMS

current and RMS voltage in real-time sampling.

ISSFCL is a multilevel-limiting device which helps to pin-point fault locations

depending on how many switches are off during fault limiting and reduces the

patrolling time.

ISSFCL is intelligent in making decision and programmable. A software engineer

could program it according to distribution line length and system impedance.


97

ISSFCL could be used in a single fault current limiting and three-phase fault current,

which makes it able to interrupt the three-phase at zero voltage crossing if programmed

(taught) to do so.

ISSFCL could replace the auto-re-closer on distribution level and it would achieve the

same goals.

Conclusion

An intelligent solid-state fault limiter to limit high fault current and limit voltage

dips to 80% during system disturbances to prevent the Sympathetic Tripping problem in

power and energy systems. High levels of fault current, large voltage dips, and the stalling

of devices connected to the system are the root causes of the Sympathetic Tripping

Problem. For this reason, reducing fault-current levels, quickly regulating voltage, and

using reactive power support are the best ways to avoid the Sympathetic Tripping Problem.

To reduce fault-current levels, voltage-versus-reactive power curves should be generated

and reviewed for all buses to determine the level of fault current each bus can tolerate and

its operating point during disturbances. Additionally, voltage-dip limits need to be

considered in determining the fault-current limit for each bus. The voltage-stability limit

should be estimated using P-V and Q-V, and it should factor in the minimum-voltage limit.

Rapid fault clearing and fault-current reduction can be achieved using resistive grounding

systems and fault current limiters. A solid-state fault current limiter is proposed to be

connected in source grounding instead of solidly grounded/resistively grounded sources to

reduce the power losses and avoid voltage drop and the switching technique.

By reducing fault-current levels and voltage dips, such a limiter could enable large

motors to withstand faults without tripping, thereby reducing the probability that a single


98

line-to-ground fault will cause more severe, multi-phase faults. Static VAR compensators

are also a potential solution to the Sympathetic Tripping Problem, but their use requires

further study because they can run beyond their limits, stall, and exacerbate voltage dips;

thus, using synchronous condensers is a better solution.

In this study, a new type of intelligent solid-state device was designed that uses a

microcontroller to drive solid state switches capable of limiting voltage dips on power

systems. This device, the ISSFCL, was then modeled and simulated using LTspice.

The ISSFCL can limit fault current significantly faster than can other protection systems—

within 30 microseconds—and, like other FCLs, it can limit the current after system

upgrades and protect equipment from thermal stress during short circuits. Unlike other

FCLs, however, the ISSFCL can limit voltage dips because it monitors both the current

and the voltage. For this reason, the ISSFCL is uniquely capable of solving the Sympathetic

Tripping Problem, in which no faulty devices or feeders’ trip as the result of voltage dips

caused by fault current on adjacent feeders. In addition, because it flips only the number of

switches necessary to maintain the appropriate voltage—up to three—the ISSFCL can

indicate where in the system the fault is occurring.

One drawback of the ISSFCL is that existing solid-state technology (specifically

IGBT) currently limits it to high voltage and high current applications. In addition, a binary

sequence could be used to reduce the number of switches the ISSFCL uses, and thus its

cost, but the induction of voltage across the IGBT switches must first be considered. Since

the time range of solid-state switches is much faster than existing automatic circuit breaker,

which is in milliseconds at low/medium voltage and the frequency of operation is lower,


99

the thermal capability of a solid-state switch is of more importance than switching

frequency.

Future Work

A smart solid-state tap changer must be developed to replace traditional, motorized

tap changers at different voltage levels and, this goal can be achieved by developing smart,

fast tap changers that use microcontrollers and solid-state switches to regulate high-side

voltage for power transformers.

Due to the presence of massive amounts of single-phase air conditioners, weak

power systems must solve two problems to ensure voltage stability. The first problem is

keeping the system voltage near the stability limit both before and after disturbances.

Keeping the system voltage as close as possible to nominal helps to limit the number of

stalled air conditioners, thereby reducing voltage drops and the power losses they cause.

To help keep voltages close to normal, faster and smarter tap changing and systems that

respond more quickly to load demand are needed. Our future work is to design, simulate,

build, and test a smart tap changer for power transformers. Such a changer could be

employed at the farthest points downstream, near customers’ energy meters. It could also

be used in place of traditional transformers, helping utilities to extend their low-voltage

lines (<250 m) to accommodate additional customers.

Manual tap changing does not achieve fast reactive power support at medium and

high voltage levels. Replacing the traditional, motorized tap changer with a smart/solid-

state tap changer in distribution and transmission would help to regulate bus bar voltage

before and after disturbances. Fast voltage regulation and reactive power support can be


100

accomplished more quickly in two ways. The first way is to drive a tap changer with a

microcontroller and solid-state-based switches instead of with the mechanism used by

manual tap changers.

Power systems must meet many conditions to ensure voltage stability. One

condition is that they must keep the system voltage as close as possible to nominal both

before and after disturbances. Doing so helps to limit devices from stalling, thereby limiting

voltage drops. To help keep the system voltage close to nominal, faster and smarter tap

changing and systems that respond more quickly to load demand are needed. Some goals

of our future work are to design, simulate, build, and test smart limiting current devices

and a smart tap changer for power transformers. Such solid-state devices could be

employed at the farthest points downstream, near customers’ energy meters. It could also

be used in place of additional transformers, helping utilities to extend their low-voltage

lines (< 250 m) and accommodate additional customers.

Finally, system voltage needs to be regulated more quickly. This goal can be

achieved by developing smart, fast, solid tap changers that use microcontrollers and solid-

state switches to regulate high-side voltage for power transformers. When systems are

operated near their voltage stability limits, stalled ACs can cause voltage dips that initiate

sympathetic tripping. One way to solve this problem is to limit fault current by grounding

systems resistively instead of solidly.


101

WORKS CITED

[1] Prabha Kundur. “Power System Stability and Control “Book, EPRI 1993, McGraw-

Hill, Inc.

[2] Jeff R, Terrence S, Andres R. “Sympathetic Tripping Problem Analysis and Solutions

“SEL 2002, USA.

[3] Bradley R. Williams, Wayne R. Schmus, Douglas C. Dawson. “Transmission Voltage

Recovery Delayed by Stalled Air Conditioner Compressors “IEEE transaction on

power systems, Vol. 7, No.3, August 1992.

[4] Ozair H.Mirza. "Usage of CLPU Curve to Deal with the Cold Load Pickup Problem"

IEEE Transaction on Power Delivery, Vol.12. No.2, April 1997.

[5] George G. Karady, Saurabh Saksena, Baozhuang Shi, Nilanjan Senroy. “Effect of

Voltage Sags on Loads in Distribution System “PSERC Publication 05-63, October

2005.

[6] Ismail Hamzah, Jamal Yasin. “Static VAR Compensators (SVC) Required to Solve the

Problem of Delay Voltage Recovery Following Fault in the Power System of the

Saudi Electricity Company, Western Region (SEC-WR)” Saudi Electricity

Company, Western Region, Jeddah, K.S.A.

[7] S. Saksena, B. Shi, G. Karady. “Effects of Voltage Sags on Household Loads ‘Arizona

Public Service Co., Arizona, USA, 0-7803-9156-Xl05, IEEE 2005

[8] Agili Boker, Abdul Aziz Mohammad, Kamal Hosam. “Prevention of Sympathetic

Tripping Phenomena on Power System by Fault Current Level Management “IEEE

T&D Conference 2008, Chicago, USA, 978-1-4244-1904-3/08/$25.00 ©2008

IEEE

[9] Prem K Naik, Nirmal K-C Nair, Valeriy Vyatkin. “Sympathetic Trip Protection

Scenario in IEC 61850” University of Auckland, Auckland, New Zealand.

[10] Mikael Wamundson. “Calculation Voltage dips in power Systems using Probability

Distribution of dip durations and implementation of the Moving Fault Node method

“Chalmers University of Technology, Goteborg, Sweden, 2007.

[11] John A. Diaz de Leon II, Carson W. Taylor. "Understanding and Solving Short Term

Voltage Stability Problems "American Superconductor, Comments in FERC

AD05-1, April 4, 2005.

[12] Jennett Kyle, Booth Campbell, Lee Martin. “Analysis of Sympathetic Tripping

Problem for Network with High Penetration of Distributed Generation” ‘APAP, The


102

international Conference on Advanced Power System Automation and protection,

2011.

[13] S. Orpe, Nirmal-Kumar. “State of Art of Fault Current Limiters and their Impact on

overcurrent Protection Department of Electrical and Computer Engineering, The

University of Auckland, New Zealand, 978-1-4244-4241-6/09/$25.00 ©2009

IEEE.

[14] P. M. Duggan. “Utility Perspective of Fault Current Limiters and Expected Synergies

from Integrating Fault Current Limiters with Superconducting Cables,” in Conf.

Rec. 2008 IEEE Int. Conference Power and Energy Society General Meeting pp.1.

[15] “High Fault Currents”, Queensland Government, Department of Industrial Relations

2003. Available: http://www.deir.qld.gov.au/pdf/eso/highfault_brochure2003.pdf

[16] CIGRE Working Group. “Guideline of the impacts of Fault Current Limiting Devices

on Protection Systems”. CIGRE publishing, Vol A3.16, February 2008. Standard

FCL and Cigre.

[17] CIGRE Working Group. “Fault Current Limiters in Electrical Medium and high

Voltage Systems”. GIGRE publishing, Vol A3.10, December 2003.

[18] Noe, M., Eckroad, S., Adapa, R. “Progress on the R&D of Fault Current Limiters for

Utility Applications,” in Conf. Rec. 2008 IEEE Int. Conference Power and Energy

Society General Meeting pp.1-2.


103

BIBLIOGRAPHY

Boker, Agili, Abdul Aziz Mohammad, and Kamal Hosam. “Prevention of Sympathetic

Tripping Phenomena on Power System by Fault Current Level Management.”

IEEE T&D Conference 2008, Chicago, USA: 2008.

CIGRE Working Group. “Fault Current Limiters in Electrical Medium and high

Voltage Systems.” GIGRE Publishing, Vol A3.10, December 2003.

CIGRE Working Group. “Guideline of the impacts of Fault Current Limiting Devices

on Protection Systems.” CIGRE Publishing, Vol A3.16, February 2008.

Diaz de Leon II, John A., and Carson W. Taylor. "Understanding and Solving Short Term

Voltage Stability Problems.” American Superconductor, Comments in FERC

AD05-1, April 4, 2005.

Jeff, R., S. Terrence, and R. Andres. “Sympathetic Tripping Problem Analysis and

Solutions.” SEL, USA, 2002.

Hamzah, Ismail, and Jamal Yasin. “Static VAR Compensators (SVC) Required to Solve

the Problem of Delay Voltage Recovery Following Fault in the Power System of

the Saudi Electricity Company, Western Region (SEC-WR).” Saudi Electricity

Company, Western Region, Jeddah, K.S.A.

“High Fault Currents.” Queensland Government, Department of Industrial Relations,

2003. Available: http://www.deir.qld.gov.au/pdf/eso/highfault_brochure2003.pdf

Karady, George G., Saurabh Saksena, Baozhuang Shi, and Nilanjan Senroy. “Effect of

Voltage Sags on Loads in Distribution System.” PSERC Publication, October

2005.

Kundur, Prabha. “Power System Stability and Control.” EPRI, McGraw-Hill, Inc., 1993.

Kyle, Jennett, Booth Campbell, and Lee Martin. “Analysis of Sympathetic Tripping

Problem for Network with High Penetration of Distributed Generation.” APAP,

The International Conference on Advanced Power System Automation and

Protection, 2011.

Mirza, Ozair H. "Usage of CLPU Curve to Deal with the Cold Load Pickup Problem"

IEEE Transaction on Power Delivery, Vol. 12. No. 2, April 1997.

Naik, Prem K., Nirmal K-C Nair, and Valeriy Vyatkin. “Sympathetic Trip Protection

Scenario in IEC 61850.” University of Auckland, Auckland, New Zealand.

Noe, M., S. Eckroad, and R. Adapa. “Progress on the R&D of Fault Current Limiters for


104

Utility Applications.” IEEE International Conference Power and Energy Society.

General Meeting. Found in conference record, 2008 pp.1-2.

Orpe, S., and Nirmal-Kumar. “State of Art of Fault Current Limiters and Their Impact on

Overcurrent Protection.” Department of Electrical and Computer Engineering,

The University of Auckland, New Zealand, IEEE, 2009. 978-1-4244-4241-6/09/

P. M. Duggan, P. M. “Utility Perspective of Fault Current Limiters and Expected

Synergies from Integrating Fault Current Limiters with Superconducting Cables.”

IEEE International Conference Power and Energy Society. Found in conference

record, pp.1

Saksena, S., B. Shi, and G. Karady. “Effects of Voltage Sags on Household Loads.”

Arizona Public Service Co., Arizona, USA, 0-7803-9156-Xl05, IEEE 2005.

Wamundson, Mikael “Calculation Voltage Dips in Power Systems Using Probability

Distribution of Dip Durations and Implementation of the Moving Fault Node

Method.” Chalmers University of Technology, Goteborg, Sweden, 2007.

Williams, Bradley R., Wayne R. Schmus, and Douglas C. Dawson. “Transmission

Voltage Recovery Delayed by Stalled Air Conditioner Compressors.” IEEE

Transaction on Power Systems, Vol. 7, No. 3, August 1992.

Intelligent Solid-State Current Limiter to Prevent Sympathetic ...

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