Intel® System Debugger within Intel® System Studio 2016
Intel® System Debuggerwithin Intel® System Studio 2016
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Agenda
1) Intel® System Debugger 2016
2) Intel® System Debugger for Internet Of Things
3) Getting Started: The System Debugger
4) Getting Started: UEFI Debug
5) Getting Started: The System Trace Using Intel® Trace Hub Technology
6) Summary
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Key Features• Linux* and Windows* host
• JTAG debug for Intel® Atom, Core™, Xeon® & Quark SoC-based platforms
• EFI/UEFI Firmware, bootloader debug, Linux* OS awareness and Kernel module debug
• Full CPU register description and bitfield editor
• Access to page translation and descriptor tables
• LBR, IPT On-Chip instruction trace support, SMP run control support
• JTAG debug & instruction trace to Microsoft* WinDbg* kernel debugger 1 NEW
• System Trace: System-wide hardware and software event trace 2 NEW
Intel System Debugger 2016 - SummarySource level Debugger and System Trace
1 Intel System Studio for Windows Target version support it. 2 System Trace is only Supporting 6th generation core
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Intel® System Debugger 2016 - New Features
1. JTAG debug & instruction trace to Microsoft* WinDbg* kernel debugger 1
• Helps to isolate tricky Windows* driver issues during board-bring up
• Intel® Processor Trace support in WinDbg* kernel debugger helps isolating complex run-time issues
1 Intel System Studio for Windows Target version support it.
HardwareMicrosoft* WinDbg*over JTAG
JTAG,JTAG over USBExecution Trace Viewer
for Intel® Architecture
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Intel® System Debugger 2016 - New Features
2. System Trace(Intel® Trace Hub) : System-wide hardware and software event 2
• Understand complex interaction between hardware and software faster
• Time-stamp correlated trace information
3. Closed Chassis Debug 3: closed chassis with no access to onboard debug hook
Intel® VST Closed Chassis Adapter(CCA**): Debug & trace from CPU reset
Closed Chassis Target
Host
2 System Trace is only Supporting 6th generation core.3 USB DbC is only in the NDA version.
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Supported Formats & Software
Object File formats:
• ELF/DWARF from GCC/ICC Compilers
• PE/COFF+PDB from Microsoft Compilers
• Multiple simultaneous modules / mixed formats
Linux-specific Features:
• Auto-detect Kernel Module load/unload
• Kernel Data structure viewer
• Includes kernel threads, process list, process address space, and more.
EFI-specific Features:
• Load sources for PEI, DXE, and SMM modules (by address)
• Agent-based debugging without JTAG…
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Supported Target Connection MethodsThe debugger can connect via multiple methods:
Dfx Abstraction Layer API • for current Intel® Atom™ Processor, Intel® Quark SoC, Intel® Core™ Processors, Intel® Xeon™
Processors: connect via conventional JTAG using ITP-XDP3 probe • for 6th Generation Intel® Core™ Processor Family code-named Skylake: connect via DCI 2.0 over the
JTAG using the Intel® SVT Closed Chassis Adapter (CCA)
TCI API for older Intel® Atom™ Processors • Connect via conventional JTAG using ITP-XDP3 probe.
OpenOCD* API for Intel® Quark SoC• Connect via conventional JTAG using low-cost JTAG probe (e.g. Olimex*, Flyswatter*)
Agent-based UEFI DebuggerDebug of UEFI firmware over USB/Serial using a target-side agentDeployable on production hardware (no JTAG port)Debug SEC/PEI/DXE with burned-in agent, or soft-load agent for post-shell work
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User experience is identical regardless of target access method
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Intel® System Debugger for the Internet of Things
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Intel® System Debugger for the Internet of Things
Deep Insights into memory and system configuration Fast issue resolution with low-level system debuggers
The only complete system debug solution for the Intel based Internet of Things• JTAG based bootloader, OS and device driver debug
• Agent based UEFI debug
• In depth visualization of memory configuration, system state and register sets
• Common debugger front-end for all debug protocols
OpenOCD*
Dfx Abstraction Layer
Example: Galileo,Intel® Quark SoC X1000
Example: Bayley Bay,Intel® Atom™ Processor E3800
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Intel® System Debugger and Intel® Quark SoC (1)
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Supported Devices:Intel® ITP-XDP3
Go to https://designintools.intel.com/, select the Debug Tools product
category and add ITP-XDP BR3 to your cart.TinCanTools* FLYSWATTER2
Go to http://www.tincantools.com/wiki/Compiling_OpenOCDOlimex* ARM-USB-OCD-H
Go to https://www.olimex.com/Products/ARM/JTAG/ARM-USB-OCD-H/
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Intel® System Debugger and Intel® Quark SoC (2)
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Recommended setup for debugging with OpenOCD*• Host System• USB 2.0 male-male A-B cable• JTAG Probe• ARM-JTAG-20-10 Adapter• JTAG Port• Intel® Galileo Board• Serial Cable to view boot process• Power Supply
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Getting Started: The System Debugger (JTAG)
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Getting Started The System Debugger
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Step 1: Open the folder where Intel® System Debugger was installed
Step 2:Select a startup script and launch it - Batch files.
Step 3:Connect to your target using the “Connect” button (or Ctrl-R)
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Standard Debugger Features
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Breakpoints
Program State
Multiple Source Files
CPU Structures Execution Trace
Syntax-highlights
And more!
Linux & EFI Support
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Initial Startup & overview
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Assembly Window
Console Window
Displays status messages (keep it open!)
Command-driven operation also possible
Toolbars / Menus
Most functions available from menus & buttons
Connect/Disconnect
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Connecting To Targets
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Step 2: Select your probe
Step 1: Click the
connect icon
Step 3: Select your target platform
Step 3a (optional): Enter advanced
connection parameters
Step 4: Connect!
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Target Run Control
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ASM step over
ASM step into
Run until caller
Step program until next source line
Restart target Halt execution
Resume Execution
Step Over function call
Run Control
•Run/stop the CPU
•Step into, over, out
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Multiple HW threads
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The debugger can display how the multiple logical cores are used andindicate which logical core is used by the current code displayed.You can select a logical core and continue debugging the SW running there.
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OS Debug – Getting Started
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Loading the symbols
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Browse to find the identical binary file as Loaded on the target.
Download = download into Target RAM. Do not tick this ifYou will debug SW alreadyon the target
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How to find the sources
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The debugger will try to find the source file which matches the current instruction pointer.If it cannot find the file it will ask you to do a manual search.
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Select source files to view
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With the ‘Source Files’ icon you can open awindow which contains the source tree as foundin the binary file loaded in the debugger. Just double click on any of the source file names to open the file in the source window.
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Evaluate symbols
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Hover the cursor over a variable and the debugger will show you its value
Highlight a variable and use the ‘right mouse click’ – additional options are now available
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Local variables
The example above shows part of the ‘rq’ structure
In expression field indicate that this is a compound element and that it has beenExpanded ( > for not expanded)
Local variable window willdisplay all variables whichare accessible from withincurrent scope
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How did I reach the current location?
Source file: line number
Current file
Function tree – bottom upOnly address presented when no debug information available
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Create a breakpoint
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Minimum - code location is required.Hard option allows you to set a breakpoint even if the memory location is notaccessible
For Watchpoints the location, access type and length are important
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Debugging loadable modules
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There is a Linux kernel module [xdbntf] provided with the debugger which you canbuild and install – you then can load & debug Linux kernel modules and device drivers
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Inspecting Android* & Linux* Kernel State
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View all kernel thread with process id, current state, active flags, launch arguments and call tree dependency.
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What happened?Inspecting System State
Intel System Debugger presents state in a “Human Readable” formatRelationships: “show the nesting of structure members”High-level decode: “show the names of bits in a register”Context: “show the documentation for a register”
Program State:Memory contents -> “Memory Window”Program State -> “Locals Window / Eval Window”
CPU State:General and Extended RegistersPage TablesIA CPU data structures (GDT, IDT, LDT)
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Overview of State Windows:
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Execution Trace
Linux Kernel State
PCI Topology & Devices
Processor Structures
Page Tables
Callstack & HW Threads
Program Variables
Memory & Registers
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Program State:
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“Locals” Window
Program state for the
currently selected callstack
frame
Callstack Window
Show call stack for the currently
selected hardware thread
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CPU State: Register Windows
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GP RegistersCPU Registers
Model-Specific Registers
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CPU State: Detailed Register View
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Text Documentation
Bit-level Breakdown
Set/Restore Values
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What about paging?
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Double click on a page table/directoryentry and You will have the ability tomodify the attribute bits with thebit field editor
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Virtual -> physical address mapping
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Select an address and press Translate to find the address mapping.When you press OK the page directory/table involved will be shown in the Paging window
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Execution Trace
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System Debugger Execution
Trace Viewer
System Debugger supports execution trace via:Intel Processor Trace (Intel PT)Last-Branch Record (LBR)
Trace data is presented as C source code, view is integrated with other source debug featuresUser is not concerned with underlying mechanism, it “just works”
Trace
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Execution Trace GUI Overview
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Execution Trace GUI is fully integrated with source
debug, user can view trace data simultaneously with
source, ASM , callstack…
Execution Trace history
ASM windowSource window
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Execution Trace Features
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Expand source linesto reveal assembly
Jump to this line’ssource file orinstruction
Keep source and/orassembler windowin-sync with tracewindow
Clear trace buffers
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Execution Trace Features (continued)
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Colors indicating how recentlythe instruction/line was executed
“+” indicatesmultiple hits
Coloring can be configured in Options -> GUI Preferences
Intuitivefollowing ofexecution flow
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PCI Scan Tool Technology Preview
Scan for devices, display device-specific registers:
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Getting Started: UEFI Debug
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UEFI Debug – Getting Started
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EFI BIOS Support
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General EFI Features:
Source-level debug in any phase of EFI, from reset to OS boot
Load symbols for all or selected modules
Simultaneous debug of MSVC and GCC-built modules
Passive mode (interrogation-based):
Inspect target memory to locate modules, load symbols
Can be used on production BIOS
Requires JTAG
Active Mode (agent-based):
Receive notifications from agent as modules are loaded/unloaded
Break at init of a named module, regardless of load position
Requires debug agent “SourceLevelDebugPkg” in EDKII
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Stepping into BIOS code…Before we can load symbols/source for EFI we need to be in protected modeUsing the Assembly-level Run Control features you can step from the reset vector to the jump to protected mode:
You can also use the context menu in the ASM window:
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Loading Symbols for EFI BIOS
Once in protected mode we can use an System Debugger function to load symbols for EFI: “loadthis” command
Key to EFI debug: searches memory for a relocatable EFI module, uses module metadata to locate debug symbols & sources
Works in all phases of EFI (SEC, PEI, DXE)
Searches from the current IP or from the a supplied address
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Debugging in SEC with sources:
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Once System has symbols loaded it can locate source code for the current instruction point.Both Source and ASM-level run control is now possible:
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Setting a Breakpoint in Source Code
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Using the context menu: set a breakpoint on a source line
Using the “Source Files” window: find and open a specific file
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Run to your Breakpoint!
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Getting Started: The System Trace Using Intel® Trace Hub Technology
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Getting Started The System Trace Using Intel® Trace Hub Technology
Intel Trace Hub:
A set of silicon features with software APIs
Supports multi-source: hardware, software, firmware and BIOS traces (system level debug)
Single output stream with time-correlated to each other
Uses DCI 2.0 (Direct Connect Interface) as primary debug transport.
Direct Connect Interface(DCI) 2.0:
JTAG Access & Run Control (Probe Mode)
Closed Chassis Debug at S0 & Sx-State
System Tracing with Intel® Trace Hub
DCI 2.0 is available in the 6th
Generation core – Skylake.
DCI 2.0 supports 2 topologies:
BSSB Hosting (with Intel® SVT Closed Chassis Adapter)
USB 3.0 Hosting (with USB 3.0 cable) 1
1 NDA version support USB 3.0 Hosting (USB DbC).
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Architecture
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Intel® System Debugger System Tracing
Host SystemTarget System
Decode the trace log packet and display
Software/ Firmware
Trace Sources
IA Cores
FW Cores
Chipset Cores
Intel® Trace Hub Hardware Block
Intel Trace Hub
Hardware Trace
Sources
Direct Connect Interface
BSSB/ USB 3.0
Port
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Configuration
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Hardware required:Intel® SVT Closed Chassis Adapter
Software required: Intel® System Debugger:
System Trace
Run Control
JTAG
Sx-State Control
DFx
DFx
DFx
BSSB Mgr DCI
BridgeLogic
P
H
YUSB3
Host Target (Closed chassis)
Trace
USB3 Hosting DCI**:For S0-State access and high
performance operations
BSSB Hosting DCI:For lower power (Sx-
State) & S0-State access
DCI 2.0 Supported
USB Port
USB Port
USB Port
USB Port
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Hardware Requirement for DCI
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Intel® SVT Closed Chassis Adapter (CCA) provides a subset of ITP features through USB 3.0 ports out from Intel silicon. Intel® SVT CCA (MM#:921521) can be purchased (costs $390 each) through Intel® Design-In Tools Store (IBL account log-in required) at https://designintools.intel.com/product_p/itpxdpsvt.htm
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System TraceGetting Started1. Download latest Intel® System Studio 2016 Ultimate Edition:
http://intel.ly/system-studio
2. Run installer
3. Default Location:
C:\Program Files (x86)\IntelSWTools\System Debugger
2016\system_trace
4. Intel® Trace Hub perspective to Eclipse IDE.
C:\Program Files (x86)\IntelSWTools\eclipse\eclipse.exe
Intel® System Debugger includesSystem Trace, Eclipse* IDE, DCI Driver
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System TraceGetting Started
System Trace is simply another perspective to a standard Eclipse* IDE
Open Perspective > Other …
Use your own Eclipse* IDE, or the one provided
with the installer
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Select System Trace Perspective
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System TraceEstablish Target Connection
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And Connect
Select TargetConnection Type: CCA
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After the steps for Configure Target Connection are completed,
the Trace Capture view enables the Begin capturing trace data from target button, asshown here:
Click on the Begin capturing trace data from target button to start the trace captureprocess. The following loading screen appears:
System TraceCapturing Trace Data
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you will then see trace messages arriving in the System Trace, received from the target:
System TraceReceiving Trace Data
Trace DecoderTrace Output with
Time-stampedTrace SourcesCaptured Session
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Summary
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Intel® System Debugger is
• Intel’s system software debug solution for UEFI BIOS, firmware, bootloader, OS and device driver debug.
• Intel’s system software trace solution for complex hardware/software interaction visible isolate tricky software bugs quicker
• It supports JTAG via ITP-XDP3 / DCI hosting BSSB / USB3• It supports UEFI BIOS debug via EDKII debug agent and JTAG• It is available as part of Intel System Studio in public and NDA versions
Find out more at http://intel.ly/system-studio
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Legal Disclaimer & Optimization Notice
INFORMATION IN THIS DOCUMENT IS PROVIDED “AS IS”. NO LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. INTEL ASSUMES NO LIABILITY WHATSOEVER AND INTEL DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY, RELATING TO THIS INFORMATION INCLUDING LIABILITY OR WARRANTIES RELATING TO FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT.
Software and workloads used in performance tests may have been optimized for performance only on Intel microprocessors. Performance tests, such as SYSmark and MobileMark, are measured using specific computer systems, components, software, operations and functions. Any change to any of those factors may cause the results to vary. You should consult other information and performance tests to assist you in fully evaluating your contemplated purchases, including the performance ofthat product when combined with other products.
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Optimization Notice
Intel’s compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.
Notice revision #20110804
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