intel 8088

INTEL 8088

Presented by—• Nilotpal chakraborty, B.Tech(IT) 5th sem,

Roll No-12, AUS

• Nilu Das, B.Tech(IT) 5th sem, Roll No-13, AUS

CONTENTS

HistoryFeaturesArchitectureSummary

HISTORY

• Released in the year 1979

• A version of Intel 8086 with an 8 bit data bus

• Used in the original IBM PC

FEATURES

• Compatible to 8080/8085/8086

• 8-bit data bus width

• Frequency: 5-10 MHz

• Supports Intel 8087 numeric co-processor

• Memory

• Interrupts

• I/O ports

• Registers

• Instruction set

• Addressing Modes

ARCHITECTURE OF 8088

MAXIMUMMODE

MINIMUMMODE

1 40

20 21

8088

GND

A14

A13

A12

A11

A10

A9

A8

AD7

AD6

AD5

AD4

AD3

AD2

AD1

AD0

NMI

INTR

CLK

GND

Vcc

A15

A16,S3

A17,S4

A18,S5

A19,S6

MN,/MX

/RD

/RQ,/GT0

/LOCK

/S2

/S1

/S0

QS0

QS1

/TEST

READY

RESET

/RQ,/GT1

HOLD

/WR

IO/M

DT/R

/DEN

ALE

/INTA

HLDA

high /SS0

Pin configuration of Intel 8088

TemporaryRegisters

ALU

Flags

EUControl

AH AL

BH BL

CH CL

DH DL

SP

BP

DI

BI

CS

DS

SS

ES

IO

InternalCommunications

Registers

SUMMATION

Address Bus 20 bits

Data Bus

BusControl

1 2 3 4

Instruction Queue

8088Bus

EU BIU

Internal organization of 8088

MEMORY• The 8088 uses the same segmented memory addressing as the 8086:

– Can address 64KB of memory directly

– Address more than 64 KB of memory

• the CPU has to break the update into a few parts - update up to 64 KB of

memory, change segment register, update another block of memory,

update segment register again, and so on.

MEMORY contd…

• Program memory – – program can be located anywhere in memory. – Jump and call instructions can be used within 64 KB to 1 MB of

memory.

• Data memory – – the processor can access data in any one out of 4 available

segments• Data• Code• Stack• Extra segments.

• Stack memory – can be placed anywhere in memory.

INTERRUPTS

The processor has the following interrupts: • INTR

– maskable hardware interrupt– enabled/disabled using STI/CLI instructions or using more

complicated method of updating the FLAGS register with the help of the POPF instruction

– Interrupt processing routine should return with the IRET instruction

• NMI– non-maskable interrupt– processed in the same way as the INTR interrupt– higher priority

INTERRUPTS contd…

• Software interrupts can be caused by: – INT instruction - breakpoint interrupt. This is a type 3

interrupt. – INT <interrupt number> instruction - any one interrupt from

available 256 interrupts. – INTO instruction - interrupt on overflow – Single-step interrupt - generated if the TF flag is set. This is a

type 1 interrupt. When the CPU processes this interrupt it clears TF flag before calling the interrupt processing routine.

– Processor exceptions: divide error (type 0), unused opcode (type 6) and escape opcode (type 7).

• Software interrupt processing is the same as for the hardware interrupts.

I/O ports

• 65536 8-bit I/O ports• can be also addressed as 32768 16-bit I/O

ports• Values in the I/O space are accessed with IN

and OUT instructions

REGISTERS

The processor uses 4 segment registers:• Code segment (CS)

– 16-bit register – The processor uses CS segment for all accesses to instructions

referenced by instruction pointer (IP) register.– CS register cannot be changed directly – The CS register is automatically updated during far jump, far call

and far return instructions

• Stack segment (SS) – 16-bit register – the processor assumes that all data referenced by the stack

pointer (SP) and base pointer (BP) registers is located in the stack segment

– SS register can be changed directly using POP instruction

REGISTERS contd…• Data segment (DS)

– a 16-bit register – the processor assumes that all data referenced by general

registers (AX, BX, CX, DX) and index register (SI, DI) is located in the data segment

– DS register can be changed directly using POP and LDS instructions.

• Extra segment (ES)– a 16-bit register – the processor assumes that the DI register references the ES

segment in string manipulation instructions– ES register can be changed directly using POP and LES instructions.

REGISTERS contd…

The general registers are: • Accumulator

– consists of two 8-bit registers AL and AH which can be combined together and used as a 16-bit register AX.

– AL in this case contains the low-order byte of the word– AH contains the high-order byte– used for I/O operations and string manipulation.

• Base register– consists of two 8-bit registers BL and BH, which can be combined

together and used as a 16-bit register BX– BL in this case contains the low-order byte of the word– BH contains the high-order byte– BX register usually contains a data pointer used for based, based

indexed or register indirect addressing.

REGISTERS contd…

• Count register – consists of two 8-bit registers CL and CH, which can be combined

together and used as a 16-bit register CX– CL register contains the low-order byte of the word– CH contains the high-order byte– used as a counter in string manipulation and shift/rotate

instructions

• Data register – consists of two 8-bit registers DL and DH, which can be combined

together and used as a 16-bit register DX– DL register contains the low-order byte of the word– DH contains the high-order byte– Data register can be used as a port number in I/O operations

REGISTERS contd…

The following registers are both general and index registers:

• Stack Pointer (SP) – a 16-bit register pointing to program stack.

• Base Pointer (BP) – a 16-bit register pointing to data in stack segment. BP register is

usually used for based, based indexed or register indirect addressing.

• Source Index (SI)– a 16-bit register. SI is used for indexed, based indexed and register

indirect addressing, as well as a source data address in string manipulation instructions.

• Destination Index (DI)– a 16-bit register. DI is used for indexed, based indexed and register

indirect addressing, as well as a destination data address in string manipulation instructions.

REGISTERS contd…

• Instruction Pointer (IP) is a 16-bit register. • Flags

– a 16-bit register containing nine 1-bit flags: i. Overflow Flag (OF) ii. Direction Flag (DF) iii. Interrupt-enable Flag (IF) iv. Single-step Flag (TF)v. Sign Flag (SF) vi. Zero Flag (ZF)vii. Auxiliary carry Flag (AF) viii. Parity Flag (PF) ix. Carry Flag (CF)

Instruction Set

The 8088 instruction set consists of the following instructions:

• Data moving instructions. • Arithmetic - add, subtract, increment, decrement, convert byte/word

and compare. • Logic - AND, OR, exclusive OR, shift/rotate and test. • String manipulation - load, store, move, compare and scan for

byte/word. • Control transfer - conditional, unconditional, call subroutine and

return from subroutine. • Input/Output instructions. • Other - setting/clearing flag bits, stack operations, software

interrupts, etc.

ADDRESSING MODES

• Implied - the data value/data address is implicitly associated with the instruction.

• Register - references the data in a register or in a register pair.

• Immediate - the data is provided in the instruction.

• Direct - the instruction operand specifies the memory address where data is located.

• Register indirect - instruction specifies a register containing an address, where data is located. This addressing mode works with SI, DI, BX and BP registers.

• Based - 8-bit or 16-bit instruction operand is added to the contents of a base register (BX or BP), the resulting value is a pointer to location where data resides.

ADDRESSING MODES contd…

• Indexed - 8-bit or 16-bit instruction operand is added to the contents

of an index register (SI or DI), the resulting value is a pointer to

location where data resides.

• Based Indexed - the contents of a base register (BX or BP) is added to

the contents of an index register (SI or DI), the resulting value is a

pointer to location where data resides.

• Based Indexed with displacement - 8-bit or 16-bit instruction

operand is added to the contents of a base register (BX or BP) and

index register (SI or DI), the resulting value is a pointer to location

where data resides.

SUMMARY

• Based on Intel 8086• Address up to 1MB of memory• 16 bit registers and 8-bit data bus• Cost is low• Runs slower• Descendants of the 8088 include the 80188,

80186, 80286, 80386, and 80486

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