Instr Encode

8/11/2019 Instr Encode

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Instruction Encoding

How to encode instructions as binary values?

Instructions consist of:

operation (opcode) e.g. MOV operands (number depends on operation)

operands specified using addressing modes

addressing mode may include addressing

information

e.g. registers, constant values

Encoding of instruction must include opcode,operands addressing information.

!nstruction Encoding "all ##$#% %


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Encoding:

represent entire instruction as a binary value

number of bytes needed depends on &ow

muc& information must be encoded

instructions are encoded by assembler:

.OBJ file ' (lin , t&en loaded by loader)

instructions are decoded by processor during

e ecution cycle

*e will consider a subset of interesting cases

Instructions with No Operands (easy)

encode operation only in a single byte

e amples+

E- C H O/ !" H

0re consistent 1 never c&ange!nstruction Encoding "all ##$#%


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Instructions with One Operand

operand is a register (reg3$%4) or a memory

operand (mem3$%4)

always 2 bytes for opcode and addressing info

may &ave up to 2 more bytes of immediate data

opcode bits+ some in bot& bytes' #" bits total

w 5 widt& of operand

# 5 36bit% 5 %46bit

mod r$m encode addressing info

!nstruction Encoding "all ##$#%

opcode w

8 % #

mod opcode r$m

8 4 9 : 7 2 % #


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$O% & '&$ ()B*E

mod

"" "# #" ##r/m w = 0 w =1

""" ; !@ ; ! > d@ ; ! > n@ 0A 0=""# ; B!@ ; B! > d@ ; B! > n@ CA C=

"#" ; !@ ; ! > d@ ; ! > n@ BA B="## ; B!@ ; B! > d@ ; B! > n@ n@ 0H /#"# ;B!@ ;B! > d@ ;B! > n@ CH


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### ;


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E ample+

INC %

opcode + %st byte+ %%%%%%% 2nd byte+ ###

w / " (36bit operand)

operand 5 BH register+ mod 5 %% r&m 5 %%#

opcode w

#st byte: ####### " / 0E

mod opcode r$m1nd byte: ## """ ##" / C-

!nstruction Encoding "all ##$#% 4

from table'


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2hat does following encoding represent3

######## ##"""### 5 00 C4 H

opcode 5 ! C % st byte+ %%%%%%% 2nd byte+ ###

w 5 % %46bit operand

mod 5 %% register operandr&m 5 %%% B! register

encoding for INC %I '''



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0not&er E ample+ INC B5(E 6(' 78I 9 ;

inde ed addressing to an 36bit memory operand

will need e tra byte(s) to encode t&e immediate

value ( / 000C )

opcode 1 same as last e ample+ %%%%%% ###

w / " 36bit destination (memory) operand

r&m / #"" (from table)

mod could be #% or %# depends on constant

can use w&ic&ever mod value wor s

can s&orten encodings'

!nstruction Encoding "all ##$#%


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t&e assembler will use mod / #"

%46bit constant ("""CH) encoded into instruction

little endian

resulting instruction encoding+

byte % byte 2 byte 7 byte :

####### " #" """ #"" ######"" ######## 0E + 0C 00

!nstruction Encoding "all ##$#% D


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Could also encode same instruction+

mod / "# constant encoded as signed 36bit value

t&erefore instruction encoding includes only

one byte for t&e encoding of 1 :

resulting instruction encoding+

byte % byte 2 byte 7

####### " "# """ #"" ######""

0E 0C H

.


11/24

0not&er E ample+

INC B5(E 6(' 78I = #1+;

inde ed addressing to an 36bit memory operand

everyt&ing t&e same as last e ample, e cept+

can t encode >%23 as 36bit signed value'need %46bits to encode %23

t&en must &ave mod / #" ''

instruction encoding would include

two e


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13/24

0O'$ #: (wo Operands )nd 8ource Dses

Immediate $ode

destination eit&er register or memory

encode dest using mod r$m 1 as before

w (as before) 5 siFe of operand (36 or %46bit)

if w / # (%46bit) t&ens is significant

s indicates siFe of immediate value

5 " all %46bits encoded in instruction

assembler always used s / "5 # 36bits encoded 1 sign e tend to %46bits'


opcode s w

8 2 % #

mod opcode r$m

8 4 9 : 7 2 % #


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E ample+ 8DB $y @ar #

MyGVar is a word (B*) stored at address #2##H

opcode bits + %st byte+ #""""" 2nd byte+ #"#

w / # (%46bit memory operand)

s / # 1 can encode 7%H in one byte

sign e tend to ##7%Hmod / ""

r&m / ##"

resulting encoding+

opcode

#""""" # # "" #"# ##" 26bytes dest %6byte

address

imm

s w mod r$m


destination+ direct addressing

assembler usess / "%46bit immediate value 5 # "" (little

endian


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+ 1E "1 "" #


stored littleendian


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0O'$ 1: (wo Operands )nd 8ource %oes Not

Dse Immediate $ode

at least one of destination or source is register'

encode register operand

encode ot&er using mod r$m 1 as before

d 5 destination

5 " source is encoded in E

5 # destination is encoded in E


opcode d w

8 2 % #

mod 'EF r$m

8 4 9 : 7 2 % #


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E ample+ 8DB $y @ar 8I

opcode+ ""#" #"

suppose $y @ar is G address ""1"

d / " 1 source is a register 1 encoded in E

w / # 1 %46bit operand

mod / "" destination is memory 1 direct moder&m / ##"

'EF / ##" ( !)

encoding+

##%#%# # % ## %%# %%# addrs const

1! - 1" ""


d w

mod

register encodingas in mod 5 %%column in table

r$m


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NO(E + different first6byte opcode bits for Ihuman perspective?

%. given instruction 1 &ow to encode ?

2. given binary 1 &ow to decode ?

!nstruction Encoding "all ##$#% 2%

*&y mig&t t&is be important? EA)$


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Fiven instruction 9 how to encode 3

decide on form number of bytes

find opcode bits from table

decide on remaining bits

individual bit values

loo up mod H r&m values if needed

loo up register encoding if needed

fill opcode byte(s)

add immediate operand data byte(s)words little endian

dest precedes source



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Could you &and6assemble a simple program now?

5E8 recall previous control flow

encoding discussions

*&at about an operation $ opcode loo 6up table?

many forms 1 some give+

opcode bits only

entire first instruction byte 1 including

operand info encoded in first byte'

list of info for eac& instruction will be posted'

opcode bitsforms

Instr Encode

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