1 Indirect Matrix Converter Johann W. Kolar Thomas Friedli ETH Zurich, Swiss Federal Institute of Technology Power Electronic Systems Laboratory ETH-Zentrum / ETL CH-8092 Zurich, Switzerland Phone: +41-44-632-2833 Fax: +41-44-632-1212 www.pes.ee.ethz.ch [email protected]
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Indirect Matrix Converter...1 Indirect Matrix Converter Johann W. Kolar Thomas Friedli ETH Zurich, Swiss Federal Institute of Technology Power Electronic Systems Laboratory ETH-Zentrum
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1
Indirect Matrix ConverterJohann W. KolarThomas Friedli
ETH Zurich, Swiss Federal Institute of TechnologyPower Electronic Systems Laboratory
Johann W. Kolar, Thomas Friedli- Basics- Comparison with Conventional (Direct) MC- IMC Modulation Schemes- Dimensioning- EMI Filter Design- Hardware Implementation- Experimental Results
Coffee Break
■ Indirect Matrix Converter vs. Back-To-Back ConverterJohann W. Kolar, Thomas Friedli
■ Future Research and Development, DiscussionJohann W. Kolar, Patrick Wheeler
3
Classification of AC-AC Converter Topologies
■ Sinusoidal input and output currents■ Unity power factor at the input■ No energy storage elements: size and weight reduction
MC Features:
4
Indirect Matrix Converter (IMC)
5
Conventional Matrix Converter
a
b
c
A
B
C
a
b
c
A
B
C
Basic Matrix Converter Topologies
Indirect Matrix Converter
2,max 1 13ˆ ˆ ˆ0.866
2U U U= ⋅ = ⋅
6
⎟⎟⎟
⎠
⎞
⎜⎜⎜
⎝
⎛⋅⎟⎟⎟
⎠
⎞
⎜⎜⎜
⎝
⎛=
⎟⎟⎟
⎠
⎞
⎜⎜⎜
⎝
⎛
c
b
a
C
B
A
uuu
sCcsCbsCasBcsBbsBasAcsAbsAa
uuu
⎟⎟⎟
⎠
⎞
⎜⎜⎜
⎝
⎛⋅⎟⎟⎟
⎠
⎞
⎜⎜⎜
⎝
⎛=
⎟⎟⎟
⎠
⎞
⎜⎜⎜
⎝
⎛
C
B
A
c
b
a
iii
sCcsBcsAcsCbsBbsAbsCasBasAa
iii
abcABC uSu ⋅=
Voltage Conversion Current Conversion
ABCi ⋅= Tabc Si
Conventional Matrix Converter (CMC)
Mathematical Description of the Basic Operating Behavior
, , :a b cu u u, , :A B Cu u u
Input voltages
Output voltages
, , :a b ci i i, , :A B Ci i i
Input currents
Output currents
7
⎟⎟⎟
⎠
⎞
⎜⎜⎜
⎝
⎛⋅⎟⎟⎠
⎞⎜⎜⎝
⎛⋅⎟⎟⎟
⎠
⎞
⎜⎜⎜
⎝
⎛=
⎟⎟⎟
⎠
⎞
⎜⎜⎜
⎝
⎛
c
b
a
C
B
A
uuu
scnsbnsanscpsbpsap
snCspCsnBspBsnAspA
uuu
Inv Rect ABC abcu S S u= ⋅ ⋅
Voltage ConversionSplit into Rectifier andInverter Stage
Rect pDC abc
n
uu S u
u⎛ ⎞
= = ⋅⎜ ⎟⎝ ⎠
■ Introduction of a fictitious rectifier and inverter stage■ Fictitious DC link voltage and DC link current■ Modulation as for DC link converters
Indirect Matrix Converter can be considered as a physical implementation of amathematical concept
Conventional Indirect Matrix Converter (IMC)
8
Functional Equivalence of the IMC and the CMC
a
b
c
A
B
C
■ Operation of the IMC is restricted to upn > 0
■ Remaining switching states identical to those of CMC
No. A B C sAa sAb sAc sBa sBb sBc sCa sCb sCc uAB uBC uCA ia ib ic
1 a a a 1 0 0 1 0 0 1 0 0 0 0 0 0 0 02 b b b 0 1 0 0 1 0 0 1 0 0 0 0 0 0 03 c c c 0 0 1 0 0 1 0 0 1 0 0 0 0 0 04 a c c 1 0 0 0 0 1 0 0 1 -uca 0 uca iA 0 -iA5 b c c 0 1 0 0 0 1 0 0 1 ubc 0 -ubc 0 iA -iA6 b a a 0 1 0 1 0 0 1 0 0 -uab 0 uab -iA iA 07 c a a 0 0 1 1 0 0 1 0 0 uca 0 -uca -iA 0 iA8 c b b 0 0 1 0 1 0 0 1 0 -ubc 0 ubc 0 -iA iA9 a b b 1 0 0 0 1 0 0 1 0 uab 0 -uab iA -iA 010 c a c 0 0 1 1 0 0 0 0 1 uca -uca 0 iB 0 -iB11 c b c 0 0 1 0 1 0 0 0 1 -ubc ubc 0 0 iB -iB12 a b a 1 0 0 0 1 0 1 0 0 uab -uab 0 -iB iB 013 a c a 1 0 0 0 0 1 1 0 0 -uca uca 0 -iB 0 iB14 b c b 0 1 0 0 0 1 0 1 0 ubc -ubc 0 0 -iB iB15 b a b 0 1 0 1 0 0 0 1 0 -uab uab 0 iB -iB 016 c c a 0 0 1 0 0 1 1 0 0 0 uca -uca iC 0 -iC17 c c b 0 0 1 0 0 1 0 1 0 0 -ubc ubc 0 iC -iC18 a a b 1 0 0 1 0 0 0 1 0 0 uab -uab -iC iC 019 a a c 1 0 0 1 0 0 0 0 1 0 -uca uca -iC 0 iC20 b b c 0 1 0 0 1 0 0 0 1 0 ubc -ubc 0 -iC iC21 b b a 0 1 0 0 1 0 1 0 0 0 -uab uab iC -iC 022 a b c 1 0 0 0 1 0 0 0 1 uab ubc uca iA iB iC23 a c b 1 0 0 0 0 1 0 1 0 -uca -ubc -uab iA iC iB24 b a c 0 1 0 1 0 0 0 0 1 -uab -uca -ubc iB iA iC25 b c a 0 1 0 0 0 1 1 0 0 ubc uca uab iC iA iB26 c a b 0 0 1 1 0 0 0 1 0 uca uab ubc iB iC iA27 c b a 0 0 1 0 0 1 1 0 0 -ubc -uab -uca iC iB iA
upn
…70 b b c 0 1 0 0 0 1 1 1 0 0 ubc -ubc ubc 0 -iC iC
71 b b a 1 0 0 0 1 0 0 0 1 0 -uab uab uab iC -iC 072 b b a 0 1 0 1 0 0 1 1 0 0 -uab uab -uab iC -iC 0
9
Multi-Step Commutation for CMC / IMC
Constraints:No mains phases short-circuitedNo interruption of iExample: i > 0, uab < 0, aA → bA
10
1st step: off
Example: i > 0, uab < 0, aA → bA
Multi-Step Commutation for CMC / IMC
Constraints:No mains phases short-circuitedNo interruption of i
11
1st step: off2nd step: on
Example: i > 0, uab < 0, aA → bA
Multi-Step Commutation for CMC / IMC
Constraints:No mains phases short-circuitedNo interruption of i
12
1st step: off2nd step: on3rd step: off
Example: i > 0, uab < 0, aA → bA
Multi-Step Commutation for CMC / IMC
Constraints:No mains phases short-circuitedNo interruption of i
13
1st step: off2nd step: on3rd step: off4th step: on
Example: i > 0, uab < 0, aA → bA
Sequence depends oncurrent sign!
Multi-Step Commutation for CMC / IMC
Constraints:No mains phases short-circuitedNo interruption of i
14
Zero DC Link CurrentCommutation for IMC
PWMpattern
1/3 mainsperiod
DC link voltage & current
15
PWMpattern
1/3 mainsperiod
DC link voltage & current
u = uac
i = iA
(100)(ac)
Zero DC Link CurrentCommutation for IMC
16
PWMpattern
1/3 mainsperiod
DC link voltage & current
(110)(ac)
u = uac
i = -iC
Zero DC Link CurrentCommutation for IMC
17
PWMpattern
1/3 mainsperiod
DC link voltage & current
(111)(ac)
u = uac
i = 0
Zero DC Link CurrentCommutation for IMC
18
PWMpattern
1/3 mainsperiod
DC link voltage & current
(111)(ab)
u = uab
i = 0
Zero DC Link CurrentCommutation for IMC
19
PWMpattern
1/3 mainsperiod
DC link voltage & current
(110)(ab)
u = uab
i = -iC
Zero DC Link CurrentCommutation for IMC
20
PWMpattern
1/3 mainsperiod
DC link voltage & current
(100)(ab)
u = uab
i = iA
Zero DC Link CurrentCommutation for IMC
21
PWMpattern
1/3 mainsperiod
DC link voltage & current
Summary
Simple and robust modulation schemeas it is independent of voltages andcurrents (sign)
Negligible rectifier switching losses due to zero current commutationof the rectifier stage
Zero DC Link CurrentCommutation for IMC
22
Space Vector Modulation
601 /...πϕ =
Free-wheeling limited to Inverter Stage
idiidiiddi accabbacaba ==+= ,,)(
1=+ acab dd
1cosΦ1 =
ccbbaa uiuiui ~;~;~
a
b
a
bab
a
c
a
cac u
uii
duu
ii
d −=−=−=−= ;
Intervals considered
Local Average Value of Input Currents
Ohmic Fundamental Mains Behavior
Relative Turn-on Times
602 /...πϕ =
Time Intervals
22 /Td/Td PababPacac == ττ
Derivation
[2]
23
Identical Phase/Duty Cycle of Active Inverter Switching States (100), (110) in τacand τab
)100(),100(
),100(),100(
),100( δτ
τδ
ττ
δ ====ab
abab
ac
acac
)110(),110(
),110(),110(
),110( δτ
τδ
ττ
δ ====ab
abab
ac
acac
uu 32
)100( =
332
)110(
πjueu =
)( ),110(3
),110(3
),100(),100(2
32
*2 ab
jabac
jacababacacT eueuuuu
Pττττ
ππ
+++=
Generated Output Voltage Space Vector
.)()(
)()(
(
)110(3
32
)100(32
)110(3
21
213
2)100(
21
213
2
3)110(
3)110()100()100(
2
32
*2
δδ
δττ
δττ
δτδτδτδτ
π
π
ππ
jababacacababacac
j
P
abab
P
acac
P
abab
P
acac
jbcab
jacacbcabacacT
edudududu
eT
uT
uT
uT
u
eueuuuuP
+++=
+++=
+++=
Local Average Value of the DC Link Voltage
acacabab duduu +=
24
)110(3
32
)100(32*
2 δδπj
euuu +=
Output Voltage Space Vector
Therefore, Calculation of the Relative On-Times of the Active Switching States of the Output Stage can be Directly Based on ū
*2
21
*2
23
)110(
6*2
21
*2
23
)100(
sin||
)cos(||
ϕδ
ϕδ π
uu
uu
=
+=*
*21(100), 2 623
1*
*21(100), 2 623
1*
*21(110), 223
1*
*21(110), 223
1
ˆcos( )ˆ
ˆcos( )ˆ
ˆsinˆ
ˆsinˆ
ac P c
ab P b
ac P c
ab P b
UT u
U
UT u
U
UT u
U
UT u
U
π
π
τ ϕ
τ ϕ
τ ϕ
τ ϕ
= − +
= − +
= −
= −
→ Absolute On-Times
Local Average Value of the DC Link Voltage
)cos(1ˆ
112
3t
Uuω
= 1minˆ23 Uu =
25
Output Voltage System
)cos(ˆ)cos(ˆ
)cos(ˆ
032
2*2
032
2*2
02*2
ϕω
ϕω
ϕω
π
π
++=
+−=
+=
∗
∗
∗
tUu
tUu
tUu
C
B
A
Voltage Transfer Ratio
23
ˆˆ
1
*2 ≤=
UUM
Output Voltage Formation
Inverter Output Voltage Space Vectors Average Output Voltage
11max,2ˆ866.0ˆ
23ˆ UUU ⋅=⋅=
Variation of ū requires a Variationof the Inverter Modulation Index )cos(ˆ
ˆ
34||
11
*2
21
*2
2 tUU
uu
m ω==
26
ϕ2=ω2t Au Bu Cu0 ... π/6 up up, un up, un
π/6 ... π/2 up, un up, un un
π/2 ... 5π/6 up, un up up, un
5π/6 ... 7π/6 un up, un up, un
7π/6 ... 3π/2 un, up up, un up
3π/2 ... 11π/6 un, up un up, un
11π/6 ... 0 up un, up up, un
Clamping of each output phaseover a π/3-wide interval tominimize switching losses
Verify Equal Local Average Value ī of the DC Link Current in τac and τab
tii
m1
11 cos
1||ω
==
Variation of Input Stage ModulationIndex due to Varying ī
Resulting Input Current Space Vector
11
121
*2
211ˆ
cos1)cos(cosˆ
ˆˆ|| It
tUUImii =Φ==
ωω
28
Resulting Input Phase Currents
)cos(ˆ
)cos(ˆ)cos(ˆ
32
11
32
11
11
π
π
ω
ω
ω
+=
−=
=
tIi
tIi
tIi
c
b
a
Space Vector Modulation SummaryPhase of resulting input vector is adjustableOutput voltage vector u2* is adjustable PWM pattern is specific for each combination of input and output stage sectors
Rectifier (input) stage Inverter (output) stage
29
=⋅ t1ω
Conventional vs. Low Output Voltage ModulationConventional Modulation Low Output Voltage Modulation
11I,max,2 U86.0U23U ⋅≈= 11II,max,2 U5.0U
21U ⋅==
Rectifier space vectorrepresentation
(HV) (LV)
[5]
30
Conventional vs. Low Output Voltage ModulationHV LV
One input phase (a) is clamped toone DC link bus (p)Other input phases (b, c) are switchedto the remaining DC link bus (n)
No input phase is clamped to the DC link busOne input phase (b) is switchedbetween the positive (p) and thenegative (n) busCurrent blocks of both polaritiesappear in one input phase (b)
Output common mode voltage is reduced to approximately 75%
33
Conventional vs. Low Output Voltage Modulation
LV
HV
Switching Losses Output Current Ripple
LVHV
Current StressesInput voltage ripple doubles
Output current ripple slightly reduced
For given Û2 (M12) the componentcurrent stress increases (conductionlosses)
LV
HV
34
=⋅ t1ω
Conventional Modulation (HV) Low Output Voltage Modulation (LV)
3-Level Modulation Scheme
3 Output Voltage Level Modulation (3LV)Weighted combination of HV and LV modulationLowers output current rippleReduction of the output common voltage
35
3-Level Modulation Schemeuacuab
ubc
u
0
0 +π/6-π/6 +π/3ϕ1= -π/3
uacuab
ubcu
0uacuab
ubcu
0
(a)
(b)
(c)
Conventional / High Output Voltage Modulation (HV)
Low Output Voltage Modulation (LV)
3 Output Voltage Level Modulation (3LV)
2 13ˆ ˆ0
2U U= ⋅…
2 11ˆ ˆ02
U U= ⋅…
2 11 3ˆ ˆ2 2
U U= ⋅…
36
Advanced Modulation Schemes
37
a
b
c
A
B
C
Sparse Matrix Converter (SMC)
As the operation is restricted to upn > 0, blocking of Sna within the turn-on interval ofSap is not required and both transistors are combined into a single transistor Sa
Ideally designed motors for each of the topologies
32, min 1,min2 (1 ) 280NU M U V= −Δ ⋅ =
22,
2,14
3N
NN
PI A
U= =
⋅
min 1,max(1 ) 2 655dcU M U V= + Δ ⋅ ⋅ ≈
12, min 1,max2
(1 ) 440N dcU M U U V= −Δ ⋅ = =
2, 8.9NI A=
1
2
1
2
2
: Input RMS voltage: Output RMS voltage: DC-link voltage
: Input RMS current: Output RMS current: Output power
dc
UUUIIP
Comparison of Realization Effort
VSMC
BBC
72
Choice of DC-link Capacitor for the BBC
Capacitor is selected such that the voltage does not fall below a defined minimum value during the transient from full regeneration to full motor operation
( ) ( )
( ) ( )( )2 22
2,min 2 22 2 min( )
in dc dc dc dcDC link
dc dc dc dc dc dc
L P E U E UC
E U u E U E−
⎡ ⎤⋅ − − +⎣ ⎦=
⋅ + − +
,min 31DC linkC Fμ− ≅
Inductors are chosen such that the current ripple at the switching frequency is lower than 20% of the input current amplitude (minimum EMI filter volume)
Losses and Efficiency dependent on Operating Point
),(),(1
22
2ImS
ImPLoss−=η
mIUImS ⋅⋅= 2123
22 ),(
Efficiency Max. Output Current for f2 = 0(Standstill: Most Critical OP)
Max. Efficiency at Max. Modulation IndexVSMC: 94.5%BBC: 92.0%
Max. Output Current AmplitudeVSMC: 1.25 Î2,N (due to special modulation)
BBC: 0.46 Î2,N
76
Under rated load condition the critical fp is about 14 kHz→ VSMC is advantageous in efficiency within whole speed-torque plane beyond 14 kHz
NBBCLossVSMCLossLoss PPPP 2,, /)( −=Δ
Advantageous Applicationsfor VSMC (IMC)
Relative Loss Difference – Dependence on Load and Switching Frequency
Losses and Efficiency dependent on Operating Point
Relative Loss Difference
Applications requiring an output filterDrives operated at partial loadAircraft applications (400 – 800 Hz)Low inductance machines
77
Compare
Des
igne
d fil
ter
Pass?yes
no
QP measurementapproximation
Limits (standards)
LISN HF equivalentcircuit
50μH50Ω
250nF
Vh (f)idm (f)
Input currentspectrum
idm (f)
Requ
ired
atte
nuat
ion
QP measurements expected maximum resultsInput current spectrum without filter
QPmax ( f )
Design of the filtertopology andcomponents Size
Attenuation
Costs
Evaluation
100
2
4
6
8
10
RMS
curr
ent [
A]
Frequency [Hz] 106
VSMCiDM ( f )
-40-20
020406080
100
Con
duct
ed e
mis
sion
[dbμ
V]
105 106Frequency [Hz]
VSMC
Vh ( f )
QPmax ( f )
-40-20
020406080
100
Con
duct
ed e
mis
sion
[dbμ
V]
105 106Frequency [Hz]
BBC
Vh ( f )
100
2
4
6
8
10
Frequency [Hz]
RMS
curr
ent [
A]
106
iDM ( f )
Stresses
Modeling
QPmax ( f )
BBC
EMI Filtering Effort
78
Comparison
C1C2
L1
R2d
LCM,1
Con
vert
er
Mai
ns
C2d
CCM,1CCM,2
R1d
L1dLCM,2
Y2 250V4.7nF
Y2 250V4.7nFX2 250V
330nF
27Ω 1W
X2 250V150nF
3.4Ω 2W
X2 250V4700nF
VAC 500F W4093 x 4 turns
VAC 500F W3803 x 7 turns
Micrometals T130-2639 turns
Micrometals T130-2639 turns
Filter Structure for the BBC
VSMCBack-to-back
Total filter components volume
Total CM inductance (10 kHz)
Total CM capacitance
Total DM inductance (10 kHz)
Total DM capacitance (for all three-phases) 15.54 mF
1.20 mH
28.2 nF 28.2 nF
360 cm3325 cm 3
36 mH
36 mF
1.29 mH
36 mH
EMI Filtering Effort
Filter volume forthe VSMC is 10%larger
79
0 5ms 10ms 15ms 20ms
0 5ms 10ms 15ms 20ms 0 5ms 10ms 15ms 20ms
0 5ms 10ms 15ms 20ms(a)
(d)(c)
(b)
iA
uA
uA
iA
uA
uAua
ia
ia
ia
ua
VSMC
BBC
Nominal Operation (6.8 kW)
150 V/div15 A/div
150 V/div15 A/div
Characteristic Waveforms
Constant DC link voltage at higher level (boost capability)Lower output currents due to higher output voltage level
BBC Features:
80
Power density:≈ 2.8 kVA/liter≈ 46 W/in3
Volume: 2.4 liters
Power DensityBBCVSMC
Dimensions:L 26.2 cmW 8.0 cmH 11.5 cm
Power density:≈ 1.5 kVA/liter≈ 25 W/in3
Volume: 4.6 liters
Dimensions:L 22.7 cmW 16.0 cmH 13.4 cm
[9]
81
ConclusionsCMC and IMC / SMC proven to be competitive to BBC / Voltage DC Link System
Typically 1-2% higher dependent on operating point for samesemiconductor effort (especially, lower switching losses at high switching frequencies)
Typically 20% lower for forced air cooling
Comparable complexity of modulation and control, USMC clearly advantageous for unidirectional power flow
Lower output voltage range, therefore mainly suited to applications requiring a non-standard motor anyway
+ Efficiency:
+ Volume:
0 Modulation:
- Output Voltage:
82
Comparative evaluation of MC concepts and BBC forequal / optimally utilized semiconductor effort
EMI performance (common mode filtering)
Applicability for highly dynamic drives
Sensorless control down to zero frequency
Modulation for low pulse number / high power applications
Future Research
83
ReferencesCarlson, A.: „The back-to-back converter“, Master Thesis, Lund Institute of TechnologyLund, Sweden, (1998).
Kolar, J.W., Baumann, M., Schafmeister, F., and Ertl, H.: Novel Three-Phase AC-DC-AC Sparse Matrix Converter. Part I - Derivation, Basic Principle of Operation, Space Vector Modulation, Dimensioning.Proceedings of the 17th Annual IEEE Applied Power Electronics Conference and Exposition, Dallas (Texas), USA, March 10 - 14, Vol. 2, pp. 777 - 787 (2002).
Schafmeister, F., Baumann, M., and Kolar, J.W.: Analytically Closed Calculation of the Conduction and Switching Losses of Three-Phase AC-AC Sparse Matrix Converters. Proceedings of the 10th International Power Electronics and Motion Control Conference, Dubrovnik, Croatia, Sept. 9 - 11, CD-ROM, ISBN: 953-184-047-4 (2002).
Schafmeister, F., Herold, S., and Kolar, J.W.: Evaluation of 1200V-Si-IGBTs and 1300V-SiC-JFETs for Application in Three-Phase Very Sparse Matrix AC-AC Converter Systems. Proceedings of the 18th Annual IEEE Applied Power Electronics Conference and Exposition, Miami Beach (Florida), USA, February 9 - 13, Vol. 1, pp. 241 - 255 (2003).
Kolar, J.W., and Schafmeister, F.: Novel Modulation Schemes Minimizing the Switching Losses of Sparse Matrix Converters. Proceedings of the 29th Annual Conference of the IEEE Industry Electronics Society, Roanoke (VA), USA, Nov. 2 - 6, pp. 2085 - 2090 (2003).
[1]
[2]
[3]
[4]
[5]
84
ReferencesHeldwein, M.L. , Nussbaumer, T. , and Kolar, J.W.: Differential Mode EMC Input Filter Design for Three-Phase AC-DC-AC Sparse Matrix PWM Converters. Proceedings of the 35th IEEE Power Electronics Specialists Conference, Aachen, Germany, June 20 - 25, CD-ROM, ISBN: 07803-8400-8 (2004).
Heldwein, M.L. , Nussbaumer, T. , Beck, F., and Kolar, J.W.: Novel Three-Phase CM/DM Conducted Emissions Separator. Proceedings of the 20th Annual IEEE Applied Power Electronics Conference and Exposition, Austin (Texas), USA, March 6 - 10, Vol. 2, pp. 797 - 802 (2005).
Friedli, T., Heldwein, M.L., Giezendanner, F., and Kolar, J. W.: A High Efficiency Indirect Matrix Converter Utilizing RB-IGBTs. Proceedings of the 37th Power Electronics Specialists Conference, Jeju, Korea, June 18 -22, CD ROM, ISBN: 1-4244-9717-7, (2006).
Round, S., Schafmeister, F., Heldwein, M.L., Pereira, E., Serpa, L., and Kolar, J.W.: Comparison of Performance and Realization Effort of a Very Sparse Matrix Converter to a Voltage DC Link PWM Inverter with Active Front End. IEEJ Transactions of the Institute of Electrical Engineers of Japan, Volume 126-D, Number 5, May 2006, pp. 578 - 588.