Implementation of One cycle Controller for Single phase Bi · PDF file · 2017-04-08Using voltage-second balance of an inductor in one switching cycle, ... Integral Constant

International Journal of Applied Engineering Research ISSN 0973-4562 Volume 12, Number 6 (2017) pp. 804-812

© Research India Publications. http://www.ripublication.com

804

Implementation of One cycle Controller for Single phase Bi-directional

Converter

Ramani Kannan1*, Lokesh N2 , Khairul Nisak Md Hasan3 and Aravind CV4

1,3Department Electrical and Electronics Engineering, Universiti Teknologi PETRONAS, Bandar Seri Iskandar, 32610 Tronoh, Perak, Malaysia.

2Department of Electrical and Electronics Engineering, SR Engineering College, Warangal, India. 4School of Engineering, Taylor's University, Subang Jaya Malaysia 47500.

Abstract

The main concern about the bi-directional AC-DC converter is

to maintain utility power factor near to unity. One Cycle

Controller (OCC) is one of the outstanding control techniques

to control these power electronic converters. One Cycle

Controller comprises one integrator with reset along with a few

linear components like analog comparators, flip-flops, and a

clock. This paper presents a hardware implementation of

Constant Power Factor-One Cycle Controller (CPF-OCC)

which is practiced on the single phase bi-directional AC-DC

converter.

Keywords: One Cycle Controller, single phase bi-directional

AC-DC converter.

INTRODUCTION

Nowadays, power electronic converters are playing a vital role

in electrical engineering from the generation to the utilization

of electrical power. Active Power Filters (APF), Bi-directional

converters, Grid-Tied inverters, and Power factor corrected

rectifiers are indispensable converters in electrical power

systems. The switches used in these converters are to be

controlled for its effective utilization. Different control

techniques have been developed by researchers like Peak

current control, average current control, hysteresis current

control, Borderline control, Pulse Width Modulation (PWM)

techniques, Repetitive control, Dead Beat control, Sliding

mode control, Fuzzy control and One Cycle Control [1,2].

Each method has its own advantages and disadvantages.

Comparing OCC with other methods, OCC doesn’t require

high-speed digital microprocessor or analog multipliers of high

precision or a high-speed DSP chip with a fast ADC, which

results in high complex, low reliability, and high cost. One

Cycle Controller comprises one integrator with reset along with

a few linear components like analog comparators, flip-flops,

and a clock. Moreover, it is the fastest, simplest, efficient and

compact controller. The One Cycle Control technique was

proposed by K. M. Smedley and his general theory was

published in [3]. Since then, many studies have been made on

OCC techniques [3-15, 17-21]. The author T.Jin’s paper [8]

presents the integration of a one cycle control circuit into one

chip to control all the indispensable converters. Aluisio A. M.

Bento proposed a control strategy, named Hybrid PWM OCC

(HOCC), which keeps the NP potential at the center potential

of the dc-link voltage while maintaining near unity power

factor with low current harmonic content [17].

Grid-connected unity-power-factor converters based on OCC

do not require the service of phase locked loop or any other

synchronization circuits for interfacing with the utility. As a

result, these schemes are becoming increasingly popular. The

author Dharmraj V. Ghodke has proved using large signal

modeling that the increasing power handled by the converter

deteriorates the power factor [11]. This limitation is overcome

with the CPF-OCC [12]. This paper is written to give an idea

of the design of a powerful technique CPF-OCC. This would

also help to design the basic One Cycle Controller.

This paper is organized as follow, where the next section

describes the brief concept of Constant power factor-One cycle

controller. The next section provides the hardware

implementation of CPF-OCC technique with the results.

Constant Power Factor One Cycle Controller

Basic One Cycle Control Method:

The OCC is a nonlinear control method that achieves the

average value of a switched variable instantly i.e. in a single

switching cycle [13-15]. There is a difference between the

operating principles of PWM and OCC techniques. In both

techniques, the reference signal is compared with the saw-tooth

wave but reference signal is varied in accordance with the

system requirement in PWM whereas in OCC saw-tooth is

varied keeping reference signal remain constant.

Figure 1 shows a basic circuit of one cycle control technique. It

consists of a resettable integrator, a comparator, an SR flip-flop

and an oscillator for generating the clock signal (clock). Let

U(t) is input, W(t) is an output signal. The desired averaged

value of output is obtained in a single switching cycle of the

switch 'SW'.

mailto:[email protected]



805

The oscillator determines the switching period Ts (constant)

using the clock signal. For a time Ton the switch is closed and

W(t)=U(t). For a time Toff the switch is opened and W(t)=0.

Thus the average value of output is same as the average of an

input signal over ON period. i.e.

ont

ss

dttUT

dttWT

W0

)(1

)(1

(1)

Where

�̅� = The average value of output

W(t) = Instantaneous value of Output signal

U(t) = Instantaneous value of Input signal

Ts = Switching Period

Q

QSET

CLR

S

R

20 KHz

U(t) SW W(t)

Oscillator

WRef

ComparatorIntegrator

Gate Pulses

Reset

VINT

Figure 1. Basic One Cycle Controller

The instant that the logic level of the clock signal is "1", the

output Q assumes to be logic "1" closing the key and its

inverted output assumes a logic "0". The reset input of flip-flop

assumes logic level "1" causing the output Q assumes the value

"0", opening the switch, and its inverted output assumes a logic

"1". The cycle repeats itself at the instant when the logic level

of the clock back to "1". Therefore, the average value of the

output signal will be exactly equal to the reference voltage in

each cycle, whereas Ts is constant.

Constant Power Factor-One Cycle Controller:

The bi-directional AC-DC power converter which integrates

AC grid and DC grid are shown in Figure 2. The single pole

double-throw (SPDT) switch changes the mode of operation of

the converter from rectifying to inverting as the switch position

is changed from position 2 to 1. The switches S2, S4 are on and

S1, S3 are off during 0 < t < DTs, and S2, S4 are off and S1, S3

are on during DTs < t <Ts.

Where

Ts = 1

fs is the switching period and

D = Ton

Ts is the duty ratio.

During 0<t<DTs,

𝑣𝐿 = 𝑣𝑠 + 𝑣0 (2)

During DTs < t <Ts,

𝑣𝐿 = 𝑣𝑠 − 𝑣0 (3)

Figure 2.Single phase bi-directional ac-dc converter

Using voltage-second balance of an inductor in one switching

cycle,

(𝑣𝑠 + 𝑣0)𝐷 = (𝑣𝑠 − 𝑣0)(1 − 𝐷) (4)

𝑉𝑜. (1 − 2𝐷) = 𝑣𝑠 (5)

Now, the controller is designed such that utility power factor is

maintained constant. Thus converter with dc side load is

assumed as resistive i.e. 𝑣𝑠 = 𝑅𝑒 . 𝑖𝑠.

From Eqn. (5),

𝑅𝑠

𝑅𝑒

(1 − 2𝐷). 𝑣0 = 𝑅𝑠. 𝑖𝑠 (6)

Where

𝑅𝑠= current sensing resistor and

𝑅𝑒 = emulated resistor

Let

𝑉𝑚 =𝑅𝑠

𝑅𝑒

𝑣0 (7)

Therefore Eqn. (6) becomes

𝑉𝑚 . (1 − 2𝐷) = 𝑅𝑠. 𝑖𝑠 (8)

Based on above expression Basic OCC (B-OCC) is developed

which generates the switching signals by comparing the saw-

tooth waveform with the source current. The author Dharmraj

V. Ghodke has proved (a) B-OCC exhibits distortion in input

current when the converter is lightly loaded and also it is

unstable in the inverting mode of operation, (b) power factor

becomes poor with an increase in load power. The

aforementioned problem is rectified either by using higher

value of filter inductor or by adding fictitious current with the

source current [11, 18&19] and the control logic expression

S1

IRFP460

L

5mH

450V

2200µFVs

230 Vrms 50 Hz 0°

Va

ria

ble

_L

oa

d

Ln2(‎1)‎

S2

IRFP460

S4

IRFP460

S3

IRFP460

SPDTKey = Space

Ln4(‎6)‎

Vg

400 V

Rc

5Ω



806

based on which Modified OCC (M-OCC) is developed

becomes

𝑉𝑚. (1 − 2𝐷) = 𝑅𝑠. (𝑖𝑠 + 𝑖𝐹) (9)

Power factor problem still exists in M-OCC

technique. Since Vm is proportional to the load power and as

load power increases utility power factor decreases [11-12]. It

is understood from large signal analysis of single phase

bidirectional AC-DC converter. So Vm has chosen a low value

and is maintained constant throughout the operating range,

hence high power factor is maintained. The amplitude of

signals obtained by multiplying the utility voltages by 1/RF is

multiplied by the error existing between the sensed dc link

voltage and the dc link voltage reference. The result is added to

source current and the Constant Power Factor OCC (CPF-

OCC) is developed with the following control logic expression

𝑉𝑚. (1 − 2𝐷) = 𝑅𝑠. (𝑖𝑠 − 𝑣𝑒) (10)

The detailed structure of the controller of the CPF-OCC scheme

is explained below with the block diagram shown in Figure 3.

The dc link capacitor voltage V0 is sensed and compared with

the reference voltage V0Ref. The error so generated is fed to a PI

controller. The fictitious current signal iF, which is proportional

to the source voltage, is generated by multiplying VS by 1/RF.

The inverted output (−Ve) of the PI controller is multiplied with

iF to generate the signal im. The sum of im and the signal

proportional to the source current is (im+ RS*is) compared with

the saw-tooth waveform (VR). A free running clock sets the

frequency of this saw-tooth waveform. At every rising edge of

the clock pulse, S2 and S4 are turned on. When the sum (im+

RS*is) becomes equal to the saw-tooth waveform, S2 and S4 are

turned off, and S1 and S2 are turned on (S1-S4 are switches of

the single phase bi-directional AC-DC converter).

Hardware Implementation and Results:

The controller is designed to the following specifications in

table 1.

Table 1. The specification for controller

Parameters Values

Switching Frequency (fs) 20KHz

Source Voltage (Vs) 230 Volts (RMS)

Reference voltage 5 volts

Vm 1

Proportional Constant 𝐾𝑃

Integral Constant 𝐾𝑖

0.00447

1.6836

Inverted Saw-tooth Generator:

A saw-tooth cycle is generated by charging the capacitor at a

constant rate and then rapidly discharging it with a switch. If

not, the residual voltage might be present which will saturate

with time and upset the integration process and hence the whole

system [16]. Figure 4 shows a circuit utilizing this principle. In

order to obtain a positive ramp, either input current of op-amp

must always flow out of the summing junction or the applied

input voltage must be of negative value. The switch used here

for discharging a capacitor is n-JFET (BFW11).

Figure 3. Control block diagram of the CPF-OCC based single phase converter



807

Figure 4. Hardware setup for inverted saw-tooth wave generator

The gating signal for JFET is generated by using positive

edge triggered circuit of IC CD4093 (It consists of four

Schmitt trigger circuits. Each circuit functions as a two-input

NAND gate with Schmitt trigger action on both inputs) and

unity gain inverted amplifier LF356N. The corresponding

waveforms are shown in Figure 9&10. The values R1, R2, C1

& C2 are chosen based on the formulae given in the

application note of CD4093. If the magnitude of the obtained

saw-tooth wave is not equal to twice the Vm, potential divider

circuit is used.

The non-inverted saw-tooth wave is obtained by subtracting

saw-tooth wave from a fixed dc value Vm (here Vm is

considered as 1), which are shown in Figure 11, 12&13.

Current control Generator:

In order to generate switching pulses for power MOSFETs

based on OCC techniques, a control current wave is

generated. It is done by comparing the sensed dc link

capacitor voltage V0 with the reference voltage V0Ref=5V.

The error so generated is fed to a PI controller. The fictitious

current signal iF, which is proportional to the source voltage,

is generated by multiplying VS by 1/RF. The inverted output

(−Ve) of the PI controller is multiplied with iF to generate the

signal im. The sum of im and the signal proportional to the

source current is (im+ RS*is) is referred as a current control

signal. The hardware implementation of current control

generator with a comparator is shown in Figure 5.

The AC voltage is sensed by using a 230/115 V potential

transformer and the potential divider is used to make the

sensed voltage to the required value. This scaled AC voltage

is given to the MPY634 IC as one input, which acts as a

fictitious current iF and is shown in Figure 16.

The MPY634 is a wide bandwidth, high accuracy, four-

quadrant analog multiplier. Its differential X, Y, and Z inputs

allow configuration as a multiplier, squarer, divider, square-

rooter, and other functions while maintaining high accuracy.

An accurate internal voltage reference provides precise

setting of the scale factor. The differential Z input allows

user-selected scale factors from 0.1 to 10 using external

feedback resistors. The pin diagram of MPY634 is shown in

Figure 6.

Operation:

The transfer function for the MPY634 is:

𝑉𝑜𝑢𝑡 = 𝐴 [(𝑋1 − 𝑋2)(𝑌1 − 𝑌2)

𝑆𝐹− (𝑍1 − 𝑍2)] (11)

where:

A = open-loop gain of the output amplifier

(typically85dB

at DC).

SF = Scale Factor. Laser-trimmed to 10V but adjustable

over a 3V to the10V range using external resistors.

The output of PI controller and the sensed AC voltage are

multiplied by using this MPY634KP analog multiplier. The

respective waveforms are shown in Figure 15&17.

In order to sense the AC current, LTS 25-NP current

transducer is used. It has been designed to conveniently

measure single and three-phase AC as well as pulsed DC

currents. It is capable of sensing the current waveform from

the surrounding magnetic field without having to break into

the circuit and its output is scaled using an inbuilt op-amp. It

is capable of giving a voltage conversion rate of 50mV/A.

The instantaneous source current is shown in Figure 18

The output of multiplier circuit and the sensed current are

added by using non-inverting summer circuit and its output is

U1A

4093BP_15V

U1B

4093BP_15V

U3

LF356N

3

2

4

7

6

15

R1

C1

C2

R2

VddVdd

Vee

Vdd

R3

R4

U8

LF356N

3

2

4

7

6

1 5

Vee

Vdd

R5

C3

Q1

BFW11

R6

R7

R8

R9

R10R11

U2

LF356N

3

2

4

7

6

1 5

Vee

Vdd

R12

R13

R14

R15 R16

R17

Triggered_pulse

Inverterd_Saw

tooth

Inverted_amplifier

Subtractor

Reset_Integrator

Potential_Divider



808

referred as a current control signal and is shown in Figure 19.

The current control signal is compared with the inverted saw-

tooth signal using an aLM311N comparator and its output is

shown in Figure 20.

SR Flip-Flop:

The CD4043BC is a quad cross-couple 3-STATE CMOS

NOR latches. Each latch has a separate Q output and

individual SET and RESET inputs. There is a common 3-

STATE ENABLE input for all four latches. A logic “1” on

the ENABLE input connects the latch states to the Q outputs.

A logic “0” on the ENABLE input disconnects the latch states

from the Q outputs resulting in an open circuit condition on

the Q output.

The positive edge triggered pulses of comparator output is

inverted using the NOT gate and is given to reset pin of SR

Flip-Flop, which is shown in Figure 21. A very low duty ratio

of pulses, whose frequency is equal to the required switching

frequency, are generated using CD4093 IC and is shown in

Figure 7. It is given to set pin of SR Flip-Flop through a NOT

gate, which is shown in Figure 21. As we know that SR Flip-

Flop output is indetermined when both set and reset inputs are

logic high. So to avoid this problem, the comparator output is

passed through positive edge triggered circuit and NOT gate

before giving it to reset pin. Enable pin is made always high.

In H-Bridge Inverter the switches in the same leg should

not conduct at the same time. That’s why we have to provide

some Blanking Time between the two pulses. The Selection

of Blanking is very important for the proper working of

Inverter. The Blanking time is chosen to be just a few micro

seconds for fast switching devices like MOSFETs and larger

for slower switching devices. The pulses for first H-Bridge

by providing Blanking Time between the two switches is

shown in Figure 7. The IC used for Blanking Time provider

is CD 4081 and its output signals are shown in Figure 24-26.

The experimental setup of CPF-OCC which is practiced on

the single phase bi-directional AC-DC converter is shown in

Figure 8.

Figure 5. Hardware setup for current control generator

Figure 6. Pin diagram of Multiplier IC MPY634KP

U4

MPY634

A=1

VS+

VS-

IN1+

IN1-

IN2+

IN2-

OUT1

2

3

8

5

7

4

U3

LF356N

3

2

4

7

6

15

Vdd

Vee

R16

R1

Vo_actual

R2+5V

R3

R4 R5

U1

LF356N

3

2

4

7

6

15

R6

C3

R7

Vdd

Vee

PT

2:1

V1

230 Vrms 50 Hz 0°

R8 R9

R10

U8

LF356N

3

2

4

7

6

1 5

R11

R12

R13

R14Is*Rs

U5

LM311N

B/STB VS+

GND

BAL

VS-

2

3

4

8

7

1

56

Vee

Vdd

Inverted_Sawtooth

To_Reset_Pin

R15

Subtractor

PI_Controller

Multiplier

ADDER

Comparator



809

Figure 7. Pulses for single phase bi-directional converter

Figure 8. Experimental setup for 1KVA Single phase Bi-directional Converter

Figure 9.Outputs of CD 4093 IC

Figure 10.Input and Output of an inverted amplifier

U7

4043BP_15V

Q0

Q1R1S1

EO

S2R2

VSS

Q2

Q3R3S3

NC

S0R0

VDD

U2A

4093BP_15V

U6A

4001BD_15V

VddC1

R2

To

_R

ese

t_P

in

U2B

4093BP_15V

U6B

4001BD_15V

VddC2

C3

Triggered_pulse

R1 VDD

U1B

4001BD_15V

U3A

4081BP_15V

R4

C4D1

1N4148

R3

C5D2

1N4148

U3B

4081BP_15V

Q

Q0



810

Figure 11.Output of Reset Integrator

Figure 12.Inputs of Subtractor Circuit for inverted saw-tooth

wave

Figure 13.Output of Subtractor Circuit for inverted saw-tooth

wave

Figure 14. Pulse for set pin of SR Flip-Flop

Figure 15. Output of PI controller

Figure 16. Fictitious Current Waveform

Figure 17. Output of Analog Multiplier

Figure 18. Instantaneous Source Current



811

Figure 19. Controlled current waveform

Figure 20. Output of Comparator

Figure 21. Inputs of SR-Flip Flop

Figure 22. Input and Output of SR-Flip Flop

Figure 23. Output of SR-Flip Flop and NOR gate

Figure 24. Input and Output of Delay circuit

Figure 25. Enlarged view of Input and Output of Delay

Figure 26. Enlarged view of Input and Output of Delay



812

CONCLUSION

This paper has reviewed the performances of three One Cycle

Control schemes. The power factor of medium and high-power

grid-connected converters based on Basic-OCC and Modified-

OCC varies with the load. However, it is high and independent

of load handled by the converter based on Constant Power

Factor-OCC. Thus this paper presents the implementation of

CPF-OCC using analog ICs. From this hardware

experimentation, it was confirmed that the implementation of

OCC is simple and can be easily constructed to achieve the

acceptable gate signals for the power electronic converters.

ACKNOWLEDGMENT

The authors would like to thank Universiti Teknologi

PETRONAS for supporting this work.

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Implementation of One cycle Controller for Single phase Bi · PDF file · 2017-04-08Using voltage-second balance of an inductor in one switching cycle, ... Integral Constant

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