Top Banner
Implementation of 32-bit ALU using VHDL
26

Implementation of 32-bit ALU using VHDL

May 24, 2015

Download

Engineering

Bhavyai Gupta

Implement Arithmetic Logic Shift Unit of 32-bit in VHDL
Welcome message from author
This document is posted to help you gain knowledge. Please leave a comment to let me know what you think about it! Share it to your friends and learn new things together.
Transcript
Page 1: Implementation of 32-bit ALU using VHDL

Implementation of 32-bit

ALU using VHDL

Page 2: Implementation of 32-bit ALU using VHDL

Mentor : Dr. Malti Bansal

(Assistant Professor)

Presented By - Bhavyai Gupta 2k12/EC/051 Anadi Anant Jain 2k12/EC/024 Ankush 2k12/EC/029 Faizan Ayubi 2k12/EC/065

Page 3: Implementation of 32-bit ALU using VHDL

Contents

Introduction to VHDL

Xilinx

Arithmetic Unit

Logic Unit

Shift Unit

Arithmetic Logic Unit

Output

Inference

Page 4: Implementation of 32-bit ALU using VHDL

VHDL

Page 5: Implementation of 32-bit ALU using VHDL

Introduction to VHDL

VHDL is an industry standard language for the description, modelling and synthesis of digital circuits and systems.

VHDL provides high level language constructs that enable designers to describe large circuits and being products to market rapidly.

It also facilitates converting a design from a programmable logic to an ASIC implementation.

At a higher level of design process, simulation provides information regarding the functionality of the system under the design. Normally, the simulation of this level is very quick, but doesn’t provide the detailed information about the circuit’s functionality and timing.

The simulation of the lower level of the design process, runs more slowly, but provides more detailed information about the timing and functionality of the circuits.

Page 6: Implementation of 32-bit ALU using VHDL

Xilinx

Page 7: Implementation of 32-bit ALU using VHDL

Why Xilinx?

Xilinx Inc. is the world's largest supplier of programmable logic devices, the

inventor of FIELD PROGRAMMABLE LOGIC ARRAY (FPGA) and the first semi-

conductor company with a fabulous manufacturing model.

Founded in Silicon Valley in 1984 and head quartered in San Jose,

California, USA, the company has corporate offices throughout North

America and Europe.

The programmable logic device market has been led by Xilinx since the

late 1990s. Over the years, Xilinx has fuelled an aggressive expansion to

India, Asia and Europe- regions.

Page 8: Implementation of 32-bit ALU using VHDL

Arithmetic Unit

Page 9: Implementation of 32-bit ALU using VHDL

Functioning of Arithmetic Unit

An Arithmetic unit does the following task: Addition, Addition with carry,

Subtraction, Subtraction with borrow, Decrement, Increment and Transfer function.

Now first of all we start with making one bit Full Adder, then a 4-bit Ripple Carry Adder using four numbers of Full Adder and at last a 32-bit Ripple Carry Adder using eight numbers of 4-bit Ripple Carry

Adder. Then we have designed thirty two numbers of single-bit 4:1 Multiplexer.

C_in is the carry input of the parallel adder and the carry out is Cout. The

thirty two inputs to each multiplexer are B- value, Complemented B-value, logic-0 and logic-1.

The output of the circuit is calculated from the following arithmetic sum:

RESULT = A + Y + C_in

Where A is a 32-bit number, Y is the 32-bit output of multiplexers and C_in is the carry input bit to the parallel adder.

Page 10: Implementation of 32-bit ALU using VHDL

Logic Unit

Page 11: Implementation of 32-bit ALU using VHDL

Functioning of Logic Unit

A Logic unit does the following task:

Logical AND, Logical OR, Logical XOR

and Logical NOT operation.

We will design a logic unit that can

perform the four basic logic micro-

operations: OR, AND, XOR and

Complement, because from these four micro-operations, all other logic

micro-operations can be derived.

The logic unit consists of four gates

and a 4:1 multiplexer. The outputs of

the gates are applied to the data

inputs of the multiplexer. Using to

selection lines S0 and S1 one of the data inputs of the multiplexer is

selected as the output.

For a logic unit of 32-bit, the output will

be of 33-bit with 33th bit to be High-

impedanced.

Page 12: Implementation of 32-bit ALU using VHDL

Shift Unit

Page 13: Implementation of 32-bit ALU using VHDL

Functioning of Shift Unit

Shift unit is used to perform logical shift

micro-operation. The shifting of bits of

a register can be in either direction-

left or right.

For a shift unit of 32-bit, the output will

be of 33-bit with 33th bit to be the

outgoing bit. The circuit of shift unit is shown in figure.

The content of a register that has to

be shifted first placed onto common

bus. This circuit uses no clock pulse.

When the shifting unit is activated the

register is shifted left or right according to the selection unit.

Page 14: Implementation of 32-bit ALU using VHDL

Arithmetic Logic

Unit

Page 15: Implementation of 32-bit ALU using VHDL

Functioning of ALU

The ALU is a building block of any

microprocessor or DSP that performs

many arithmetic functions based on

the control input selection. The ALU is

the heart of a microprocessor and performs all the basic operations.

The ALU can perform basic arithmetic functions such as addition, subtraction

etc. and logic functions including

add, subtract, logic AND, logic OR,

and logic XOR.

These various functions of the ALU are

implemented using a set of functional

units each implementing a function,

these may also be done using sharing

of same hardware with use of certain additional units like multiplexers.

Operands A and B are both 32 bits each. These are fed to these

functional units along with select lines

which decide the operation to be

performed.

Page 16: Implementation of 32-bit ALU using VHDL

Operations in ALU

Shift

RIGHT

LEFT

Arithmetic

INCREMENT

DECREMENT

ADDITION

SUBTRACTION

MULTIPLICATION

DIVISION

Logical

AND

OR

XOR

NOT

Page 17: Implementation of 32-bit ALU using VHDL

Execution in ALU

For executing an instruction in a microprocessor, the instruction is fetched in the first clock cycle using the instruction pointer and decoded.

The control unit then calculates the memory addresses of the operands using ALU using the offset obtained from the instruction, loads the address onto the address buses of the CPU and fetches the operands from their locations in memory and feeds them as inputs to the ALU through the system buses.

During the next clock cycle the ALU operates on the operands which it receive on the data buses of the CPU and produce the result.

Also depending on the result of the operation the flag register is set by the ALU. Next the result of operation is either stored to a register or written to the memory. Finally the address of next instruction is calculated and execution proceeds in a similar manner as above.

Page 18: Implementation of 32-bit ALU using VHDL

Outputs OUTPUT WITHOUT CLOCK

GIVING CLOCKS

OUTPUT WITH CLOCK

Page 19: Implementation of 32-bit ALU using VHDL

Output: Without Any Clock

Page 20: Implementation of 32-bit ALU using VHDL

Giving Clock in i_a

Page 21: Implementation of 32-bit ALU using VHDL

Giving Clock in i_b

Page 22: Implementation of 32-bit ALU using VHDL

Giving Clock in c_in

Page 23: Implementation of 32-bit ALU using VHDL

Giving Clock in Select Lines

Page 24: Implementation of 32-bit ALU using VHDL

Output: With Clock

Page 25: Implementation of 32-bit ALU using VHDL

Output: With Clock

Page 26: Implementation of 32-bit ALU using VHDL

Inference

In our project “Design and Implementation of a 32-bit ALU on Xilinx using VHDL” we have designed and implemented a 32 bit ALU. Arithmetic Logic Unit is the part of a computer that performs all arithmetic computations, such as addition and subtraction, increment, decrement, shifting and all sorts of basic logical operations. The ALU is one component of the CPU (Central Processing Unit).

Here, using VHDL we have designed a 32 bit ALU which can perform the various arithmetic operations of Addition, Subtraction, Increment, Decrement, Transfer, logical operations such as AND, OR, XOR, NOT and also the shift operation.

All the above mentioned operations are then verified to see whether they match theoretically or not. The above given waveforms show that they match completely thereby verifying our results.