IC CAD Market Trends 2015 - Gary Smith EDAIC CAD market vendor revenue reached $2,295.3 in 2014. Worldwide CAD revenue captured 29% share of total EDA in 2014. The IC CAD market covered
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C O N S U L T I N G I N E L E C T R O N I C D E S I G N
CUSTOM LAYOUTCustom Layout design tools that work at the transistor level to size transistors, are used in processor, memory, analog design and device design where performance or device scaling is of prime importance. Vendor revenues totaled $241.3 in 2014. Eight vendors participated in the survey in 2014. Cadence remains the number one vendor with over 68 percent market share (see Figure C-4). Tanner, recently acquired by Mentor Graphics, MicroMagic and Silvaco are expected to grow share in the coming forecast years. MicroMagic now offers its MAX 3D design suite for advanced 3D design stacking and Interposer development. The long-range forecast in Figure C-5 shows the
market CAGR at 10.7 percent.
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Figure C-4: Custom Layout Market Share 2014
(Source: Gary Smith EDA, November 2015)
JEDAT5%
Mentor Graphics4%
Silvaco3%
Tanner 3%
MicroMagic1%
Cadence Design Systems
68%
Synopsys8%
Sagantec8%
201.4 213.3 238.8 241.3
303.0 350.2 360.2 371.0
402.0
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450.0
2011 2012 2013 2014 2015 2016 2017 2018 2019
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(Source: Gary Smith EDA, November 2015)
PHYSICAL VERIFICATION
DESIGN RULE CHECKING (DRC)DRCisusedtoperformfinalverificationonanICdesignbeforemakingmasks.DRCgrewto$261.2in2014,led by Mentor Graphics at $163.9. Mentor Graphics now owns 63 percent share of the DRC market. Figure
C-6 illustrates the market share distribution for the major vendors of DRC tools. Figure C-7 captures the
2015 forecast of DRC through 2019.
C O N S U L T I N G I N E L E C T R O N I C D E S I G N
EXTRACTIONExtraction tools are used to determine the parasitic effects caused by the physical implementation of the design. Synopsys maintained its lead in this area with 50 percent market share as seen in Figure C-8. Success in next generation process technologies depends on parasitic extraction tools that can provide accurate transistor level extraction of parasitic effects. Extraction tools are solutions that speed up design cycle times for multiple design applications. Figure C-9 shows a steady forecast
through 2019.
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(Source: Gary Smith EDA, November 2015)
212.7 226.6 248.9 261.2 268.5
298.0 298.0 289.8 296.0
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2011 2012 2013 2014 2015 2016 2017 2018 2019
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Figure C-8: Extractor Market Share 2014
(Source: Gary Smith EDA, November 2015)
ANSYS3%
OptEM Engineering2%
Silvaco0%Synopsys
50%
Cadence Design Systems
32%
Mentor Graphics13%
Figure C-6: DRC Market Share 2014
(Source: Gary Smith EDA, November 2015)
Silvaco1%
Tanner1%
MicroMagic0%Mentor Graphics
63%
Cadence Design Systems
20%Synopsys
15%
C O N S U L T I N G I N E L E C T R O N I C D E S I G N
Physicalanalysistoolsareusedtoanalyzethephysicaleffectsofthefinaldesignlayout.Thissub-application segment consists of IC Power analysis, Signal Integrity, Timing analysis, Electro Magnetic Interference (EMI), and Metal Migration. The Timing, EMI, and Metal Migration sub application numbers are small, with few companies represented (see Figure C-10). However, the sub
applications have been included in the long-range forecast shown in Appendix A.
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Figure C-10: Timing, EMI, and Metal Migration Market Share 2014
(Source: Gary Smith EDA, November 2015)
Ansys (Apache) Timing10%
OptEM-EMI5%Ansys EMI
62%
Quantic EMC Metal Mig.
20%Applied Simulation
Technology-EMI3%
106.9 119.6 119.0
126.5 129.0 135.5 142.2
149.3 155.0
0.0
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2011 2012 2013 2014 2015 2016 2017 2018 2019
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(Source: Gary Smith EDA, November 2015)
IC POWERIn the power market, Ansys grew its revenue in IC Power tools in 2014 to $70.7 and controls over 69 percent of this market (see Figure C-11). Cadence ranks number two in this market after its acquisition of Sigrity (see Figure C-12). Increasing device complexity, power dissipation, and chip scaling makes thermal/power analysis critical to chip, package, board and system integrity and reliability. Other companies that will drive growth and new products of power analysis and optimizations include: ARM, Envis, Keysight EEsof, Library Technologies, Mentor Graphics, OEA International, and Silvaco.
C O N S U L T I N G I N E L E C T R O N I C D E S I G N
used by IC designers. It split into two camps in the 1980s: P-SPICE used primarily by PCB
designers and H-SPICE used by IC designers. Cadence owns P-SPICE and Synopsys owns H-SPICE.
Synopsys led the IC SPICE market in 2014 with over 68% percent share. Their revenue reached
$65.8 in 2014. There are now over 20 competitors in this market, which is expected to reach $188 by 2019 as shown in Figure C-16. A fairly new competitor to this area is ProPlus Design Solutions.
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(Source: Gary Smith EDA, November 2015)
63.7 62.2 72.6
78.8 83.0 87.2 91.5 96.1 110.0
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2011 2012 2013 2014 2015 2016 2017 2018 2019
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Figure C-13: Signal Integrity Market Share 2014
(Source: Gary Smith EDA, November 2015)
Synopsys48%
Quantic EMC7%
Ansys6%
OptEM Engineering
2%
Cadence Design Systems
37%
C O N S U L T I N G I N E L E C T R O N I C D E S I G N
ProPlus introduced its NanoSpice™ product in 2015. NanoSpice is a next-generation high-capacity, high-performance parallel SPICE simulator for giga-scale circuit simulation. As stated by Dr. Zhihong Liu, executive chairman of ProPlus, this new simulation technology is essential for deep nanometertechnologydesignswhereprocessvariationssignificantlyimpactcircuityieldandperformance. The need for giga-scale simulations is being driven by complex designs and because of the large number of simulations required to design for variation effects. Traditional SPICE simulators lack capacity requirements even with parallelization. FastSPICE simulators that deliver capacity at the cost of accuracy are losing steam as an increasing number of designs require post-layoutverificationthatweakenscircuithierarchy.NanoSPICEissuitedforapplicationssuchas memory, analog/mixed-signal, I/O, custom digital and standard cell design. NanoSpice handles challenging designs, including the characterization of large embedded SRAM blocks, post-layout analysis of analog circuits, sign-off simulation of full-chip power integrated circuit (IC) or wireless
transceiver circuits, and accurate clock tree and critical path analysis.
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Figure C-15: IC SPICE Market Share 2014
(Source: Gary Smith EDA, November 2015)
Synopsys68%
Applied Simulation Technology
2%ProPlus Design
Solutions2%
Tanner0%
Silvaco28%
120.9
101.8 91.5 96.5
130.0 136.5
165.0 173.3
188.0
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2011 2012 2013 2014 2015 2016 2017 2018 2019
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(Source: Gary Smith EDA, November 2015)
C O N S U L T I N G I N E L E C T R O N I C D E S I G N