Hp-r5052%2c+Hpr5052x+Xaa+Chassis+d71cn Hd Pod Hdmi Strausss+Parts%2c+Service+Manual

Figure 1

Figure 2

SUBJECT: Procedure for replacing Plasma panel assembly. PROCEDURE: PREPARATION AND INITIAL DISASSEMBLY 1. Plasma placed face down on padded surface. 2. Remove the Stand. 3. Remove the center signal processing PCB shield. 4. Remove the main back cover. V/A PROCESSING BOARD DISASSEMBLY 1. Remove all the connectors from the Video /

Audio Signal Processing PCB. 2. Remove the V/A Signal Processing PCB. 3. Remove the V/A Signal Processing PCB

internal shield. (Sub Shield) 4. Remove the connectors from the Power

Supply and Logic PCB from the defective panel assembly. You need them to install on the new panel assembly since they are not included.

DEFECTIVE PANEL ASSEMBLY REMOVAL 1. Remove the 4 corner screws from the defective

panel assembly. See figure 1. 2. Remove the defective panel Assembly from the cabinet. 3. Pull up on the wall mount metal brackets to

remove the defective panel Assembly from the cabinet. See figure 2.

4. Inspect and clean the polarizer glass filter for dirt and marks if necessary.

Tech Tip PRODUCT: Plasma TV TIP NUMBER: ASC20051115003 TIP DATE: 11/15/2005 MODELS:

All 50” Screen Size

Chassis N/A

Figure 3

Figure 4

NEW PANEL ASSEMBLY INSTALLATION 1. Remove new panel assembly from

protective bag. 2. Do not touch the panel glass. 3. Mount panel assembly w/support

transport jig over the cabinet. Use caution not to bend the panel assembly or else the panel may become defective.

4. Line up the corners of the panel assembly with the inside corners of the cabinet.

5. Remove the 4 screws that connect the panel assembly with the transport jig. See figure 3.

6. The panel assembly should lower into the cabinet. If not, carefully reposition until the panel assembly is properly aligned with the four cabinet corner screw holes.

7. Secure the panel assembly to the cabinet with the 4 corner screws. See figure 1.

V/A PROCESSING BOARD REASSEMBLY 1. Replace all the connectors to the Power Supply and Logic PCBs. 2. Align all connections that will connect to the V/A Processing PCB before

installing the V/A Signal Processing PCB internal shield. 3. Install the V/A Signal Processing PCB internal shield. 4. Install the V/A Signal Processing PCB. 5. Reconnect all the connectors to the V/A Signal Processing PCB. NEW PANEL ASSEMBLY TEST & ADJUSTMENT 1. Test fire to confirm the new panel

Assembly is OK. 2. Connect R, G, B & W Raster pattern

generator to the unit. 3. Plug the unit in and turn it on. 4. Confirm the display fully lights up. 5. Check for pixel defects using R, G, B

& W Raster pattern. 6. Confirm the Menu function works. 7. Confirm and set Panel Sticker Voltages.

See figure 4. 8. Confirm and adjust panel voltages according to the panel sticker. UNIT REASSEMBLY Re-install the main back cover. Re-install the center signal-processing shield. Re-install the stand.

Stand the unit back up. VIDEO TEST & ADJUSTMENT Reconnect all video inputs. Test picture quality of all inputs. Perform White Balance adjustment in service mode if necessary. (Consult the Service Manual). Note: Consult Disassembly and re-Assembly instructions in the Service Manual for more information. This procedure is intended to be used as a general guide for all 50” Plasma units. Specific items may not match the unit you are working on. In this case consult the Service Manual for more detail. FINAL STEP Re-Attach the Transport Jig to the defective Panel Assembly. Place the defective panel Assembly back in the wooden crate. Seal and return to Samsung Parts.

Note: Consult the Samsung Service Website at (www.samsungasc.com) for the Service Manual and other information on this product.

PLASMA DISPLAY TVChassis : D71C(N_HD_POD_HDMI)_StraussModel : HPR5052X/XAA (HP-R5052)

PLASMA DISPLAY TV FEATURES

NTSC/ATSC Tuner Built-In

12-Bit Processing (68.7 Billion Colors)

Split Screen & Picture-In-Picture

Samsung DNIe™™(Digital Natural Image engine)

SRS TruSurround XT™™

1 HDMI Input

Energy Saving

Anynet™™ System Control Solution

SAMSUNG EPG System

Digital Cable Card Slot

SERVICE Manual

HP-R5052

This Service Manual is a property of Samsung Electronics Co.,Ltd.Any unauthorized use of Manual can be punished under applicableInternational and/or domestic law.

© Samsung Electronics Co., Ltd. Jul. 2005Printed in KoreaAA82-02311A

ELECTRONICS

Table of Contents

Chapter 1 Precaution 1-1 Safety Precautions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-1 1-2 Servicing Precautions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-3 1-3 Static Electricity Precautions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-4 1-4 Installation Precautions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-5

Chapter 2 Product Specification 2-1 Product Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-1 2-2 Key Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-2 2-3 Specifications Analysis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-5 2-4 Accessories . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-6

Chapter 3 Alignment & Adjustment 3-1 Service Instruction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-1 3-2 How to Access Service Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-2 3-3 Factory Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-3 3-4 Service Adjustment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-11 3-5 Software Upgrade . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-16 3-6 Replacements & Calibration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-18

Chapter 4 Exploded View & Part List 4-1 HPR5052X/XAA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-1

Chapter 5 Electrical Part List 5-1 HPR5052X/XAA Service Item . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-1

Chapter 6 Troubleshooting 6-1 First Checklist for Troubleshooting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-1 6-2 Checkpoints by Error Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-2 6-3 Troubleshooting Procedures by ASS'Y . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-7

Chapter 7 Block Diagram 7-1 Overall Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-1 7-2 Partial Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-2

Chapter 8 Wiring Diagram 8-1 Overall Wiring . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-1

Chapter 9 PCB Diagram 9-1 Overall PCB Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-1

Chapter 10 Schematic Diagram 10-1 POWER & TUNER . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-1 10-2 SOUND-PROCESS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-2 10-3 MICOM & IO-EX & AV IN/OUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-3 10-4 HDMI & PC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-4 10-5 SVP-EX52 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-5 10-6 S3C2800 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-6 10-7 EAGLE+ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-7 10-8 POD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-8 10-9 DNIe Lite & LVDS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-9 10-10 Function A'ssy Board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-10 10-11 Power & IR A'ssy Board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-11

Chapter 11 Operation Instruction & Installation 11-1 Product Features and Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-1 11-2 New Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-5 11-3 Installation Notes and Precautions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-7

Chapter 12 Disassembly & Reassembly 12-1 Overhaul Disassembly & Reassembly . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12-1

Chapter 13 Circuit Description 13-1 Power ON/OFF Signal Timing Sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13-1 13-2 Partial Block Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13-2 13-3 New Circuit Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13-28

Chapter 14 Reference Information 14-1 Other issues related to other products . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14-1 14-2 Technical Terms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14-3

1. Make sure all protective devices are properly installedincluding non-metallic handles and compartment coverswhen installing or re-installing the chassis or chassisassemblies.

2. Make sure that no gaps exist between the cabinets forchildren to insert their fingers in to prevent children fromreceiving electric shocks. Gaps mentioned above includeventilation holes of a too great magnitude between thePDP module and the cabinet mask, and the improperinstallation of the rear cabinet.

Errors may occur when the resistance is below 1.0 orover 5.2 .In these cases, make sure that the device is repairedbefore sending it back to the customer.

3. Check for Electricity Leakage (Figure 1-1)Warning: Do not use an insulated transformer for check-ing the leakage. Use only those current leakage testersor mirroring systems that comply with ANSIC 101.1 andthe Underwriter Laboratory's specifications (UL1410,59.7).

Fig. 1-1 AC Leakage Test

4. A high voltage is maintained within the specified limitsusing safety parts, calibration and tolerances. When voltage exceeds the specified limits, check each specialpart.

5. Warning for Engineering Changes:Never make any changes or additions to the circuitdesign or the internal part for this product.Ex: Do not add any audio or video accessoryconnectors. This might cause physical damage.Furthermore, any changes or additions to the originaldesign/engineering will invalidate the warranty.

6. Warning - Hot Chassis:Some TV chassis are directly connected to one end ofthe AC power cord for electrical reasons.Without insulated transformers, the product can only berepaired safely when the chassis is connected to theearthed end of the AC power source.

To make sure the AC power cord is properly connected,follow the instructions below. Use the voltmeter tomeasure the voltage between the chassis and theearthed ground. If the measurement is over 1.0V, unplugthe AC power cord and change the polarity before re-inserting it. Measure the voltage between the chassisand the ground again.

7. Some TV chassis are shipped with an additionalsecondary grounding system. The secondary system isadjacent to the AC power line. These two groundingsystems are separated in the circuit using anunbreakable/unchangeable insulation material.

8. When any parts, material or wiring appear overheated ordamaged, replace them with new regular onesimmediately. When any damage or overheating isdetected, correct this immediately and make a regularcheck of possible errors.

9. Check for the original shape of the lead, especially thatof the antenna wiring, any sharp edges, the AC powerand the high voltage power. Carefully check if the wiringis too tight, incorrectly placed or loose. Never change thespace between the part and the printed circuit board.Check the AC power cord for possible damages. Keepthe part or the lead away from any heat-emittingmaterials.

Precaution

Samsung Electronics 1-1

LEAKAGECURRENTTESTER

DEVICEUNDERTEST

TEST ALLEXPOSED METAL

SURFACES

2-WIRE CORD

ALSO TEST WITHPLUG REVERSED

(USING AC ADAPTERPLUG AS REQUIRED)

EARTHGROUND

(READING SHOULDNOT BE ABOVE

0.5mA)

To avoid possible damages or electric shocks or exposure to radiation, follow the instructions below with regard to safety,installation, service and ESD.

1. Precaution

1-1 Safety Precautions

10. Safety Indication:Some electrical circuits or device related materialsrequire special attention to their safety features, whichcannot be viewed by the naked eye. If an original part isreplaced with another irregular one, the safety orprotective features will be lost even if the new one has ahigher voltage or more watts.

Critical safety parts should be bracketed with ( ).Use only regular parts for replacements (in particular,flame resistance and dielectric strength specifications).Irregular parts or materials may cause electric shock orfire.

Precaution

1-2 Samsung Electronics

!

1. The service instructions are printed on the cabinet, andshould be followed by any service personnel.

2. Make sure to unplug the AC power cord from the powersource before starting any repairs.(a) Remove or re-install parts or assemblies.(b) Disconnect the electric plug or connector, if any.(c) Connect the test part in parallel with the electrolyticcapacitor.

3. Some parts are placed at a higher position than theprinted board. Insulated tubes or tapes are used for thispurpose. The internal wiring is clamped using buckles toavoid contact with heat emitting parts. These parts areinstalled back to their original position.

4. After the repair, make sure to check if the screws, partsor cables are properly installed. Make sure no damage iscaused to the repaired part and its surroundings.

5. Check for insulation between the blade of the AC plugand that of any conductive materials (i.e. the metalpanel, input terminal, earphone jack, etc).

6. Insulation Check Process: Unplug the power cord fromthe AC source and turn the switch on. Connect the insu-lating resistance meter (500v) to the AC plug blade.

The insulating resistance between the blade of the ACplug and that of the conductive material should be morethan 1 .

7. Any B+ interlock should not be damaged.If the metal heat sink is not properly installed, noconnection to the AC power should be made.

8. Make sure the grounding lead of the tester is connectedto the chassis ground before connecting to the positivelead. The ground lead of the tester should be removedlast.

9. Beware of risks of any current leakage coming intocontact with the high-capacity capacitor.

10. The sharp edges of the metal material may causephysical damage, so ensure wearing protective glovesduring the repair.

11. Due to the nature of plasma display panels, partial after-images may appear if a still picture is displayed on thescreen for a long period of time.This is caused by brightness deterioration due to thestorage effect of the panel, and to prevent this fromhappening, we recommend that the brightness and con-trast are reduced.(e.g.) Contrast: 25, Brightness: 50

Precaution


Warning 1: First carefully read the "Safety Instruction" in this service manual.When there is a conflict between the service and the safety instructions, follow the safety instruction at all times.

Warning 2: Any electrolytic capacitor with the wrong polarity will explode.

1-2 Servicing Precautions

1-3 Static Electricity Precautions1. Some semi-conductive ("solid state") devices are

vulnerable to static electricity. These devices are knownas ESD. ESD includes the integrated circuit and the fieldeffect transistor. To avoid any materials damage fromelectrostatic shock, follow the instructions describedbelow.

2. Remove any static electricity from your body byconnecting the earth ground before handling anysemi-conductive parts or ass'ys. Alternatively, wear adischargeable wrist-belt.(Make sure to remove any static electricity beforeconnecting the power source - this is a safety instructionfor avoiding electric shock)

3. Remove the ESD ass'y and place it on a conductivesurface such as aluminum foil to prevent accumulatingstatic electricity.

4. Do not use any Freon-based chemicals.Such chemicals will generate static electricity thatcauses damage to the ESD.

5. Use only grounded-tip irons for soldering purposes.

6. Use only anti-static solder removal devices.Most solder removal devices do not support ananti-static feature. A solder removal device without ananti-static feature can store enough static electricity tocause damage to the ESD.

7. Do not remove the ESD from the protective box until thereplacement is ready. Most ESD replacements arecovered with lead, which will cause a short to the entireunit due to the conductive foam, aluminum foil or otherconductive materials.

8. Remove the protective material from the ESDreplacement lead immediately after connecting it to thechassis or circuit ass'y.

9. Take extreme caution in handling any uncovered ESDreplacements. Actions such as brushing clothes or liftingyour leg from the carpet floor can generate enough staticelectricity to damage the ESD.

Precaution


CAUTION

These servicing instructions are for use by qualified service personnel only. To reduce the risk of electric shock do not perform any servicing other than that contained in theoperating instructions unless you are qualified to do so.

Precaution


1-4 Installation Precautions1. For safety reasons, more than two people are required

for carrying the product.

2. Keep the power cord away from any heat emittingdevices, as a melted covering may cause fire or electricshock.

3. Do not place the product in areas with poor ventilationsuch as a bookshelf or closet. The increased internaltemperature may cause fire.

4. Bend the external antenna cable when connecting it tothe product. This is a measure to protect it from beingexposed to moisture. Otherwise, it may cause a fire orelectric shock.

5. Make sure to turn the power off and unplug the powercord from the outlet before repositioning the product.Also check the antenna cable or the external connectorsif they are fully unplugged. Damage to the cord maycause fire or electric shock.

6. Keep the antenna far away from any high-voltage cablesand install it firmly. Contact with the high-voltage cable orthe antenna falling over may cause fire or electric shock.

7. When connecting the RF antenna, check for a DTVreceiving system and install a separate DTV receptionantenna for areas with no DTV signal.

8. When installing the product, leave enough space (4")between the product and the wall for ventilationpurposes.A rise in temperature within the product may cause fire.

9. When moving a PDP with attached speakers, detach thespeakers first before moving the main body.Moving the PDP main body without separating thespeakers may cause the speakers to detach, possiblycausing damage or injury.


MEMO

Product Specification


2. Product Specification2-1 Product Features

Block Specfication Major IC Remark

RF Digital/Analog (DTV Built In) POD NIM TunerS5H2010A01 (Eagle+)

PDP Module Samsung SDI V4 Module 50" HD New ModulePower Samsung electro mechanics SMPS 50" HD SMPS New SMPS

Video

NTSC 3.58, ATSCHDMIDNIe LiteComponent, PC

STP22 (Scaler)SDP43 (DNIe Lite)MST9883 (PC A/D)SiI9993 (HDMI)

Sound Speaker : 15W + 15WSRS TruSurround XT, Dolby Digital

MSP4440G, NSP-6241TAS5122

Optical, CoaxialOutput

Cabinet S5 Design New Cabinet

Chip Description- DNVD355BH401A Tuner : ATSC/NTSC/QAM POD NIM Tuner- STP22 : Component, CVBS, Y/C, HDMI, PC input Video signal processor- SDP43 : The DNIe IC for visual quality improvement. (DNIe Lite)- Sii9993 : Converts the TMDS signal on the HDMI input into 8 bit digital R, G, B signals.- MSP4440G : Sound Processing IC- MST9883 : A/D converts the R, G, B input signal from 15 Pin PC video to 8 bit digital R, G, B signals.- NSP6241A: Sound PWM IC- TAS5122 : Sound AMP IC- S5H2010A01 : MPEG Decoder IC (EAGLE+)- S3C2800X01 : CPU IC- 3F8668 : Generates various control signals required for operating the circuit.

The software is downloaded through PC D-SUB Jack. (Sub Micom)



2-2 Key FeaturesModel HP-R5052

Dimensions Display48.43 (W) x 32.52 (H) x 3.72 (D) inches (Without Stand)48.43 (W) x 34.47 (H) x 13.18 (D) inches (With Stand)

Weight Display46.8Kg / 103.17 lbs (Without Stand)

53.5Kg / 117.95 lbs (With Stand)Voltage AC 110 V~, 60 HzPower Consumption 420WNumber of Pixels 1366 (H) x 768 (V)Screen Size 50 inches

ANTENNA inputANT 1 - CABLE IN

ANT 2 - AIR IN※ 75Ω unbalanced

VIDEO input

AVS-VIDEO

COMPONENT1 - 480i/480p/720p/1080iCOMPONENT2 - 480i/480p/720p/1080i

PCHDMI (DVI Compatible)

AUDIO input

AVS-VIDEO

COMPONENT1 - 480i/480p/720p/1080iCOMPONENT2 - 480i/480p/720p/1080i

PCDVI

AV Output AUDIO (L/R)Speaker Output 15W + 15W (8Ω )

Audio Output OPTICAL(DIGITALOUT)COAXIAL(DIGITALOUT)

ETC DNIe Lite, Anynet, Color Weakness, My Color Control, SRS TruSurround XT, Dolby Digital,Built-in Speaker/Stand, POD Cable card slot

New Function Energy Saving, Screen Burn Protection

H/W Configuration- DTV Module : S5H2010A01 (MPEG Decoder IC, Eagle+)- Video : STP-22, MST9883, SiI9993, DNIe Lite- Sound : MSP4440G, NSP-6241, TAS5122- Tuner : UMX-NT-041 (RF-Spitter), DVVD355BH401A (POD NIM Tuner)- CPU : S3C2800X01, S3F866B, P_PCFM_012

S/W Configuration- Main Program : TE28F128 (Flash memory)- Sub-Micom : S3F866B- DDC : 24C02 x2 (Analog DDC Data, Digital DDC Data)- EEPROM : 24C256 (White balance data and Factory initial data)



Picture- System : Video → ATSC / NTSC / QAM- Progressive- Output resolution : 1366 x 768 p- OSD : Smart user Interface Grade 1- Picture Enhancement : DNIe Lite- Still picture, Noise reduction- Comb Filter : 3D comb filter- PIP : Large, Double 1, Double 2- Picture Size : 16:9, Panorama, Zoom1, Zoom2, 4:3 (AV, S-Video, Component 480i/480p))

16:9, 4:3 (Component 720p/1080i, PC, HDMI)

Sound- System : Stereo- Dolby Digital, TruSurround XT- Output : 15W + 15W- Speaker : Built-in- Optical/Coaxial Sound Output : Dolby Digital, PCM (DTV), PCM (HDMI)

Feature- Component Interface(480i/480p/720p/1080i, Y/Pb/Pr)- Digital Interface : HDMI (480p/720p/1080i)- Auto Program- Sleep Timer : 180 Minutes- Anynet Interface- My Color Control- Color Weakness- Energy Saving- Screen Burn Protection

In/Out Terminals- 1 Monitor audio Output- 2 Component Inputs- 15 Pin PC D-sub Input- 1 HDMI Input- 2 SPDIF Output (Optical, Coaxial)- 2 RF Input : Cable/Air- 1 CVBS Input- 1 S-Video Input

Remocon- TM76

Power Supply- 110V~, 60Hz

Power Comsumption : 420W

HDMI input mode : 480p, 720p, 1080i

Note- You can input the DVI signal using the DVI ↔ HDMI conversion cable.- When connecting HDMI input using the DVI ↔ HDMI conversion cable, connect the sound signal to the DVI Audio IN port

using a separate connection cable.



PC(D-Sub 15Pin Jack) Input modeThe table below shows all of the display modes that are supported. (N : Negative, P : Positive)

Video Signal Resolution(Dot X Line)

VerticalFrequency (Hz)

HorizontalFrequency (KHz)

VerticalPolarity

HorizontalPolarity

IBM PC / ATCompatible

640 X 350 70.086 31.469 P N

720 X 400 70.087 31.469 N P

640 X 480

59.940 31.469 N N

70.000 35.000 N/P N/P

72.809 37.861 N N

75.000 37.500 N N

800 X 600

56.250 35.156 N/P N/P

60.317 37.879 P P

70.000 43.75 N/P N/P

72.188 48.077 P P

75.000 46.875 P P

1024 X 768

60.004 48.363 N N

70.069 56.476 N N

72.000 57.672 N/P N/P

75.029 60.023 P P

1280 X 720 59.855 44.772 P N

1360 X 768 60.015 47.712 P P



2-3 Specifications AnalysisModel HP-P5031 HP-P5071 HP-R5052

Design

Basic

Display Type PDP TV PDP TV PDP TVBuilt-In Tuner X X

Resolution 1366 x 768 1366 x 768 1366 x 768

PDP Module Samsung SDI V3 Samsung SDI V3 Samsung SDI V4Screen Size 50" 50" 50"Picture ratio 16:9 16:9 16:9

Power Consumption 490W 490W 420W

Dimensions 47.5"(W) x 28.5"(H) x 3.2"(D)(Without Stand)

49.5"(W) x 29.1"(H) x 3.3"(D)(Without Stand)

48.4"(W) x 32.5"(H) x 3.7"(D)(Without Stand)

Weight 91.9 Lbs (Without Stand) 97 Lbs (Without Stand) 103.17 Lbs (Without Stand)

Picture

Brightness 1,000 Cd/m2 1,000 Cd/m2 1,300 Cd/m2Contrast Ratio 3,000 : 1 3,000 : 1 10,000 : 1

Picture Enhacer DNIe 2 DNIe 2 DNIe LiteComb Filter

Audio

Equalizer 5 Band 5 Band 5 BandAuto Volume Control

Surround Sound SRS TruSurround XT SRS TruSurround XT SRS TruSurround XT Dolby DigitalSpeaker Output 15W +15W 15W +15W 15W +15W

Features

PIP

Double Window

Caption

Still Image

EPG × ×

My Color Control

Color Weakness

Energy Saving × ×

Anynet × ×

Connections

Antenna 1 1 2 (Cable/Air)AV Input 2 3 1S-Video 1 2 1

Component 2 2 2PC(D-SUB) 1 1 1

DVI 1 1 ×

HDMI × × 1POD Cable card × ×

Sub Woofer × × ×

Optical × × 1Coaxial × × 1

ETCSpeaker/Stand Built-in Speaker/Stand Built-in Stand Built-in Speaker/Stand

FCC Class Class B Class B Class B



2-4 Accessories Accessories Item Item code Remark

Supp

liedA

cces

sorie

s

Owner's Instructions BN68-00835A

Samsung Service center

Remote ControlAAA Batteries

BN59-00462A4301-000103

Power Cord 3903-000144

Anynet Cable BN39-00518A

Acce

ssor

iestha

tcan

bepu

rchas

edad

dition

ally

S-VIDEO Cable -

Internal shopping mall

HDMI Cable -

HDMI/DVI cable -

Component Cables (RCA) -

PC Cable -

PC Audio Cable -

Optical Cable -

Coaxial Cable -

Antenna Cable -

Alignment & Adjustment


3. Alignment & Adjustment3-1 Service Instruction * Check items listed after changing each

Replaced Items Item Code Check Items

ASSY PCB MISC-MAIN BN94-00671A1) Auto Program2) Let the user go through subscription process after contacting

user's cable service provider.ASSY PCB P-SMPS(MAIN) BN96-01801A Voltage AdjustmentASSY PCB P-SMPS(DC DC) BN96-01856A Voltage AdjustmentASSY PCB P-SMPS(POD) BN96-01805A -ASSY PDP P-LOGIC BOARD BN96-02031A -ASSY PDP P-X MAIN BOARD BN96-02024A -ASSY PDP P-Y MAIN BOARD BN96-02025A -ASSY PDP P-Y UPPER BUFFER BOARD BN96-02026A -ASSY PDP P-Y LOWER BUFFER BOARD BN96-02027A -ASSY PDP P-ADDRESS E BUFF BOARD BN96-02028A -ASSY PDP P-ADDRESS F BUFF BOARD BN96-02029A -ASSY PDP P-ADDRESS G BUFF BOARD BN96-02030A -

※ When replacing the SMPS or PDP panel, you have to check the voltage printed on the panel sticker and adjust it.



3-2 How to Access Service Mode

Using the Customer Remote

1. Turn the power off and set to stand-by mode.

2. Press the remote buttons in this order; MUTE-1-8-2- POWER ON to turn the set on.

3. The set turns on and enters service mode.

4. Press the Power button to exit and store data in memory.※ If you fail to enter service mode, repeat steps 1 and 2 above.

5. Initial SERVICE MODE DISPLAY State

※ "T-STRANUS0S-0036" and "T-STRANUS5-0117" are firmware version.The firmware version is subject to change without notice.

6. Buttons operations within Service ModeMENU Full Menu Display / Move to Parent Menu

Direction keys / Item Selection by Moving the Cursor

Direction keys / Data Increase/Decrease for the Selected Item

Source Cycles through the active input source that are connected to the unit

HDMI/DTV HDCalibration AdjustOption Byte Test PatternWhite Balance Chip DebuggerSVP-EX ChecksumMST9883 Option PDPMSP34XX RESETYC DelayDNIe Lite

T-STRANUS0S-0036 Jan 12 2005T-STRANUS5-0117 [Sec : 29]



3-3 Factory Data The underlined are items applied during the service adjustment. None of the others should be adjusted.

1. Calibration

3. White Balance

ITEMAV Calibration Off

Comp Calibration OffPC Calibration Off

2. Option Byte

ITEMCaption Level 16

MGT-VCT Ver. Check 0V-Chip Enable 1

Watchdog Enable 1Spread Enable PC 1

Clock Adjust 4Nim Version T310MSP Version G

New_WB_CbCr 1

ITEM RangeInitial Values of Input Modes

TV/AV/S-video Component PC HDMISub Bright(SVP) 0~1204 495 513 480 492R-Offset 0~1204 516 512 512 515G-Offset 0~1204 512 512 512 512B-offset 0~1204 512 512 512 511Sub Contrast(DNIe) 0~255 130 131 128 131R-Gain 0~255 128 128 128 128G-Gain 0~255 128 128 128 128B-Gain 0~255 140 140 128 140Sub Contrast(SVP) 256 256 256 256



4. SVP-EX


TV AV/S-VideoComponent

PC HDMI480i/P 720/1080

00.Comb Filter 01.Y-Filter 01.Peaking 01.V-PosGain 0~15 4 3 2 2 0 3 02.V-NegGain 0~15 4 4 4 2 0 4 03.V-BpGain 0~32 16 16 16 16 16 16 04.V-HfGain 0~32 20 20 20 20 20 20 05.V-Peaking-TH 1 0~256 16 16 16 16 16 16 06.V-Peaking-TH 3 0~256 128 128 128 128 128 12802.NR 01.Y-NR-Off02.C-NR-Off03.Y-NR-On04.C-NR-On

03.Deinterlace 01.Motion

04.Picture Gain Adjust 01.TCD3 Contrast 0~255 120 120 120 - 120 02.TCD3 Brightness 0~255 49 49 49 - 49 03.TCD3 YC Delay 0~15 1 1 1 - 1 04.Analog Y Offset 0~1023 61 61 61 - 61 05.Analog PB Offset 0~1023 512 512 512 - 512 06.Analog PR Offset 0~1023 512 512 512 - 512 07.Analog Y Gain 0~255 217 217 217 - 217 08.Analog PB Gain 0~255 225 225 225 - 225 09.Analog PR Gain 0~255 225 225 225 - 225 10.Black Level Setting 0~255 16 16 0 - 16 11.Brightness 0~255 128 125 128 - 128 12.UserColor(MAX) 0~127 127 127 120 - 12706.WB Control 01.MP R-Offset2 0~1023 512 512 512 512 512 02.MP G-Offset2 0~1023 512 512 512 512 512 03.MP B-Offset2 0~1023 512 512 512 512 512 04.PP R-Offset2 0~1023 512 512 512 512 512 05.PP B-Offset2 0~1023 512 512 512 512 512 06.PP B-Offset2 0~1023 512 512 512 512 512



ITEM SubAddress 'h Range

Initial Values of Input Modes

TV AV/S-Video

Component HDMIPC

480i 480p 720p 1080i 480P 720P 1080i

07. Chroma

01.LtiPeakGain P1 Luma/Croma 0x0F [4:0] 0~31 31 31 31 31 31 31 31 31 31

02.LtiStep P1 Luma/Croma 0x0F [6:5] 0~3 2 2 2 2 2 2 2 2 2

03.LtiTh P1 Luma/Croma 0x10 [7:0] 0~255 16 16 16 16 16 16 16 16 16

04.LtiGain P1 Luma/Croma 0x11 [4:0] 0~31 8 10 10 10 10 10 10 10 10

05.LowPassGain P1 Luma/Croma 0x12 [4:0] 0~31 18 24 17 15 15 20 10 10 10

06.BandPassGain P1 Luma/Croma 0x13 [4:0] 0~31 20 25 24 20 25 28 25 25 25

07.HighPassGain P1 Luma/Croma 0x14 [4:0] 0~31 10 28 18 18 24 24 24 24 24

08.PeakStep P1 Luma/Croma 0x12 [6:5] 0~3 1 1 1 0 0 0 1 0 0

09.PeakTh1 P1 Luma/Croma 0x15 [7:0] 0~255 7 7 7 7 7 10 7 7 7



12.PeakN1Factor2 P1 Luma/Croma 0x14 [7:5]P1 Luma/Croma 0x13 [7:5] 0~63 56 8 8 8 0 8 0 0 0

13.PeakN1Factor1 P1 Luma/Croma 0x1A [5:0] 0~63 40 48 48 40 48 40 40 40 40

14.CoringTh P1 Luma/Croma 0x17 [7:0] 0~255 2 2 2 2 2 2 2 2 2

15.CoringGain P1 Luma/Croma 0x18 [4:0] 0~31 8 0 8 8 8 12 8 8 8

16.PeakPosGain P1 Luma/Croma 0x49 [7:4] 0~15 1 1 2 2 2 2 1 2 2

17.PeakNegGain P1 Luma/Croma 0x49 [3:0] 0~15 1 1 2 2 1 1 1 2 2

18.BypassHsharp P1 Luma/Croma 0x1A [6] 0~1 0 0 0 0 0 0 0 0 0

19.DctiGain P1 Luma/Croma 0x28 [3:0] 0~15 4 4 10 10 10 10 4 4 4

20.DctiStep P1 Luma/Croma 0x29 [6:4] 0~7 1 1 7 1 1 1 1 1 1

21.DctiEnable P1 Luma/Croma 0x29 [7] 0~1 1 1 1 1 1 1 1 1 1

22.DctiThres P1 Luma/Croma 0x2A [7:0] 0~255 12 12 12 12 12 12 12 12 12

08.CLK_A P5. DSS 0x0A[15:0] 16~17 16 16 16 17

09.CLK_B P5. DSS 0x0B[15:0] 0~255 96 96 96 0

10.GAMMA 1 1 1 0



6. MSP34XX

7. YC Delay

5. MST9883


TV/AV/SVHS Component PC HDMIR_Gain 0~255 112 112 112 112G_Gain 0~255 112 112 112 112B_Gain 0~255 113 113 113 113R_Offset 0~255 122 122 122 122G_Offset 0~255 121 121 121 121B_Offset 0~255 122 122 122 122

ITEM Range Initial FM-Prescale 0~255 0x20NICAM-Prescale 0~255 0x20AV-Prescale 0~255 0x1CI2S_1 Prescale 0~255 0x10I2S_3 Prescale 0~255 0x11Carrier Mute 0~255 OnPilot High 0~255 0x0DPilot Low 0~255 0x07Scart1 Out Volume 0~255 0x6DScart2 Out Volume 0~255 0x73


TV/AV/SVHS Component PC HDMIRF PAL-B/G 0~255 0

- - -

RF PAL-D/K 0~255 0RF PAL- I 0~255 0RF SECAM-B/G 0~255 0RF SECAM-D/K 0~255 0RF SECAM-L/L' 0~255 0RF NTSC3.58 0~255 0RF NTSC4.43 0~255 0AV PAL 0~255 0AV SECAM 0~255 0AV NTSC 3.58 0~255 0AV NTSC4.43 0~255 0AV PAL60 0~255 0



8. DNIe Lite


TV/AV/SVHS Component PC HDMI01.PATT_SEL 0~63 0 0 0 002.BLACK_TILT 0~255 110 125 80 11003.BLACK_GAINMAX 0~1023 380 390 370 38004.TEST_MCC 0~255 0 0 0 005.OVERLAP_MCM 0~255 0 0 0 006.AREA_EN_MCC 0~255 31 31 31 3107.I2C Offset Mean 0~63 16 10 10 10

08.I2C Ana Check 0 0 0 0

09.White Balance(Post)

1.R-Offset(Post) -512~511 0 0 0 0 2.G-Offset(Post) -512~511 0 0 0 0 3.B-Offset(Post) -512~511 0 0 0 0 4.R-Gain(Post) 0~255 0 128 128 128 5.G-Gain(Post) 0~255 0 128 128 128 6.B-Gain(Post) 0~255 0 128 128 128 7.Com_Offset_Sel 0,1 1 0 0 0 8.Com_Gain_Sel 0,1 1 0 0 010.ColorTone Cool2

Refer to Table 311.ColorTone Cool112.ColorTone Normal13.ColorTone Warm114.ColorTone Warm215.MCM_EN 0,1 1 1 1 116.TEMP_DEST 0~255 150 150 150 15017.CB5_HIGH 0~255 139 140 156 14118.CR5_HIGH 0~255 125 126 126 12419.CB5_LOW 0~255 128 127 126 12820.CR5_LOW 0~255 129 130 129 129



9. Adjust


TV/AV/SVHS Component PC HDMI01.Video Mute Time 0~63 5 - - 502.Melody Volume 0~63 10 - - 2003.Dynamic Contrast 0 0 0 004.Dynamic Bright 0 0 0 005.Dynamic Color 0 0 0 006.Dynamic Sharpness 0 0 0 007.Standard Contrast 0 0 0 008.Standard Bright 0 0 0 009.Standard Color 0 0 0 010.Standard Sharpness 0 0 0 011.Movie Contrast12.Movie Bright13.Movie Color14.Movie Sharpness15.RF_dB_1 Rf AV -.Noise Thres1 0~255 20 20 -.LowPassGain1 0~31 7 14 -.BandPassGain1 0~31 12 19 -.HighPassGain1 0~31 6 16 -.PeakStep1 1 1 -.CoringTh1 2 2 -.CoringGain1 8 2 -.PosGain1 1 1 -.NegGain1 1 1 -.V-PosGain1 3 3 -.V-NegGain1 2 216.RF_dB_2 -.Noise Thres2 30 40 -.LowPassGain2 5 10 -.BandPassGain2 8 15 -.HighPassGain2 0 8 -.PeakStep2 0 0 -.CoringTh2 12 8 -.CoringGain2 8 10 -.PosGain2 1 1 -.NegGain2 1 1 -.V-PosGain2 2 2 -.V-NegGain2 1 1




TV/AV/SVHS Component PC HDMI17.RF_dB_3 -.Noise Thres3 40 60 -.LowPassGain3 0 5 -.BandPassGain3 0 12 -.HighPassGain3 0 4 -.PeakStep3 0 0 -.CoringTh3 26 14 -.CoringGain3 15 16 -.PosGain3 0 0 -.NegGain3 0 0 -.V-PosGain3 0 0 -.V-NegGain3 0 0

10. Test Pattern

01. OSD Pattern01. Luma Ramp(32 Step) 02. Luma Ramp(128 Step)03. White 1604. White 24005. Color Bar06. RGB Ramp(32 Step)07. Cross Hatch(20X20)

02. 1 Channel Pattern01. Y-Filter02. V-PosGain03. V-NegGain04. V-BpGain05. V-HfGain06. V-Peaking-Th107. V-Peaking-Th3

03. 2 Channel Pattern01. Luma Ramp(32 Step) 02. Luma Ramp(128 Step)03. White 1604. White 24005. Color Bar06. RGB Ramp(32 Step)07. Cross Hatch(20X20)

11. Chip Debugger : ON/OFF (Select this menu before downloading sub-micom image)

12. Checksum [XXXX]



ITEM Range Initial01.Pixel Shift 0 -.Pixel Shift Test 0~1 0 -.Number Range 0~1 1 -.Line Range 0~1 102.Sound SD delay 0~2 103.Sound HD delay 0~2 104.Sound DTV delay 0~1 005.DDC Write 0~1 006.Auto Voltage Adj 507.Image Sticking 008.Error Mode Check 109.Error Code Table 410.Patt Sel 011.Control Key Lock 012.FCRL Con 1

13. Option PDP : ON/OFF

14. Reset : Factory reset (User settings in OSD is initialized.)



3-4 Service Adjustment3-4-1 White Balance Adjustment

1. W/B Adjustment is required for the following sequence.Color Calibration (CVBS,Component,PC) → W/B Adjustment (HDMI,Component,CVBS)

2. Adjustment Method (Signal equipment : MSPG-925LTH, Measurement equipment : CA210)

3. You can adjust the white ratio in factory mode (Calibration, White Balance menu).

4. Since the adjustment value and the data value vary depending on the input source, you have to adjust these in HDMI, Component and AV modes.

5. The optimal values for each mode are configured by default. (Refer to Table 2 and 3)

Equipment: CA-210 & Master MSPG925 GeneratorCalibration Pattern: Master MSPG925 #24 "Lattice pattern"W/B adjustment Pattern: Master MSPG925 #16 "ABL pattern"

Use other equipment only after comparing the result with that of the Master equipment.Set Aging Time: Longer than 30 min.Pattern Resolution: Given below.Calibration Available/None and Pattern used for Calibration.

White Balance coordinates configuration result. (On the basis of the ABL pattern. The resolutions are given below)

For PC Mode, perform only calibration and do not perform additional W/B adjustments.

Input mode Calibration PatternCVBS IN (Model_#1) Perform in NTSC B&W Pattern #24 Lattice

Component IN (Model_#6) Perform in 720p B&W Pattern #24 Lattice

PC Analog IN (Model_#21) Perform in VESA XGA (1024x768)B&W Pattern #24 Lattice

HDMI IN None -<Table 1>

<Table 2>

Input mode x y Y(fL) T(K)/MPCD

CVBS IN(NTSC)

H/L 265 265 Do not adjust 15000K/-5L/L 280 285 0.8 10000K/-5

Component IN(720p, 60Hz)


PC Analog IN None

HDMI IN(720p, 60Hz)




Item Warm 2 Warm 1 Normal Cool1 Cool2

AVComponent

HDMI

R Cutoff 128 128 128 128 128G Cutoff 128 128 128 128 128B Cutoff 128 128 128 128 128R Gain 128 128 128 128 128G Gain 128 128 128 128 128B gain 128 128 128 128 128

R Cutoff 128 128 128 128 128G Cutoff 128 128 128 128 128B Cutoff 128 128 128 128 128

PC

R Gain 128 128 128 128 128G Gain 128 128 128 128 128B gain 128 128 128 128 128

R Cutoff 128 128 128 128 128G Cutoff 128 128 128 128 128B Cutoff 128 128 128 128 128R Gain 128 128 128 128 128G Gain 128 128 128 128 128B gain 128 128 128 128 128

<Table 3>



3-4-2 Conditions for Measurement

1. On the basis of toshiba ABL pattern : High Light level (57 IRE) INPUT SIGNAL GENERATOR : MSPG-925LTH

* Mode NO 1 : 744X484@60 HzNO 6 : 1280X720@60 HzNO 21 : 1024X768@60 Hz

* Pattern NO 24 : B&W Lattice PatternNO 16 : Toshiba ABL Pattern

2. Optical measuring device : CA210 (FL)Please use the MSPG-925 LTH generator for model HP-R5052

3-4-3 Method of Adjustment

1. Adjust the basic level of Component,PC and CVBS input signals.a) Enter factory Calibration, confirm the ADC data (Component, PC, AV Modes).

* ADC default value : Table 1

* You must perform Calibration in the Lattice pattern before adjusting the White Balance.* If you perform Calibration in a pattern other than the Lattice pattern, it causes a malfunction and the operation will not finish.

In this case, press the "EXIT" button on the remote control to terminate the operation.

1) Enter Service mode.2) Apply the NTSC Lattice (No 1) pattern signal to the VIDEO IN port.3) Press the Source key to switch to "AV/S-VIDEO" mode.4) After confirming that the Lattice pattern appears, select the "Calibration" menu.5) Select the "AV Calibration" menu.6) In "AV Calibration Off" status, press the "" key to perform Calibration.7) When Calibration is complete, it returns to the high-level menu.8) Apply the 720p Lattice (No 6) pattern signal to the COMPONENT IN (Y/Pb/Pr) port.9) Press the Source key to switch to "COMPONENT" mode.10) After confirming that the Lattice pattern appears, select the "Calibration" menu.11) Select the "COMP Calibration" menu.12) In "COMP Calibration Off" status, press the "" key to perform Calibration.13) When Calibration is complete, it returns to the high-level menu.14) Apply the 1024x768 Lattice (No 21) pattern signal to the PC IN port.15) Press the Source key to switch to "PC" mode.16) After confirming that the Lattice pattern appears, select the "Calibration" menu.17) Select the "PC Calibration" menu.18) In "PC Calibration Off" status, press the "" key to perform Calibration.19) When Calibration is complete, it returns to the high-level menu.20) All Calibration operations are complete.

Picture 2-1 B&W Lattice Pattern



2. Adjust the white balance of HDMI,Component and AV Modes.a) Set the input to the mode in which the adjustment will be made (HDMI, Component, AV adjustment. Do not adjust in PC

Mode.)* Input signal - AV Mode : Model #1 (744*484 Mode), Pattern #16

- Component/HDMI Mode : Model #6 (1280*720 Mode), Pattern #16b) Enter the White Balance menu of service mode and confirm the data.

c) Adjust the low light. (Refer to Picture 2-3 for measurement point.)- Adjust Sub-Bright(SVP) to set the 'Y' value.- Adjust red offset ('x') and blue offset ('y') to the color coordinates.

* Do not adjust green offset data.

d) Adjust the high light. (Refer to Picture 2-4 for measurement point.)- Adjust Sub-Contrast(DNIe) to set the 'Y' value.- Adjust red gain ('x') and blue gain ('y') to the color coordinates.

* Do not adjust the green gain and sub-contrast (Y) data.

Low lightMeasurement point

Picture 2-3 Toshiba ABL Pattern


High lightMeasurement point




3-4-4 How to adjust White Balance with 10 steps gray pattern

1. If you don't have Toshiba ABL pattern, you can adjust white balance with 10 steps gray scale pattern of Picture 2-5.

2. When you measure Low Light, use 20 IRE portions. And When you measure High Light, use 70 IRE portion. But if color noise is less in 60 IRE than in 70 IRE, 60 IRE is allowed asa measure point.

3. Perform adjustments 2-b through 2-d from previous page using the 10 step gray scale pattern.

Picture 2-5



3-5 Software Upgrade3-5-1 Source Program Download & Generals

1. Downloading boot code(1) Turn off PDP-TV.(2) Connect the RS-232 serial cable to the service jack of PDP-TV.(3) Enter the DOS Mode and move to the directory including "bootdn.bat" and Excute the file.(4) Turn on PDP-TV.

2. Downloading application code(1) Turn off PDP-TV.(2) Connect the RS-232 serial cable to the service jack of PDP-TV.(3) Enter the DOS Mode and move to the directory including "appdn.bat" and Excute the file.(4) Power on PDP-TV.

Changing RS-232 serial port and downloaded fileIf you want to change serial port, you must edit "bootdn.bat" and "appdn.bat".

"bootdn.bat" → sdn 1 0xdeadbbbb rom

execution file file to be downloadedport number downloading type : boot image

"appdn.bat" → sdn 1 0xdeadaaaa ram.z

execution file file to be downloadedport number downloading type : application image

1. Don' t turn off during downloading.

2. sdn.exe, download file and Batch file should be in the same directory.

3. During Downloading, Hyper Terminal should be turned off.(2) Enter a new name.(3) Select a modem port.(com 1 and direct connection.)(4) Set the bit/second to 115200.(5) Set the data bit to 8(6) No parity bit.(7) Set stop bit to 1.(8) No flow control.(9) Save in memory.(10) At this point, the new hyper terminal is ready.



3-5-2 How to Check the Version of the Program

1. Procedures for checking in the User Menu- Select the "Setup" menu in the Menu screen- Place the cursor over the "On" of "Function Help", and press the "Info" key on the remote control- The version of the program is displayed at the bottom of the Menu screen

2. Procedures for checking in the Factory MenuWhen entering Factory Mode, the version of the software is displayed at the bottom of the menu as described on page 3-2.

Main Program VersionBoot-code Version



3-6 Replacements & Calibration

3-6-1 Voltage Adjustment

1. SMPS Panel voltages must be adjusted after changing SMPS-PCB or PDP module.Range Board Adjustment

Vs 190~220VSMPS-MAIN

Va 60~80VVset 180~210V

SMPS-DC/DCVe 80~120VVscan -160~210V

VoltageLabel SMPS-POD SMPS-MAIN SMPS-DC/DC

2. A point of adjusting SMPS-MAIN voltage.

TP : Vs (TOP) Va (BOT)

Va Adjustment Point Vs Adjustment Point



3. A point of adjusting SMPS-DC/DC.

* Use base chassis of PDP panel as GND point.


MEMO

4. Exploded View & Part List

Exploded View & Part List


T0074 T0268

T0003

T0456

T0073

T0073

CIS7

T0023

T0175

M0146

T0603

M0145

M0112

T0044

T0159

T0159

T0275

M0006

T0079

M0013

T0555

M0006

M0045

M0111

Yon can search for the updated part code through ITSELF web site.URL:http://itself.sec.samsung.co.kr

4-1 HPR5052X/XAA

Loc.No. Code No. Description Specification Q'ty SA/SNA RemarkCIS7 AA61-60003B SPRING ETC-CS -,SUS304,-,-,OD11.2,N7,OD1 1 S.N.A

M0006 BN63-01688B COVER-REAR 50S5,SECC,T0.5 1 S.N.AM0006 BN63-01634B COVER-REAR SUB SP-R4232,SECC,T1.0 1 S.N.AM0013 BN96-01790B ASSY COVER P-REAR HP-R5052,SECC, T0.5 1 S.AM0045 BN96-02143A ASSY STAND P-SET 50S5H,XAA,HIPS HB,SV012 1 S.AM0111 BN63-01834B COVER-STAND 50S5H,XAA,HIPS,T3.5,HB,SV012 1 S.N.AM0112 BN63-01671B COVER-FRONT 50S5,HIPS,V0,XAA,SV012P 1 S.N.AM0145 BN96-02048A ASSY BOARD P-FUNCTION SCHUBERT,CT5000-32 1 S.AM0146 BN96-02050B ASSY BOARD P-POWER & IR SCHUBERT,CT5000- 1 S.N.AT0003 BN96-01787C ASSY COVER P-FRONT 50P5,50S5,EXPORT 1 S.AT0023 BN64-00336A KNOB POWER 42P5,PC,VIOLET 1 S.N.AT0044 BN96-01885A ASSY PDP MODULE P M1,SPD-50P5HD,D71A,V4, 1 S.AT0073 AA63-01127A GASKET-EMI 50P5,AL FOIL,T1.5,7mm,1177mm 2 S.N.AT0073 AA63-01128A GASKET-EMI 50P5,AL FOIL,T1.5,7mm,702mm 2 S.N.AT0074 BN59-00462A REMOCON STRAUSS,TM76A,200*54*30,ZILOG,54 1 S.AT0079 BN94-00671A ASSY PCB MISC-MAIN HPR5052X/XAA,D71C,S5H 1 S.AT0159 BN96-01801A ASSY PCB P-SMPS SPD-50P5HD,100~240V 1 S.AT0159 BN96-01805A ASSY PCB P-SMPS SPD-50P5HD(POD),100~240V 1 S.AT0175 AA96-02815A ASSY SPEAKER P 8ohm,S5,50,15W 1 S.N.AT0268 3903-000144 CBF-POWER CORD DT,US,BP3/Y,U(IEC C13-RA) 1 S.AT0275 BN96-02369A ASSY MISC P-INLET HP-R4252,STRAUSS,DOCUM 1 S.AT0456 BN67-00145B GLASS-FILTER EMI 50P5,MESH,726.5*1224.5, 1 S.AT0555 BN96-01392B ASSY MISC P-BRKT TERMINAL 42D5,XAA,SECC 1 S.N.AT0603 BN64-00338A WINDOW-RMC 42P5,ACRYL,5% 1 S.N.A

5-1Samsung Electronics

Electrical Part List

5. Electrical Part List5-1 HPR5052X/XAA Service ItemYon can search for the updated part code through ITSELF web site.URL:http://itself.sec.samsung.co.kr

Loc.No. Code No. Description Specification Q'ty SA/SNA RemarkM0013 BN96-01790B ASSY COVER P-REAR HP-R5052,SECC, T0.5 1 S.AM0018 BN97-00541A ASSY MICOM HPR5052,D71C,SDA555X-OTP(MICR 1 S.AM0045 BN96-02143A ASSY STAND P-SET 50S5H,XAA,HIPS HB,SV012 1 S.AM0145 BN96-02048A ASSY BOARD P-FUNCTION SCHUBERT,CT5000-32 1 S.AT0003 BN96-01787C ASSY COVER P-FRONT 50P5,50S5,EXPORT 1 S.AT0044 BN96-01885A ASSY PDP MODULE P M1,SPD-50P5HD,D71A,V4, 1 S.AT0048 BN96-02026A ASSY PDP P-Y BUFF UPPER BOARD M1,SPD-50P 1 S.AT0049 BN96-02027A ASSY PDP P-Y BUFF LOWER BOARD M1,SPD-50P 1 S.AT0073 BN96-02024A ASSY PDP P-X MAIN BOARD M1,SPD-50P5HD,D7 1 S.AT0074 BN59-00462A REMOCON STRAUSS,TM76A,200*54*30,ZILOG,54 1 S.AT0079 BN94-00671A ASSY PCB MISC-MAIN HPR5052X/XAA,D71C,S5H 1 S.AT0096 BN96-02025A ASSY PDP P-Y MAIN BOARD M1,SPD-50P5HD,D7 1 S.AT0128 BN39-00518A CBF SIGNAL-STEREO NA32KO,1P,UL2464#26,20 1 S.AT0142 BN96-02031A ASSY PDP P-LOGIC BOARD M1,SPD-50P5HD,D71 1 S.AT0159 BN96-01801A ASSY PCB P-SMPS SPD-50P5HD,100~240V 1 S.AT0159 BN96-01805A ASSY PCB P-SMPS SPD-50P5HD(POD),100~240V 1 S.AT0159 BN96-01856A ASSY PCB P-SMPS SPD-50P5HD(DC_DC),200Vin 1 S.AT0275 BN96-02369A ASSY MISC P-INLET HP-R4252,STRAUSS,DOCUM 1 S.AT0312 BN96-02135A ASSY COVER P-REAR SUB SP-R4232,SECC,BLM 1 S.AT0568 AA39-30007B CBF IF -,T,150mm,1365#26 1 S.AT0568 BN39-00602B CBF IF SPR4232,1P,1365#26,200mm,BLK,DIN( 1 S.AT0852 BN96-01470A ASSY BOARD P-OPTICAL HP-P5581,OPTICAL 1 S.AT0890 BN96-02046A ASSY FAN P 1B1S,71X149.5X5mm,1.9,0.19,24 1 S.AT0933 BN96-02028A ASSY PDP P-ADDRES E BUFF BOARD M1,SPD-50 1 S.AT0934 BN96-02029A ASSY PDP P-ADDRES F BUFF BOARD M1,SPD-50 1 S.AT0935 BN96-02030A ASSY PDP P-ADDRES G BUFF BOARD M1,SPD-50 1 S.AT0952 BN59-00459A MODULE UMX-NT-041,UMX-NT-041,2in/2out/lo 1 S.A

Samsung Electronics5-2

MEMO

Troubleshooting


6. Troubleshooting6-1 First Checklist for Troubleshooting1. Check the various cable connections first.

- Check to see if there is a burnt or damaged cable. - Check to see if there is a disconnected cable connection or a connection is too loose.- Check to see if the cables are connected according to the connection diagram.

2. Check the power input to the Main Board.

3. Check the voltage in and out between the SMPS ↔ Main Board, between the SMPS ↔ X, Y Drive Board, and between the Logic Boards.

Troubleshooting


6-2 Checkpoints by Error Mode

6-2-1 No Power

Symptom- The LEDs on the front panel do not work when connecting the power cord.- The SMPS relay does not work when connecting the power cord.- The power of the unit seems to be out of order.

Major Checklist

The SMPS relay or the LEDs on the front panel do not work when connecting the power cord if the cables are improperlyconnected or the Video Board or SMPS is out of order. In this case, check the following:- Check the internal cable connection status inside the unit.- Check the fuses of each part.- Check the output voltage of SMPS.- Replace the Video Board.

TroubleshootingProcedures

Are the AC IN socket connectorand the Main SMPS CN800 connected?

Is the Fuse (F101) of the Main SMPSPower Input Part blown?

Check Main SMPS CN804-2Pin 3: STB 5V = 5VPin 5 PS-ON = 0V

Replace the Main Board

Connect The AC IN socket connectorand the Main SMPS CN800

Replace the Main SMPS


Troubleshooting


6-2-2 When the unit is repeatedly turned on and offSymptom - The SMPS relay is repeatedly turned on and off.

Major Checklist

In general, the SMPS relay repeatedly turns on and off by the protection function due to a defect on a board connected to theSMPS.- Disconnect all cables from the SMPS, operate the SMPS alone and check if the SMPS works properly and if each voltage

output is correct.- If the symptom continues even when SMPS is operated alone, replace the SMPS.- If the symptom is not observed when operating the SMPS alone, find any defective ASSYs by connecting the cables one by

one.


CautionWhen separating and connecting the cables such as CN809 of the Main SMPS, CN1, CN2, CN3, CN4 and CN5 of DC-DCSMPS, CN of the X Drive Board, and CN of the Y Drive Board, a spark may be generated by the electric charge of the highcapacity capacitor. Therefore, wait some time after separating the power cord from the unit.

Does the symptom continueafter connecting the power andremoving CN809 cable fromthe Main SMPS?

Does the symptom continuewhen separating the CN804-2and CN803 cables from theMain SMPS and shorting pins4 and 5 of the CN804-2Connector?



Does the symptom continue whenconnecting the power afterconnecting the CN809 cable andremoving the CN1, CN2, CN4 andCN5 cables from the DC-DCSMPS?

Reconnect all cables.Does the symptom continue whenconnecting the power after the CN4cable to the DC-DC SMPS?

Does the symptom continue whenconnecting the power after CN2to the DC-DC SMPS?

Does the symptom continue whenconnecting the power afterremoving CN810 from theMain SMPS?

Replace the DC-DC SMPS

Replace the X Drive Board

Replace the Y Drive Board

Replace the Logic DriveBoard

Troubleshooting


6-2-3 No Picture (When audio is normal)Symptom - Audio is normal but no picture is displayed on the screen.

Major Checklist

- This may happen when the Video Board is normal but the X, Y Drive Board, Logic Board, or Y Buffer Boards are out of order.

- The output voltage of the Main SMPS or the DC-DC SMPS is out of order.- This may happen when the LVDS cable connecting the Main Board and the Logic Board is disconnected.


Caution When separating and connecting the cables such as CN809 of the Main SMPS, CN1, CN2, CN3, CN4 and CN5 of the DC-DCSMPS, CN of the X Drive Board, and CN of the Y Drive Board, a spark may be generated by the electric charge of the highcapacity capacitor. Therefore, wait some time after separ ating the power cord from the unit.

Are the Vs and Va voltagesnormal after removing theCN809 cable from theMain SMPS?

Is the output voltage of theDC-DC SMPS normal whenreconnecting the CN809 cableand removing the CN1, CN2,CN4 and CN5 cables from theDC-DC SMPS?

Replace the Y Drive Board

Replace the X Drive Board

Replace the Logic Drive Board

Replace the Y Buffer Drive Board


Replace the DC-DC SMPS

Troubleshooting


6-2-4 No SoundSymptom - Video is normal but there is no sound.

Major Checklist- When the speaker connectors are disconnected or damaged.- When the sound processing part of the Video Board is out of order.- Speaker defect.


Is the cable connection betweenthe main Board and the speakerproperly connected?

Is the output voltage of SMPSnormal? (CN803 #6)

Is the speaker output terminalof the Main Board normal?

Replace the Speaker

Connect the cable properly orreplace the cable, if necessary.

Replace the main SMPS


Troubleshooting


6-2-5 No VideoSymptom - A normal/cable network analog broadcast screen is blank or abnormal.

Major Checklist

- Check the antenna connection settings(Antenna 1 - NTSC (Cable), 64QAM, 256QAM, Antenna 2 - NTSC (Air), 8VSB (ATSC))

- Check the tuner output signal (CVBS).- Check the power input of the Main board.


Check CN1001 pin 2 for +33V

Configure properly



Is the antenna connection settingproperly configured?

Troubleshooting


6-3 Troubleshooting Procedures by ASS'YNo Assy Code No Description Major Symptoms1 ASSY PCB P-SMPS BN96-01801A Main SMPS No power, Blank screen, the Relay repeats On and Off.2 ASSY PCB P-SMPS BN96-01856A DC-DC SMPS Blank screen, the Relay repeats On and Off.3 ASSY PCB P-SMPS BN96-01805A POD SMPS Blank screen, the Relay repeats On and Off.4 ASSY PDP P-X MAIN BOARD BN96-02024A X Drive Board Blank screen5 ASSY PDP P-Y MAIN BOARD BN96-02025A Y Drive Board Blank screen6 ASSY PDP P-LOGIC BOARD BN96-02031A Logic Board Blank screen, Screen noise7 ASSY PDP P-Y BUFF UPPER BOARD BN96-02026A Y Buffer Upper Board Upper screen is blank8 ASSY PDP P-Y BUFF LOWER BOARD BN96-02027A Y Buffer Lower Board Lower screen is blank9 ASSY PDP P-ADDRESS E-BUFF BOARD BN96-02028A Address E Buffer Board Corresponding Buffer Board block screen is blank.

10 ASSY PDP P-ADDRESS F-BUFF BOARD BN96-02029A Address F Buffer Board Corresponding Buffer Board block screen is blank.11 ASSY PDP P-ADDRESS G-BUFF BOARD BN96-02030A Address G Buffer Board Corresponding Buffer Board block screen is blank.12 ASSY PCB MISC-MAIN BN94-00671A Main Board No Power, Abnormal screen for each input source, PIP screen trouble,Sound trouble13 ASSY FUNCTION BN96-02048A Function Key Board The side function key does not work properly14 ASSY POWER BN96-02050B Power Button Board The remote control does not work properly, the LED does not work properly.


MEMO

Block Diagram


7. Block Diagram7-1 Overall Block Diagram

Y Main Board X Main Board

1366x768 Pixels1366x768x3 Cells (R,G,B)

(110V)CPU

DecoderImageScaler

Micom

POD

Block Diagram


7-2 Partial Block Diagram7-2-1 Main SMPS Block Diagram

7-2-2 DC-DC SMPS Block Diagram

Controland

Switching Block

Controland

Switching Block

Controland

Switching Block

Transformer

Transformer

Transformer

AuxiliaryPower

AuxiliaryPower

AuxiliaryPower

RectificationBlock

RectificationBlock

RectificationBlock

FeedbackBlock

FeedbackBlock

FeedbackBlock

Vs Input Part Vscan Output

Vset Output

Ve Output

(-175~-220)

Block Diagram


7-2-3 Module Driver Board Block Diagram

1. Y Main Board

Power Input PartLogic Signal Input Part

Logic Signal Buffer

2. X Main Board


Logic Signal Buffer

Block Diagram


7-2-4 Logic Board Block Diagram

ASIC

nRESET

CONTROL

SIGNAL

60pin Connector 60pin Connector

10Pin(Power)31Pin LVDS

SPS-NIRB

(ASIC 816P)DDR

(FA)

DDR

(MA)

DDR

(MB)

MICOM

DRIVE

RESET

R,G,B : 16bit

CLK A, B

BLK, POL, STB

R,G,B : 16bit

CLK A, B

BLK, POL, STB

DATA : 32bit

ADDR : 12bit

DQS, CLK, nCLK

RELAY_EINT

AC-OFF-EINT

Vs-ON

LVDS

SIGNAL

SDA, SCL

TX, RX

X-MAIN

CONTROL

SIGNAL

Y-MAIN

CONTROL

SIGNAL

ADC 4bit

ADC 3bit

ADC 1bit

4p

in (

I2C

)

30MHz

60MHz

74MHz

50

pin

Co

nn

ecto

r

30

pin

Co

nn

ecto

r

7-2-5 Main Board Block Diagram

Display Panel50", 1366 x 768

Audio AMP TAS5122

NSP

DNIe Lite

Coaxial Out

Optical Out

SVP-EX62

Wiring Diagram


8. Wiring Diagram8-1 Overall Wiring

ASSY PCB MISC-MAINBN94-00672A

ASSY POWERBN96-02050C

ASSY FUNCTIONBN96-02049A

ASSY SPEAKERBN96-01955A

Wiring Diagram


8-1-1 PDP Module ↔↔ SMPS Wiring

①CN809(Main SMPS)↔ CN3(DC-DC SMPS)

Pin No Signal1 5.3V

2 Vg3 RTN4 RTN5 RTN6 RTN7 RTN8 Va9 Va

10 N.C11 Vs12 Vs

②, CN2(DC-DC SMPS)↔ CN5009(Y B'D)

Pin No Signal1 Vs

2 Vs3 RTN4 RTN5 Vset6 RTN7 Vscan8 RTN9 Vg

10 5.3V

③CN4(DC-DC SMPS)↔ CN4001(X B'D)

Pin No Signal1 Vs

2 Vs3 RTN4 RTN5 Ve6 RTN7 RTN8 Vg9 5.3V

④CN5(DC-DC SMPS)↔ CN2609(F-Buffer)Pin No Signal1 RTN

2 N.C3 5.3V4 N.C5 Va

⑤CN810(Main SMPS)↔ CN2004(Logic B'D)Pin No Signal1 5.3V

2 5.3V3 RTN4 RTN5 5.3V6 RTN7 PS-ON8 N.C9 VS-ON

10 STB 5V

Wiring Diagram


8-1-2 Main Board ↔↔ SMPS, Power Button, Function Board, Speaker Out Wiring

①CN1002(MAIN B'D)

↔CN804-1(MAIN SMPS)Pin No Signal1 FAN-D

2 FAN-ON3 STB5V4 RTN5 PS-ON6 12V7 RTN8 RTN9 VCA

10 VCS11 RTN12 5.3V

②CN1001(MAIN B'D)↔ CN803(MAIN SMPS)

Pin No Signal1 RTN

2 VT(33V)3 RTN_AMP4 RTN_AMP5 18V_AMP6 18V_AMP7 RTN8 12V9 RTN

10 6V

③

JA9001(MAIN B'D) ↔ LA03(LOGIC B'D)Pin No Signal Pin No Signal Pin No Signal1 12 TXOUT3+ 23 TXOUT1B-

2 GND 13 TXOUT3- 24 TXOUT1+3 PW_SDA0 14 TXCLKOUTB+ 25 TXOUT1-4 GND 15 TXCLKOUTB- 26 GND5 PW_SCL0 16 TXCLKOUT+ 27 GND6 GND 17 TXCLKOUT- 28 TXOUT0+7 18 GND 29 TXOUT0-8 TXOUT0B+ 19 GND 30 GND9 TXOUT0B- 20 TXCLKOUT2+ 31 GND

10 I2C_READY 21 TXCLKOUT- 32 GND11 GND 22 TXOUT1B+ 33 GND

④CN1004(MAIN B'D)↔ FUNCTION

Pin No Signal1 KEY1

2 KEY23 GND

⑤CN2001(MAIN B'D)↔ SPEAKER

Pin No Signal1 SPK_R+

2 SPK_R-3 SPK_L+4 SPK_L-

⑥CN1003 (MAIN B'D)↔ POWR BUTTONPin No Signal1 GND

2 LED_RED3 5V4 GND5 -6 SDA7 SCL8 IR


MEMO

PCB Diagram


9. PCB Diagram

CN5401

CN5402

CN5403

CN5501

CN5502

CN5503

CN804-1 CN810

CN809

CN2501CN2510

CN2501 CN2510 CN2608 CN2709 CN2710

CN2608CN2709CN2710

CN5007

CN5008

CN5009

CN5010

CN3

CN5

CN4005

CN4000

CN4001

CN4002

CN4003

CN4004

CN4

CN1

CN2

CN8002JA9001 CN1002 CN1001

CN1004CN8001

CN1CN001

CN2001 CN1003

CN800

CN811

CN2011 CN2020 CN2013 CN2010CN2009

CN2004

CN2008CN2007CN2006

CN2005

J801

J0802

SPEAKER

MAIN BOARD

LOGIC BOARD

SMPS-MAINX-DRIVE

Y-DRIVE

Y-BUFFER(UP)

Y-BUFFER(LOW) AC-INLET

E-BUFFER G-BUFFERF-BUFFER

SMPS

-POD

SMPS

-DC

FUNCTION

1

POWER SW

FAN

2

3

4

7

8

9

G-BUFFER11 F-BUFFER10 E-BUFFER9

1110

12

13

14

15

17

16

6

5

CN803

No Assy Code No. Description- ASSY PDP MODULE P M1,SPD-50P5HD,D71A,V4,1184x700,1366x768,NTSC/PAL,50 INCH,PL50HW003A1 ASSY PCB P-SMPS BN96-01801A SPD-50P5HD,100~240V2 ASSY PCB P-SMPS BN96-01805A SPD-50P5HD(POD),100~240V(POD)3 ASSY PCB P-SMPS BN96-01856A SPD-50P5HD(DC_DC),200Vin(DC_DC)4 ASSY PDP P-X MAIN BOARD BN96-02024A M1,SPD-50P5HD,D71A,V4,1184x700,1366x768,NTSC/PAL,50 INCH,LJ92-01045A5 ASSY PDP P-Y MAIN BOARD BN96-02025A M1,SPD-50P5HD,D71A,V4,1184x700,1366x768,NTSC/PAL,50 INCH,LJ92-01046A6 ASSY PDP P-Y BUFF UPPER BOARD BN96-02026A M1,SPD-50P5HD,D71A,V4,1184x700,1366x768,NTSC/PAL,50 INCH,LJ92-01047A7 ASSY PDP P-Y BUFF LOWER BOARD BN96-02027A M1,SPD-50P5HD,D71A,V4,1184x700,1366x768,NTSC/PAL,50 INCH,LJ92-01048A8 ASSY PDP P-LOGIC BOARD BN96-02031A M1,SPD-50P5HD,D71A,V4,1184x700,1366x768,NTSC/PAL,50 INCH,LJ92-01269A9 ASSY PDP P-ADDRESS E BUFF BOARD BN96-02028A M1,SPD-50P5HD,D71A,V4,1184x700,1366x768,NTSC/PAL,50 INCH,LJ92-01103A

10 ASSY PDP P-ADDRESS F BUFF BOARD BN96-02029A M1,SPD-50P5HD,D71A,V4,1184x700,1366x768,NTSC/PAL,50 INCH,LJ92-01104A11 ASSY PDP P-ADDRESS G BUFF BOARD BN96-02030A M1,SPD-50P5HD,D71A,V4,1184x700,1366x768,NTSC/PAL,50 INCH,LJ92-01105A12 ASSY PCB MISC-MAIN BN94-00671A HPR5052X/XAA,D71C,S5HD13 ASSY BOARD P-FUNCTION BN96-02048A SCHUBERT,CT5000-3280,FUNCTION14 ASSY BOARD P-POWER & IR BN96-02050B SCHUBERT,CT5000-3540,POWER & IR,CORE15 ASSY FAN P BN96-02046A 1B1S,71X149.5X5mm,3700,DC12V,SPR4232,STRAUSS,POD FAN ASSY16 ASSY SPEAKER P AA96-02815A 8ohm,S5,50,15W17 ASSY MISC P-INLET BN96-02369A HP-R4252,STRAUSS,DOCUMENT,INLET.CORE

9-1 Overall PCB Diagram


MEMO

Samsung Electronics

Schematic Diagram

10-1

NOITPO ASU

NOITPO AEROK

WOL : FFO

NOC_SO

MIN CES

NOC_SO

NOITPO AEROK

Hu22

NOITPO AEROK

otuA : CN

V6D

Hu22

noitpo AEROK

6301R,2301R,0301R

9701R,8701R,0401R,8301R

NOITPO ETELED

NOITPO ETELED

NOC_SO

NOITPO MIN DOP TXE

82x0 : AEROK

Hu22

V21D

NOITPO_MIN_DOP

RENUT

NOITPO AEROK

MIN DOP

NOITPO ETELED

NOITPO ETELED

NOITPO_ETELED

tnerruC A3

DNG

DNG

MIN SPLA

HGIH : NO

NOC_SO

tnerruC A3

41x0 : ASU

V3.3D

NOITPO ASU

)NOITPO ASU(

V5_DTS

RENUT MIN RAEN

NOITPO_ETELED

NOITPO AEROK

NOC_SO

TROPWEN MORF

RENUT MIN RAEN

NOITPO AEROK

)NOITPO ETELED(

NOITPO ETELED

D_REHT

NOITPO ASU

NOC_SO

NOC_SO

NOC_SO

NOITPO ASU

LORTNOC

2YEK

REWOP

1YEK

NOITPO ASU

NOITPO ASU

V3.3D

NOITPO ETELED

NO_SP

2 TNENOPMOC

DNG

noitpo ASU

1 TNENOPMOC

6701PT

8701PT

mho57

3101R

4701PT

Fu74

1501C

V61

FERX

mho013001R

2901PT

PMA_DNUOS

mho0017601R

UPC_V8.1A

1301R

Fu74

7401C

V61

V61

W01/1

mho0

6201C

Fu74

Fn001

2401C

V61

2101R

mho57

R1

03

5R

10

35

0o

hm

0o

hm

V61

0401C

Fn001

FERX

W01/1

1401R

mho0

FERX

6701C

Fn001

V61

1801C

Fn001

FERX

V33B

FERX

FERX

PMA_DNUOS

2401PT

1

2.8ZLR

7001D

4201D

42SS

FERX

1

4301R mho0

8401PT

A1 2

B

6201D

42SS

V5A

3101DB

S006P14MLB

2401R

V61

Fu01

6801C

V3.6

Fu021

1601C

mho001

7501PT

1

2.8ZLR

3101D

4801PT

V5A

3801PT

5801PT 1801PT

1

9701PT

FERX

FERX

Fn01

8501C

1

A_V81+

V9B

2.8ZLR

1101D

7567AB_V5B

NE_PT

2.8ZLR

0201D

V61

9001L

3001L

Fn001

0501C

Fp33

8001C

FERX

V3.3A

1

6001PT1

1

7001PT

1

4001PT1

3001PT

2001PT

5701C

Fu001

4301PT

1

V3.3A

W01/1

9201R

mho0

Fn3.3

6301C

2_V3.3B

TJ121-2354H1-HH

4001DB

8001R

7801C

mho57

I1

G

2

O3

FERX

Fn001

V52

1001TFF50D87AIK

mho074

Fn01

9501C

0801C

7101R

8201R

mhoK1

Fn001

3401R mho001

W01/1

1

2601PT

1

mhoK1

3601R

0601PT

mho0

FERX

0701C

Fp081

2301R

Fn001

8101C

2_V3.3B

4801C

V61

Fu001

mho0

0401R

7001L

FERX

mho57

4101R

W01/1

6701R mho0

4901PT

8001D

2.8ZLR

DP_PT

1

3001DB

TJ121-2354H1-HH

Fu001

V61

7801PT

6601PT

1

7201C

5201C

V52

Fn001

2001R mho001

mhoK22

4601R

Fn001

0201C

0801PT

1_1_V3.3B

DNG5

BF

PMOC6

NE7

8SS

9101CFu01

ND3851PM

7001CI

SB1

NI2

WS3

4

1001DB

S006P14MLB

1A B

2

Fn01

6801PT

5601PT

1

2201C

3601PT

1

V61

Fn001

V61

Fn001

3401C

8101R

2601C

4101D

2.8ZLR

mho074

4NIFER

5DNG

ADS6

7LCS

0A8

MRA7335DA

DDV1

ATUOV2

BTUOV3

Fn001

V61

4201C

0101CI

mho0019601R

5

6

7

8

Fn001

5801C

V61

THW 80-052WAMS

3001NC

1

2

3

4

1

2

3

9801PT

1

7001C

FERX

2301D

1TL6V5C48XZB

6DNGM

7DNGM

8DNGM

V5.6_S

FERX

Fn001

1DNGM

2DNGM

3DNGM

4DNGM

5DNGM

4DNGM

4

TUO_TFA

5

V23+__3B

DNG

67

TESER_REWOP

RORRE_GEPM

8

TUO_OEDIV

92

52

5

0ATAD_GEPM

KLC_ATAD_GEPM

26

26

ADS

27

27

28

28

LCS

1DNGM

V5+_2B

3

2DNGM

3DNGM

19

19

6ATAD_GEPM

2

CGAFR

20

20

5ATAD_GEPM

21

21

4ATAD_GEPM

22

22

3ATAD_GEPM

23

23

2ATAD_GEPM

1ATAD_GEPM

24

24

10

10

11

11

TUO_FIS

V3.3+_4B

12

12

13

13

DNG

V5.2+_5B

14

14

V2.1+_6B

15

15

CNYS_TKP_GEPM

16

16

17

17

NE_ATAD_GEPM

7ATAD_GEPM

18

18

1

2

3

3001UT

1

C_N

WS_FFO_LAT_X

6001C

30-052WMS

4001NC

1

Fu022

10

0o

hm

10

0o

hm

R1

04

8R

10

48

1101PT

W01/1

mhoK6.3

5201R

1_V3.3B

FERX

O 3

EN006P23BIC

0101DB

B

PF330AB

3001CI

I1

G

2

9501PT

1

8501PT

1

2201R

mho001

5101DB

1

G

2

O 3

3701C

Fu001

8

9

3001TF

F50D87AIK

I

2_p9kcaj

2001AJ

1

2

3

4

5

6

7

TM322E1A2-03AFL

4001TF

mhoK17701R

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FERX3001Q

G-3261CSK

0o

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2801PT

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1

6601C

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1001L

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mho0746101R

V61

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7101DB

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65A

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DNG0111

8B

7B21

316B

5B41

4B51

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mhoK01

1101CI

XCTM542XCL47

1

V5_S

FERX

1_V3.3B

V6D

7501R

XTQ_PT

1

5001PT

S006P14MLB

7001DB

A1 2

B

2.8ZLR

6001D

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9701C

B

Fu74

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1701PT

5101D

9601PT

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2201D

2.8ZLR

2NI

3WS

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6PMOC

7NE

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1001CI

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5 6

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mho33

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3001D

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1

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3401PT

FERX

FERX

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9101D

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1

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7601PT

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1DNGM

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3ATAD

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V1.1

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NE/DILAV

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DNGRENUT

DNGRENUT

CGA_FR

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DNGP

DNGP

DNGP

DNGP

DNGP

DNGP

NI_DNGA

NI_DNGA

NI_DNGA

NI_DNGA

NI_LS_2PMOC

NI_RS_2PMOC

NI_DNGA

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DNGP

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Y_2PMOC

BP_2PMOC

RP_2PMOC

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DNGRENUT

V3.3_VT_4LCS

V3.3_VT_4ADS

SCVACV

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TED_NAF

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NI_DNGA

NI_DNGA

NI_DNGA

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2YEK

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)5(ST_MAS

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DNGP

DNGP

DNGRENUT

NIAM_SBVC_RENUT

DNGRENUTDNGRENUT

DNGRENUT

KLCST_MAS

DLVST_MAS

CNYSST_MAS

DNGRENUT

DNGRENUT

DNGRENUT

NIAM_FIS

SD

A1_D

TV

CH

SD

A1_D

TV

CH

SC

L1_D

TV

CH

SC

L1_D

TV

CH

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RENUT_V8.1B

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)4(NIDOP

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KLC_NIDOP

DLV_NIDOP

CNYS_NIDOP

OTESERn

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HCVTD_6ADS

DNGPDNGP

DR

XD

RX

CR

XC

RX

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DNGP

Y_1PMOC

BP_1PMOC

RP_1PMOC

NI_DNGA

TNEDI_1PMOC

NI_DNGA

NI_DNGA

NI_LS_1PMOC

NI_RS_1PMOC

DNGP

DNGP

DNGRENUT

DNGP

DNGP DNGP

FFO_NO_NAF

DNGP

DNGP

DNGP DNGP DNGP DNGPDNGP

DNGP

This Document can not be used without Samsung’s authorization.

10-1 POWER & TUNER10. Schematic Diagram

PowerSignal

10-2

Schematic Diagram

Samsung Electronics

10-2 SOUND-PROCESS

3D

2D

2D

Hu01

0Q

1Q

eteleD

]eteleD[

-L

A1426PSN

0302R 8102R 5102R 9002R

2Q

7602R 1602R 0602R 9502R

0Q

1D

2Q

2D

CCx0

NOITPO ETELED

3Q

0Q

eteleD

eteleD

R_TUO_REKAEPS

MARS M1

NOITPO ETELED

3Q

L_TUO_REKAEPS

3Q

WOL HGIH S2I_LES

NOITPO ETELED

1D

-R

+L

YALED OIDUA

1D

]eteleD[

0D

IMDH ELGAE TUPTUO

0D

NOITPO

0D

eteleD

10

uH

10

uH

1D

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2D

1Q

0Q

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2502R 1502R 8402R 7402R

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08X0

1302R 9102R 0102R

2Q

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10

uH

10

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1Q

NOITPO ETELED

NOITPO ETELED : 9002DB,7002DB

L_PH

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2Q

3Q

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3D

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mho02012R

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31

32

32

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SP

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23

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UT

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25

26

26

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27

28

28

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DIO

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29

29

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61)1A_KCB

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ATA

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PD

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1)

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ATA

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PD

IF_A

1)

17

17

18

18

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1)

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1)

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1)

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1)

19

19

L_TUOPH2

20

20

SD

ATA

_O

12/S

PD

IF_01)

SD

ATA

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PD

IF_01)

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T1)

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T1)

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21

22

22

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FERX

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870_O/I_RTC_D

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Fu1

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S_

DA

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1I2

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DA

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1

07NETSET

NI_LATX17

TUO_LATX27

37PT

47TUO_LC_DUA

CN57

CN67

AV

SS

AV

SS

AV

SS

AV

SS

62

62

NC

NC

63

63

64

64

NC

NC

56PUSVA

PUSVA66

+1NI_ANA76

-NI_ANA86

96+2NI_ANA

55

55

AS

GA

SG

56

56

SC

1_

IN_

LS

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SC

1_

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RS

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57

VR

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TO

PV

RE

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58

58

NC

NC

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I2S

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NO

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AS

GA

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49

49

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SC

3_

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50

50

SC

3_

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C3

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51

51

AS

GA

SG

52

52

SC

2_

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C2

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53

53

SC

2_

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RS

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54

54

04M_LPAC

41

41

NC

NC

42

42

NC

NC

43

43

AH

VS

SA

HV

SS

44

44

AH

VS

SA

HV

SS

AG

ND

CA

GN

DC

45

45

46

46

NC

NC

47

47

SC

4_

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LS

C4

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33R_TUO_2CS

L_TUO_2CS43

531FERV

63R_TUO_1CS

73L_TUO_1CS

A_LPAC83

93PUSVHA

I2S

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LI2

S_

CL

4

52

622FERV

72R_MCAD

L_MCAD82

92CN

I2C

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AI2

C_

DA

3

BUS_MCAD03

13CN

CN23

19

19

I2S

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L3

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I2C

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L

20

20

I2S

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RE

SE

TQ

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SE

TQ

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A_

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22

22

23

23

NC

NC

DA

CA

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CA

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24

24

L_ACAD

11

11

DV

SU

PD

VS

UP

12

12

DV

SU

PD

VS

UP

DV

SU

PD

VS

UP

13

13

DV

SS

DV

SS

14

14

15

15

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DV

SS

16

16

DV

SS

DV

SS

I2S

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A_

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I2S

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A_

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17

17

NC

NC

18

18

2102CI

005_21C_AQ_G0444PSM

NC

NC

1

AD

R_

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R_

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10

10

W01/1

mho001

2402R

V52

Fu33

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3

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mho0015102R

mho051

1

4012R

Fn001

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FERX

FERX

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1_1_V3.3B

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81

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1202C

7602C

4002DB

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1 2

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mho051

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FERX

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3802R

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1_1_V3.3B

G-3261CSK

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CCV_V5B

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Fu74

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Fu1

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mhoK74

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1

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G-3261CSKB

C

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Fn74

FERX

2002Q

mho001

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12

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3902C

1002X

mhoK01

1212R

5802R

2002R

mhoK74

4302R

mho0

mhoK1

mhoK74

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Fu0001

V52

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V52

Fn001

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3

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mhoK7.4

Fn0014802C

Fu1

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5602C

5702C

mhoK01

mhoK1

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mho0012702R

A003S2102ZPM

3002DB

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FERX

mho0011302R

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8012C

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6902R

mho001

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7NI

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71

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51

31

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11

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2

CNI

3

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GNI

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mhoK001

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FERX

PMA_DNUOS

1_1_V3.3B

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PMA_DNUOS

5112R

1

2

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10

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1_1_V3.3B

Fu011502C

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2302R

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A_V81+

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1902C

4202C

Fu1

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V52

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mhoK1

3502R

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1

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1102L

1 2

Fu7.4

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S_V5.2+

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2602C

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FERX

6802R

mhoK01

5

6

7

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11

21

31

41

51

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1

2

3

4

FERX

Fu01

V61

3602C

mho0013702R

FERX

Fu22

4502C

mho0015202R

mho001

0112R

6002L

Hu01

mho001

5402R

W01/1

mho0011112R

V61

Fu001

4102C

mho051

6502R

3902R

FERX

FERX

0402C

Fn001

3.3

Fn1

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V61Fu22

2002C

FERX

FERX

8602R

mhoK1

mho0016102R

W01/1

1102R

mhoK2

mhoK001

mho06202R

7902R

W01/1

3302R

7602R mho0

1

A_TSB

55DDVG

DNG65

6DNGD

DNG7

8PA_MWP

9MA_MWP

FERX

B_TUO

DNG84

94DNG

5DNG

05A_TUO

A_TUO15

25A_DDVP

A_DDVP35

45

DDVD

04C_DDVP

14C_DDVP

C_TSB24

B_TSB34

B_DDVP44

B_DDVP54

64B_TUO

74

23D_DDVP

33

43D_TUO

53D_TUO

63DNG

DNG73

83C_TUO

C_TUO93

4

WTO/

GERG62

DNG72

82DNG

92DNG

GERG3

03DDVG

13D_TSB

D_DDVP

MC_MWP91

DNG2

02DC_TESER/

MD_MWP12

PD_MWP22

BA_DS/32

42DC_DS/

52

MB_MWP11

21PB_MWP

31GERD

1M41

2M51

3M61

71NTR_GER

PC_MWP81

5102CI

ACDI2215SAT

1DNG

BA_TESER/01

V61 Fu01 3002C

mho0016112R

6402C

0902C

Fu01

V61

0212R mho0

V61

Fu01

6202C

Fp74

V05

R2

07

6R

20

76

mhoK74

PMA_DNUOS

0o

hm

0o

hm

mhoK74

5002R

9302R

B1TUO_1426

A2TUO_1426

B2TUO_1426

-L_KPS

+R_KPS

+L_KPS

-R_KPS

NI_KLCRL_MAS

TUO_KLCS_MAS

NI_KLCS_MAS

PSM_TESER

TUO_LS_ROTINOM

TUO_RS_ROTINOM

SG

ND

SG

ND

A1TUO_1426

NI_ATAD_S

NI_LS_2PMOC

NI_RS_2PMOC

NI_ODS_MAS

TUO_KLCRL_MAS

TUO_KLCDO_MAS

DNGSDNGS

NI_ODS_PSMNI_KLCRL_PSM

NI_KLCS_PSM

DNGS

DNGS

DNGS

NI_RS_1OEDIV

NI_LS_1OEDIV

NI_RS_1PMOC

NI_LS_1PMOC

NI_RS_IVD

NI_LS_IVD

NI_RS_CP

NI_LS_CP

KLC_M

DNGP

NI_DNGA

KLC_RL

KLC_S

KLC_RL

DNGS

NI_ATAD_S

V3.3_VT_5ADS

PSM_TESER

V3.3_VT_5LCS

KLC_M

1ETUM_PMA

NI_ATAD_S

TUO_ATAD_S

1YALED

2YALED

KLC_S

1_KLC_S

1_KLC_S

KLC_S

TUO_ATAD_S

DNGS

KLCRL_IMDH

ODS_IMDH

TUO_ODS_MAS

TUO_KLCRL_MAS

TUO_KLCS_MAS

TUO_KLCDO_MAS

1_KLC_S

1_KLC_S

TUO_LS_2CS_YNA

DNGSDNGS

S2I_LES

NI_KLCM_PSM

NI_KLCS_PSM

NI_KLCRL_PSM

NI_ODS_PSM

KLCM_IMDH

KLCS_IMDH

V5_VT_5LCS

V5_VT_5ADS

PSM_TESER

DNGS

DNGS

DNGS

DNGS

NIAM_FIS

TUO_RS_2CS_YNA


PowerSignal

Samsung Electronics

Schematic Diagram

10-3

1 TUPNI VA

NOITPO ETELED

26x0

TUO_ROTINOM

NOITPO ETELED

REDNAPXE O/I

F/I TENYNA

TUO FIDPS LACITPO

1 TUPNI SHVS

TESER MOCIM BUS

IMDH ELGAE TUPTUO

NOITPO AEROK

WOL HGIH S2I_LES

F/I ECIVRES & TENYNA

NOITPO ASU

NOITPO ETELED

NOITPO ETELED

NOITPO ETELED

NOITPO ASU : 1413R,3703R

F/I ECIVRES

TUO_XAOC_FIDPS

mho012013R

9203R

mhoK01

FERX

2

3

1403R mho001

1

2

3

7003DZ

1TL6V5C48XZB

1

1TL6V5C48XZB

6003DZ

5203C

Fn001

10K

ohm

10K

ohm

R3037

R3037

1703R

3103C

Fu22

V61

3103PT

1

FERX

mho001

1 2

3 4

5 6

7 8

1

FERX

W61/1

2003AR mho001

L3006

L3006

10uH

10uH

1103PT

V3.3A

FERX

10K

ohm

10K

ohm

R3015

R3015

7203C

Fn001

R3016

R3016

10K

ohm

10K

ohm

6213R

mhoK001

FERX

3

2003NC3204-82-22

1

2

1TL6V5C48XZB

8003DZ

1

2

FERX

Fn001 2103C

7403R mho001

FERX

8103C Fn001

1

mho0019013R

1

9103PT

1

2203PT

mho001

1203PT

2213R

mhoK7.4

4703R

mho0012703R

4003DZ

2.8ZLR

V5A

Fn001

4103C

V05

1103CFp22

FERX 0Q1Q

9603R

mhoK7.4

3203C

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1003X

mho001

Fp033

6

2103PT

1

7803R

3_p6kcaj

7003AJ

1

2

3

4

5

1003PT

1

1

2

3

0213R

mho57

mho001

FERX

D61-WS-KJU

1003NC

3113R1113R

FERX

FERX

FERX

mho001

mho001

5903R

FERX

mho001

3903R mho001

2903R

3003Q

G-3261CSK

8003L Hu3.3

Fn0019203C

mho57

8113R

W01/1

mhoK2.2

7903R

7103C

Fu01

V61

V61

Fu22

2403C

R3141

R3141

10K

ohm

10K

ohm

6013R mho001

mho001

8003C

2.8ZLR

8003D

3703R

mho001CCV_CDD

FERX

1603R

2503R mho001

FERX

R3001

R3001

2.7

Kohm

2.7

Kohm

5003C

Fn001

6003D

2.8ZLR

mho001

0113R

9303C

Fn7.4

10K

ohm

10K

ohm

R3007

R3007

Fn001

V52

2003C

FERX

FERX

V5A

9103C Fn001

mho0018503R

10K

ohm

10K

ohm

R3017

R3017

1003TF

A1

B2

FERX

R3032

R3032

8903R

mho001

10K

ohm

10K

ohm

V3.3A

8103D

2.8ZLR

6103D

2.8ZLR

mho0012603R

FERX

FERX

mho0012403R

3303PT

1

mho0017203R

7703R

mhoK1

4103D

2.8ZLR

Fp001

0303C

4303C

Fn7.4

9313R mhoK01

FERX

FERX

4.7

Kohm

4.7

Kohm

R3138

R3138

mhoK1

8213R

10K

ohm

10K

ohm

R3004

R3004

10K

ohm

10K

ohm

R3011

R3011

10K

ohm

10K

ohm

R3010

R3010

1003Q

G-3261CSK

B

C

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mhoK01

7103PT

1

3203R

9003D

2.8ZLR

2.7

Kohm

2.7

Kohm

R3002

R3002

R3134

R3134

4.7

Kohm

4.7

Kohm

R3022

R3022

10K

ohm

10K

ohm

5003D

HTG03C3SDC

0403R

R3020

R3020

FERX

mho001

W01/1

mhoK016903R

2.7

Kohm

2.7

Kohm

2.8ZLR

2103D

FERX

V3.3A

10K

ohm

10K

ohm

mho0019803R

R3038

R3038

mho0013013R

5203PT

1

V3.3A

4003PT

1

E

B

C

FERX

9113R

mho074

R3018

R3018

FERX

4003Q

1T-6M-1161AS2

7TESER

4PPV_TSET

DDV231

SSV

NIX2

TUOX3

10K

ohm

10K

ohm

111DA_1_2P

212DA_2_2P

3DA_3_2P

31

414DA_4_2P

515DA_5_2P TADS_6DA_6_2P

81

KLCS_7DA_7_2P91

0_3P8 52

1_3P

92_3P

423_3P

IS_2_0P

03OLC_3_0P

928DA_4_0P

829DA_5_0P

7201DA_6_0P

0MWP_11DA_7_0P62

32DCZ_0T_0_1P

22ZUB_1_1P

0TNI_2_1P12

1MWP_1TNI_3_1P02

0DA_0_2P01

8T0S-53X8249C3S

FERVA71

SSVA

61

6KCS_0_0P

OS_1_0P5

13

0703Rmho001

3003CI

Fu01

FERX

FERX

mho0014603R

8303C

FERX

mho001

5003DZ

2.8ZLR

1303R

1003L

7003Q

G-3261CSK

R3019

R3019

10K

ohm

10K

ohm

10K

ohm

10K

ohm

R3014

R3014

1503R mho001

10K

ohm

10K

ohm

R3003

R3003

R3036

R3036

10K

ohm

10K

ohm

FERX

9003Q

G-3261CSK

Fp033

1303C

mhoK1

mho0745403R

R3013

R3013

10K

ohm

10K

ohm

3213R

G-3261CSK

6003Q

10K

ohm

10K

ohm

R3012

R3012

1103D

2.8ZLR

R3009

R3009

R3008

R3008

10K

ohm

10K

ohm

10K

ohm

10K

ohm

5003L

1003DZ

2.8ZLR

5103PT

1

mhoK001

0313R

7303C

Fu01

mho001

5113R

FERX

0013R

mho0

W01/1

10K

ohm

10K

ohm

R3021

R3021

FERX

7103D

HTG03C3SDC

FERX

9

01

Fn0011203C

LAVLPUS

1003AJ

4

5

6

7

8

HTG03C3SDC

4003D

mho0015503R

C

6113R mho001

V5A

2811ASK

5003Q

E

B

FERX

2113R

mho57

2203C

Fp001

10K

ohm

10K

ohm

R3005

R3005

4_GIS

5_GIS 8

6_GIS 9

Fu01

0403C

1_DNG 1

42_DNG

3_DNG 7

1_GIS 2

2_GIS 3

53_GIS

6

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mhoK1

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NI2R8

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mho57

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mho001

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mho0

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1

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2.8ZLR

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42_DNG

3_DNG 7

1_GIS 2

2_GIS 3

53_GIS

64_GIS

5_GIS 8

6_GIS

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6003AJ

b_p9kcaj

FERX

mho0011903R

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1K

ohm

R3081

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mho0748403R

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mho017013R

mho0014113R

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mho0015603R

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ohm

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mho0018013R

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R3085

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1K

ohm

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mho001

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3

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mho001

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3

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mho0

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2.8ZLR

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6

7

8

9

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1

8103PT

43

43

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YN

C-I

(SO

G)

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(SO

G)

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(2)

HS

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(2)

44

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9NIX

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)P

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63

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40

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)P

3.2

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(2)

35

35

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21

21

22

22

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323DA/3.1P

0.2P42

1.2P52

622.2P

723.2P

4.2P

P0.4

(2)

P0.4

(2)

14

14

15

15

P0.5

(2)

P0.5

(2)

P0.6

(2)

P0.6

(2)

16

16

NC

NC

17

17

18

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1.0

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1.2

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0

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(2)

P0

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)

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12

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ES

ET

NR

ES

ET

13

13

FERX

5303PT

1

2003CI

B668F3S

7503R mho074

10K

ohm

10K

ohm

R3039

R3039

mho074

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mho001

8603R

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FERX

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0503R

W01/1

4212R

mho0

mhoK7.4

5212R

1

0203PT

1

6003PT

1

4103PT

8203PT1

4203PT

1

1

0103PT

1

7003PT

1

8003PT

481SDK

2003D

12

3

FERX

CCV_V5B

1_V3.3B

FERX

1_V3.3B

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4203C

Fp033

mho0749503R

mho0

1

FERX FERX

CCV_V5B

4213R

1

mho001Fp22

0103C

V05

V61

1003C

7603R

3CN

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ADS5

6LCS

CW/7

CCV8

Fu01

7.2-IS01-NA61C42TA

4003CI

1CN

2CN

6403R mho001

4403R mho001

4003L

mho001

7313R

mhoK22

6703R

FERX

9703R

6503R mho074

mhoK1

mhoK22

5313R

8203C

Fn001

R3033

R3033

10K

ohm

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ohm

mho0743503R

7203PT1

Fp02

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mho0010903R

CCV_V5B

mho001

4903R

1

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1

4DNG

5B2

B16

72EO/

CCV8

FERX

3003PT

1003CIX8K5213DBW7CN

1EO/1

A12

A23

TNI_EVALS

SUTATS_NAF

NI_DNGA

NI_DNGA

1YEK

2YEK

S2I_LES

0103CI_WS

ADS_UME

LCS_UME

UME_ADS

UME_LCS

2ETUM_PMA

NI_DNGA

YDAER_C2I

1ETUM_PMA

OFNI_REWOP

TNEDI_1OEDIV

TNEDI_IMDH

TNEDI_1SHVS

TNEDI_1PMOC

TNEDI_2PMOC

TNEDI_CP

TNEDI_PH

MOCIMS_3LCS

MOCIMS_3ADS

PC

_H

S_

MIC

OM

PC

_H

S_M

ICO

M

PC

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S_M

ICO

MP

C_V

S_M

ICO

M

PC

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S_M

ICO

MP

C_V

S_M

ICO

M

TESERn_UPC

PSM_TESER

IMDH_TESER

PVS_TESER

NE_SDVL

REWOP_WS

V5_IMDH

V5_CP

PW_CDD

TED_NAF

RI

DER_DEL

NRG_DEL

PH_ETUM

TUO_CDA_IMDH_WS

SYS2QRI

NE_BOO

WS_DOP

LES_BOO

0NE1NE

NI_DNGA

FFO_NO_NAF

652C42_2ADS

652C42_2LCS

EIND_TESER

S2I_LES

NIAM_TFA V5_VT_5LCSV5_VT_5ADS

TUO_VTD_WS

NI_DNGA

NI_DNGA

2FR_WS

PH_ETUM

NI_DNGA

TUO_ROTINOM

TUO_LS_2CS_YNA

TUO_RS_2CS_YNANI_DNGA

NI_DNGA

NI_DNGA

NI_DNGA

NI_DNGA

1YALED

2YALED

NO_ANL1FR_WS

PMOC_LES

CP_PMOC_LES

NI_DNGA

CGA_FR

TUO_FIDPS_WS

NI_DNGA

NI_DNGA

NI_DNGA

NI_DNGA

FIDPS_IMDH

TUO_FIDPS_WS

TUO_FIDPS_MAS

NI_DNGA NI_DNGANI_DNGA NI_DNGA

C_1SHVS

Y_1SHVS

NI_DNGA

SBVC_1OEDIV

TNEDI_1OEDIV

TNEDI_1SHVS

NI_DNGANI_DNGA

NI_LS_1OEDIV

NI_RS_1OEDIV

TENYNA_DXT

TENYNA_DXR

GUBED_DXT

GUBED_DXR

NI_DNGANI_DNGA

10-3 MICOM & IO-EX & AV IN/OUTThis Document can not be used without Samsung’s authorization.

PowerSignal

10-4 HDMI & PC

10-4

Schematic Diagram

Samsung Electronics

NI_S_IVD

mho 22

CEC

mho 22

mho 22

NOITPO ETELED

892100-1073:N/P

CN

mho 22

mho 22

rP/bP/Y_GOLANA

mho 22

89x0

mho 22

mho 22

NI_S_CP

06x0

GOLANA

160100-2273

22

NI_CP

203100-1092 >= 495100-1033

mho 22

GOLANA

IMDH

TUPNI_IMDH

CO

NF

IG_

I2C

CO

NF

IG_

I2C

CN

mho 22

CN

9404C

NOITPO ETELED

22

CN

1 2

3

Fn001

6204D

Fu22

V61

Fp001

2304C

1704C

5304C

Fn1

7104D

11-ET-B6.5ZLR

1

Fp022

0204C

6504R

8104PT

4004PT1

mho01

Fp022

5204C

FERX

5804R mho001

mho012504R

FERX

3704R mho33

8

FERX

7304C

Fp33V05

0204R

1 2

3 4

5 6

7

1_V3.3B

2.8ZLR

6004D

5004PT1

1_V3.3B

Fu01

6704C

ES8414DBMM

9104D

Fn1

FERX

1_V3.3B

1_V3.3B

6604C

9504C

Fn1

45

6

7

8

0804RmhoK9.3

1

CS01-N20C42TA

1004CI

1

2

3

3204C

Fp022

V05

1104PT

1004D

12

3

78

78

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DV

DD

VD

DV

DD

79

79

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GN

DG

ND

80

80

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70

70

R/C

r[7]

R/C

r[7]

R/C

r[6]

R/C

r[6]

71

71

R/C

r[5]

R/C

r[5]

72

72

R/C

r[4]

R/C

r[4]

73

73

R/C

r[3]

R/C

r[3]

74

74

R/C

r[2]

R/C

r[2]

75

75

R/C

r[1]

R/C

r[1]

76

76

R/C

r[0]

R/C

r[0]

77

77

63

63

GN

DG

ND

VS

OU

TV

SO

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64

64

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GO

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65

65

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SO

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66

66

DC

KD

CK

67

67

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DG

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68

68

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69

69

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ADS75

FERV85

DDVA95

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GN

DG

ND

61

61

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DD

AV

DD

62

62

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DDVA15

DDVA25

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rP/NIR45

0A55

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DDVA64

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Y/NIG84

34

34

PV

DD

PV

DD

PV

DD

PV

DD

35

35

GN

DG

ND

36

36

MID

SC

VM

IDS

CV

37

37

CLA

MP

CLA

MP

38

38

AV

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AV

DD

39

39

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GN

DG

ND

40

40

27

27

PV

DD

PV

DD

GN

DG

ND

28

28

CO

AS

TC

OA

ST

29

29

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HS

YN

CH

SY

NC

30

30

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YN

CV

SY

NC

31

31

GN

DG

ND

32

32

FIL

TF

ILT

33

33

2]7[Y/G

DNG02

GN

DG

ND

21

21

VD

DV

DD

22

22

VD

DV

DD

23

23

GN

DG

ND

24

24

GN

DG

ND

25

25

PV

DD

PV

DD

26

26

21]7[bC/B

]6[bC/B31

]5[bC/B41

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3004CI

011-RC3889TSM

DNG1

DNG01

DDV11

Fn001

4204C

Fn74

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FERX

9704C

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FERX

2304D11-ET-B6.5ZLR

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3004C

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FERX

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9104PT1

mho07304R

mho093

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mho57

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2104R mho22

T-060-H8061BCA9004DB

2604R

mhoK01

mho0013004R

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56

78

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6004R

mho57

7604R

9504R mho01

mho0

1 2

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1 2

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1 2

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mhoK01

8504C

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1004DB

A003S2102ZPM

B

3

4

5

6

7

8

9

1DNGM

2DNGM

3DNGM

31

41

51

61

71

81

91

2

32

42

ADW910R1CD

4004AJ

1

01

11

21

3

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1 2

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88DNGA

98CCVA

TESR9

DNGA09

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29

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DNGP97

8PMOC

08CCVP

18SER_TXE

CCVA28

38-CXR

+CXR48

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0Q

71

71

INT

INT

72

72

RE

SE

T#

RE

SE

T#

73

73

RS

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VD

CS

CL

CS

CL

74

74

75

75

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CS

DA

76

76

DS

DA

DS

DA

DS

CL

DS

CL

77

77

87

36

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CCVO76

862Q

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07

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8Q85

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41Q05

31Q15

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71Q44

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46

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CK

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CK

CCVO74

8461Q

51Q

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YN

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DE

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35

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32Q63

7322Q

12Q83

9302Q

4OFERVCAD

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72

82DNGO

FIDPS92

3IFERVCAD

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23KCS

HS

YN

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33

33

34

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2

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20

20

12CCVO

22DNGLLP

CCVLLP32

24

24

PL

LIN

PL

LIN

PL

LO

UT

PL

LO

UT

25

25

62TUOKLCM

NIKLCM

YGNA

31BDNGCAD

BCCVCAD41

BPBNA51

61DNG

CCV71

RS

VD

RS

VD

18

18

19

19

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VD

RS

VD

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001TC3999IIS

1CCVCAD

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21

FERX

7704R

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5004CI

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7704C

7404C

3504C

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mho0

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8604C

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1204D

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FERX

9604C

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7 8

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9204R

1 2

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5

2.8ZLR

3204R mho001

8004D

1004L

6704R

mho001

FERX

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mho334604R

FERX

FERX

9604R mho0

2204C

Fn01

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mho57

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7004DB

1 2

3 4

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B

2.8ZLR

2104D

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1 2

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1 2

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6004L

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hm

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m2

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8304C

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8704R

mhoK7.4

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0704R

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1 2

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5 6

7 8

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FERX

2204D

11-ET-B6.5ZLR

4004AR

1DNGM

2DNGM

4104D

2.8ZLR

31

41

51

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3

4

5

6

7

8

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1

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mho0012404R

2.8ZLR

5004D

2.8ZLR

4004D

5204R1 2

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mho0014204R

2004D

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Fp022

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6504CFn001

Fn001 Fn001

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hm

4.7

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hm

3104C

4404R mho22

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82

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7204C

3004D

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V61

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6304R

mhoK7.4

mho0742304R

0204D

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mhoK01

1604R

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m2

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40

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8504R mho01

8CCV

Hu01

5004L

11EO/

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3A2

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6B1

2EO/7

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6004CI

2704R mho0

2704C

Fn001

9104R

mho001

mho001

2204R

7504C

Fu22V61

1_V3.3B

3404R mho074

5004DB

S006P14MLB

4

5 6

7 8

Fu01V61

3704C

8104R1 2

3

B

4104R mho57

8

0104DB

T-060-H8061BCA

6004AR

1 2

3 4

5 6

7

B2.6ZLR

8104D

1704R mhoK01

2004R mho001

B

6304C

Fn74

T-060-H8061BCA

2004DB

1

mho0016204R

Fn001

8404C

2004PT

mho001

FERX

3104R mho74

FERX1204R

mho08404R

6404R mho0

FERX

5004R

mhoK01

1104R mho74

3404C

Fp033

CCV_CDD

5404C

Fu001

V61

3804R mho74

5504R

4604C

Fn001

mho01

34

56

78

FERX

mho229404R

3

4304R

12

4204D

ES8414DBMM1 2

9004R mho001

01K

11L

21M

31N

41

mho0741304R

NI

1

A

BNI

2

3

CNI

DNI

4

ENI

5

FNI

6

GNI

7

H8

I9

J

Fn001

XM41XCL47

2004CI

Hu014004L

2104C

1 2

3

1_V3.3B

9204D

V5A

0304R

mho001

2504C

Fn001

3

2.8ZLR

6104D

5204D

1 2

2004C

Fu001

FERX

Fu01

6204C

FERX

0604C

V61

Fu01

R4

04

0R

40

40

22

oh

m2

2o

hm

7404R mho22

3604R

Fn15704C

Fp001mho33

Fn001

8704C

V52

4504C

Fn001

4004C

0104PT1

3304C

8304R mho074

V3.3A

Fp001

Fn001

5104C

Fn001

7104C

Fn1

0504C

4004DBB

7 8

2104PT1

1 2

3 4

5 6

mho01

1_V3.3B

1004AR

R4

03

5R

40

35

FERX

3504R

6104R mho001

10

0o

hm

10

0o

hm

Fn0014704C

mho017504R

Fn28

1204C

0704C

Fn001

mho01

Fn001

3604C

3004PT1

4504R

V3.3A

6604Rmho74

4004CI1

2

3

45

6

7

8

Fp022

8104C

CS01-N20C42TA

mho225404R

Fp033

0404C

7204R

mho001

FERX

Fn001

0104C

2004TF

T-060-H8061BCA

6004DB

B

Fu001

1104C

9704R mho74

FERX

mho334704R

0104D

2.8ZLR

4

5

6

2404C

Fp033

3004AJ3_p6kcaj

1

2

3

5304PT

1

Fp022

9004C

1

6304PT

1

1304PT

1

4304PT

1

3304PT

1

5704R mho0

2304PT

Fn001

9204C

7604C

Fn1

1

7004D

2.8ZLR

9004PT1

3104PT

1004PT1

2.8ZLR

1104D

NI_DNGA

NI_DNGA

PW_CDD

PW_CDD

mho330604R

+KLCXR_2D

-KLCXR_2D

+0XR_2D

+1XR_2D

+2XR_2D

LCS_CDD_2D

ADS_CDD_2D

NI_DNGA

NI_DNGA

NI_DNGA

NI_DNGA

TNEDI_CP

V5_IMDH

ED_IMDH

SV_DA_IMDH

SH_DA_IMDH

KLC_DA_IMDH

HD

MI_

HS

HD

MI_

HS

HD

MI_

VS

HD

MI_

VS

DER_CP

V3.3_VT_4LCS

V3.3_VT_4ADS

7567_SH_CP

7567_SV_CP

LCS_UMEADS_UME

NI_DNGA

NEERG_CP

SV

P_

R(7

)S

VP

_R

(7)

SV

P_

R(6

)S

VP

_R

(6)

SV

P_

R(5

)S

VP

_R

(5)

SV

P_

R(4

)S

VP

_R

(4)

SV

P_

R(0

)S

VP

_R

(0)

)7:0(G_PVS

)7(G_PVS

)6(G_PVS

)5(G_PVS

)4(G_PVS

)3(G_PVS

)2(G_PVS

)1(G_PVS

)0(G_PVS

)7:0(B_PVS

)7(B_PVS

)6(B_PVS

)5(B_PVS

)4(B_PVS

)3(B_PVS

)2(B_PVS

)1(B_PVS

)0(B_PVS

EULB_CP

)7(B_PVS

)6(B_PVS

)5(B_PVS

)4(B_PVS

)3(B_PVS

)2(B_PVS

)1(B_PVS

)0(B_PVS

)7:0(R_PVS

)7:0(G_PVS

)7:0(B_PVS

TNEDI_IMDH

LCS_CDD_2D

ADS_CDD_2D

)7:0(R_PVS

SV

P_

R(3

)S

VP

_R

(3)

SV

P_

R(2

)S

VP

_R

(2)

SV

P_

R(1

)S

VP

_R

(1)

)7(R_PVS

)6(R_PVS

)5(R_PVS

)4(R_PVS

)3(R_PVS

)2(R_PVS

)1(R_PVS

)0(R_PVS

)7(G_PVS

)6(G_PVS

)5(G_PVS

)4(G_PVS

)3(G_PVS

)2(G_PVS

)1(G_PVS

)0(G_PVS

NI_DNGDNI_DNGA

NI_DNGD NI_DNGD

NI_DNGD

NI_DNGD

DG

ND

_IN

DG

ND

_IN

NI_DNGD

NI_DNGA

NI_DNGD

NI_DNGD

DER_CP

NEERG_CP

EULB_CP

mm5.0

mm5.0

V3.3_VT_4ADS

IMDH_TESER

SYS2QRI

7567_SV_CP

7567_SH_CP

MOCIM_SV_CP

MOCIM_SH_CP

FIDPS_IMDH

KLCS_IMDH

KLCRL_IMDH

ODS_IMDH

V3.3_VT_4LCS

KLCM_IMDH

-2XR_2D

+2XR_2D

-1XR_2D

+1XR_2D

-0XR_2D

+0XR_2D

+KLCXR_2D

-KLCXR_2D

NI_RS_CP

NI_DNGA

-2XR_2D

-1XR_2D

-0XR_2D

mm5.0

NI_DNGA

NI_LS_IVD

NI_RS_IVD

NI_DNGA

NI_DNGA

NI_DNGA

V5_CP

NI_DNGA

NI_DNGA

NI_LS_CP


10-5 SVP-EX52

Samsung Electronics

Schematic Diagram

10-5

RDD ot raeN

NOITPO ETELED

NOITPO ETELED

XE_PVS OT ESOLC

335100-5011

LORTNOC C2I GUBED ROF

NOITPO ETELED

NOITPO ETELED

4015C,1705C,9605C,6605C,1605C

3315C,8215C,7215C,3215C

RDD 23 X M4

NOC_SO

NOITPO ETELED

NOC_SO

NOC_SO

NOITPO ETELED

NOC_SO

V01

Fu74

7905C

V01

Fu74

8805C

V05

FU1.0

V01

Fu74

3805C

6505R mhoK1

5405C

1

33ohm

33ohm

R5

011

R5

011

W01/1

7005PT

1

6005PT

V05

Fp001 7805C

V05

2805CFp001

V61

Fn001

V61

5505C

3005PT

1

8505C

Fn001

5005PT

1

4005PT

1

V01

Fu74

2015C

7505C

Fu001

V52

V3.6

4505C

Fu021

1_1_V3.3B

1/1

0W

1/1

0W

R5

07

7R

50

77

1K

ohm

1K

ohm

mhoK3.3

9705R

7005DB

1A B

2

1505C

V61

Fn001

V52

S006P14MLB

V52

8405C

Fn001

0905CV52

Fn001

5905C

Fn001

9905C Fn001

V52

33ohm

33ohm

R5

00

8R

50

08

V52

3405C

Fn001

4305CV52V52

3305C

Fn001

7505RmhoK1

W01/1

Fn001

mhoK01 0605R

1005Q

mho0

3705R

W01/1

G-3261CSK

5115C

Fn001

Fn001

6205CV52 V52

7205C

Fn001

V52

5315CV52

Fn001

6405C

V52

5305C

Fn001

9405CFn001

V52

Fn001

9505C

Fn001

V52

2505CV52

Fn001

Fp02

6215C

6305CV52

Fn001 Fn001

7305C

Fn001

V52 V52

9305C

Fn001

8305CV52 V52

Fn001

V52

9205C

Fn001

0405C

Fn001

0305CV52 V52

1305C

Fn001

Fn001

Fn001

2305CV52

1405C

Fn001

V5A8005C

V52

Fn001

2405CV52

V05

Fu1

9605C

V52

Fu1

V05

6605C

W01/1

2705R mho001

8405R

Fu1

V05

1705C

3605R

W01/1

mho0

mho0

33ohm

33ohm

33ohm

33ohm

R5

01

0R

50

10

R5

00

7R

50

07

33ohm

33ohm

R5

00

9R

50

09

1

FU1.0

4405C

V05

42SS

1005D

1005PT

2605C

Fn01

0605C

Fp001

1605R

mhoK01

Fn0015705C

3705C Fn001

Fn01

mho0

5805R

3505C

V52

V6DPVS_DV8.1B

2005PT

1

6315C

Fn001

8505R

W01/1

mhoK01

2605R

1

mhoK6.5

W01/1

9505R

mhoK01

1U

Fn0014215C

mho0

6405R

1

JDA

TUOV23

NIV

3005L

A52-D7111PA

1005CI

mho0

4705R

0o

hm

0o

hm

R5

08

2R

50

82

mho0

W01/1W01/1 6705R

mho0

5705R

8705R mho0

mho57

1805R

6115C

Fn001

4115C

Fn001

2005R mho001

4005R

V52

6905CFn001

mho22

1005R

mho22

mhoK7.4

3405R

W01/1

33ohm

33ohm

R5

02

0R

50

20

)ZHM81813.41(DMS-S/94-CH

33ohm

33ohm

R5

03

2R

50

32

Fp02

0505C

zHM81813.41

1005X

2005L

Fn001

CCV_V5B

Hu2.2

mho0 5605R

8205CV52

V01

Fu1

1005C

Hu2.21005L

0705CFn001

9605R

W01/1

mho0

1005TSET

123

R5

03

8R

50

38

10

0o

hm

10

0o

hm

Fu1

30-052WMS

3605C Fn001

1605C

4605R mho0

W01/1

R5

05

2R

50

52

22ohm

22ohm

1/1

0W

1/1

0W

1/1

0W

1/1

0W

22ohm

22ohm

R5

05

1R

50

51

V05

33ohm

33ohm

R5

02

3R

50

23

Fn001

3315C

Fu1

3115CFn001

9115C

R5

00

6R

50

06

33ohm

33ohm

SB1

2NI

3WS

DNG4

BF5

6PMOC

7NE

8SS

ND3851PM

5005CI

Fn001

V05

Fu1

4015C

7015C

4705C

Fn001

mho04405R

9005DB

0115C Fu1

0315C Fn001

Fn001

1315C

2705C

2315C Fn001

Fn001

6505C

Fu001

V61

5005L

V3.3A

8115C

V52

Fn001

Hu2.2

Fu1

3215C

V05

33ohm

33ohm

33ohm

33ohm

R5

02

5R

50

25

R5

08

3R

50

83

R5

01

9R

50

19

33ohm

33ohm

0o

hm

0o

hm

33ohm

33ohm

R5

03

7R

50

37

R5

03

1R

50

31

R5

03

0R

50

30

33ohm

33ohm

PVS_LV8.1B

33ohm

33ohm

R5

02

6R

50

26

Fn001

V61

1215C

Fp03

5015C

33ohm

33ohm

R5

01

4R

50

14

R5

01

5R

50

15

33ohm

33ohm

33ohm

33ohm

mho0013005R

R5

02

1R

50

21

mho225005R

R5

04

0R

50

40

33ohm

33ohm

R5

03

9R

50

39

R5

03

4R

50

34

33ohm

33ohm

R5

01

3R

50

13

33ohm

33ohm

mho221705R

33ohm

33ohm

33ohm

33ohm

R5

01

7R

50

17

33ohm

33ohm

R5

01

6R

50

16

33ohm

33ohm

R5

02

2R

50

22

33ohm

33ohm

R5

02

9R

50

29

33ohm

33ohm

R5

01

2R

50

12

33ohm

33ohm

33ohm

33ohm

R5

02

8R

50

28

33ohm

33ohm

R5

03

3R

50

33

3NIV

V05

Fu1

7215C

R5

04

2R

50

42

8.1-DA7111NAF

8005CI1

JDA

TUOV2

Fn0018605C

1_1_V3.3B

Fn0017605C

7605R mho0

6605R mho0

22ohm

22ohm

R5

05

3R

50

53

3005DB

1/1

0W

1/1

0W

R5

05

0R

50

50

PVS_V5.2B

8.1DV

1/1

0W

1/1

0W

5215C

Fu74

V61

22ohm

22ohm

9215C Fn001

Fu1

V05

8215C

V61

Fu01

5105DB

Fn0012115C

1905C

8.1DV

0805RmhoK2.1

Fu1

7115C

DP

IN0

DP

IN0

Y6

Y6

DP

IN1

DP

IN1

DP

IN16

DP

IN16

Y7

Y7

Y8

Y8

DP

IN17

DP

IN17

DP

IN_C

LK

DP

IN_C

LK

Y9

Y9

HDDV

QMDDV

8.1DV

V01

DP

IO6

DP

IO6

DP

IO1

DP

IO1

Y1

7Y

17

Y1

8Y

18

NC

NC

NC

NC

Y1

9Y

19

Y2

Y2

DE

DE

Y2

0Y

20

NC

NC

DP

IN9

DP

IN9

Y3

Y3

Y4

Y4

DP

IN10

DP

IN10

Y5

Y5

W9

W9

V

Y1

Y1

Y1

0Y

10

DP

IN_H

DP

IN_H

DP

IO21

DP

IO21

Y11

Y11

Y1

2Y

12

DP

IO20

DP

IO20

DP

IO14

DP

IO14

Y1

3Y

13

Y1

4Y

14

DP

IO13

DP

IO13

DP

IO7

DP

IO7

Y1

5Y

15

Y1

6Y

16

H

W2

0W

20

NC

NC

DP

IN8

DP

IN8

W3

W3

W4

W4

DP

IN11

DP

IN11

DP

IN15

DP

IN15

W5

W5

W6

W6

DP

IN2

DP

IN2

DP

IN7

DP

IN7

W7

W7

W8

W8

DP

IN18

DP

IN18

DP

IN23

DP

IN23

DP

IO19

DP

IO19

DP

IO15

DP

IO15

W1

3W

13

W1

4W

14

DP

IO12

DP

IO12

W1

5W

15

DP

IO_C

LK

DP

IO_C

LK

W1

6W

16

DP

IO5

DP

IO5

DP

IO0

DP

IO0

W1

7W

17

W1

8W

18

NC

NC

NC

NC

W1

9W

19

W2

W2

V5

V5

V6

V6

DP

IN3

DP

IN3

DP

IN6

DP

IN6

V7

V7

V8

V8

DP

IN19

DP

IN19

DP

IN22

DP

IN22

V9

V9

MP

UC

S_F

LD

MP

UC

S_F

LD

W1

W1

W1

0W

10

DP

IN_V

DP

IN_V

DP

IO22

DP

IO22

W11

W11

W1

2W

12

DP

IO4

DP

IO4

DP

IO_R

T0

DP

IO_R

T0

V1

7V

17

V1

8V

18

NC

NC

NC

NC

V1

9V

19

V2

V2

SD

AS

DA

V2

0V

20

NC

NC

PW

MP

WM

V3

V3

V4

V4

DP

IN12

DP

IN12

DP

IN14

DP

IN14

U9

U9

V5

SF

V5S

F

V1

V1

V1

0V

10

DP

IN_D

ED

PIN

_D

E

DP

IO23

DP

IO23

V11

V11

DP

IO18

DP

IO18

V1

2V

12

DP

IO16

DP

IO16

V1

3V

13

V1

4V

14

DP

IO11

DP

IO11

DP

IO8

DP

IO8

V1

5V

15

V1

6V

16

TE

ST

MO

DE

TE

ST

MO

DE

U2

0U

20

NC

NC

RE

SE

TR

ES

ET

U3

U3

U4

U4

SC

LS

CL

DP

IN13

DP

IN13

U5

U5

U6

U6

DP

IN4

DP

IN4

DP

IN5

DP

IN5

U7

U7

U8

U8

DP

IN20

DP

IN20

DP

IN21

DP

IN21

VD

DH

VD

DH

DP

IO17

DP

IO17

U1

3U

13

U1

4U

14

DP

IO10

DP

IO10

DP

IO9

DP

IO9

U1

5U

15

U1

6U

16

DP

IO3

DP

IO3

DP

IO_R

T1

DP

IO_R

T1

U1

7U

17

U1

8U

18

DP

IO_R

T2

DP

IO_R

T2

NC

NC

U1

9U

19

U2

U2

SH_NIA

5TCDDV

6THDDV

7THDDV

HDDV8T

AIN

_V

SA

IN_V

S

U1

U1

U1

0U

10

DP

IN_F

LD

DP

IN_F

LD

VD

DH

VD

DH

U11

U11

U1

2U

12

HDDV

2OIPD61T

71T3TR_OIPD

CN81T

91TCN

2T2SSVAP

02TCN

3T2FLP

4T

1DDVAP

02RCN

3R1FLM

4R1SSVAP

5RCDDV

2DDVAP1T

31THDDV

41THDDV

51T

3P

4PSSVDP

5PCDDV

1ROLTX

61RCDDV

71R4TR_OIPD

81RCN

91RCN

2R

SSV

1P1LTX

61PCDDV

71P5TR_OIPD

81PCN

91PCN

SSVAP2P

02PCN

DDVAP

CN

91N1DM

2N2G_Y

02N0DM

3N3N_NIA

4NDDVDP

CDDV5N

8NCDDV

9N

SSV

1N2N_NIA

SSV01N

11NSSV

21NSSV

31NCDDV

61NCDDV

71NSSV

81N

MDDV

81M3DM

91MSSV

2M1N_NIA

02M2DM

3M3SBVC

4M2SBVC

8MSSV

9M

4L

8L

SSV

SSV

9L

1M1G_Y

01MSSV

11MSSV

21MSSV

31MSSV

71M

SSV

31LSSV

MDDV71L

81L4DM

91L0MQD

1_NFERV2L

0SQD02L

1_PFERV3L

1SBVC

MD

5M

D5

K3

K3

CV

BS

_O

UT

PC

VB

S_O

UT

P

AV

SS

3_B

GA

VS

S3_B

GK

4K

4

K8

K8

VS

SV

SS

K9

K9

VS

SV

SS

1CDA_SSVA

1L

01L

SSV

11LSSV

21L

VS

SV

SS

K11

K11

VS

SV

SS

VS

SV

SS

K12

K12

K13

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)62(DM_RDD

)72(DM_RDD

)82(DM_RDD

)92(DM_RDD

)03(DM_RDD

)13(DM_RDD

)13:0(DM_RDD

)0(MQD_RDD

DD

R_M

A(1

0)

DD

R_M

A(1

0)

DD

R_M

A(9

)D

DR

_M

A(9

)

DD

R_M

A(8

)D

DR

_M

A(8

)

DD

R_M

A(7

)D

DR

_M

A(7

)

DD

R_M

A(6

)D

DR

_M

A(6

)

DD

R_M

A(5

)D

DR

_M

A(5

)

DD

R_M

A(4

)D

DR

_M

A(4

)

DD

R_M

A(3

)D

DR

_M

A(3

)

)2(AM_RDD

DN

IE_R

IN(1

)D

NIE

_R

IN(1

)

DN

IE_R

IN(0

)D

NIE

_R

IN(0

)

)9:0(NIR_EIND

SV

P_A

D(7

)S

VP

_A

D(7

)

SV

P_A

D(6

)S

VP

_A

D(6

)

)5(DA_PVS

)4(DA_PVS

)3(DA_PVS

)2(DA_PVS

)1(DA_PVS

)0(DA_PVS

)7:0(DA_PVS

)7(DC_PVS

)6(DC_PVS

)5(DC_PVS

)4(DC_PVS

)3(DC_PVS

)2(DC_PVS

)1(DC_PVS

)0(DC_PVS

)7:0(DC_PVS

)7:0(G_PVS

)0(DM_RDD

)1(DM_RDD

)2(DM_RDD

)3(DM_RDD

)4(DM_RDD

DD

R_M

D(7

)D

DR

_M

D(7

)

DD

R_M

D(8

)D

DR

_M

D(8

)

DD

R_M

D(9

)D

DR

_M

D(9

)

DD

R_M

D(1

0)

DD

R_M

D(1

0)

DN

IE_G

IN(1

)D

NIE

_G

IN(1

)

DN

IE_G

IN(0

)D

NIE

_G

IN(0

)

)9:0(NIG_EIND

DN

IE_R

IN(9

)D

NIE

_R

IN(9

)

DN

IE_R

IN(8

)D

NIE

_R

IN(8

)

DN

IE_R

IN(7

)D

NIE

_R

IN(7

)

DN

IE_R

IN(6

)D

NIE

_R

IN(6

)

DN

IE_R

IN(5

)D

NIE

_R

IN(5

)

DN

IE_R

IN(4

)D

NIE

_R

IN(4

)

DN

IE_R

IN(3

)D

NIE

_R

IN(3

)

DN

IE_R

IN(2

)D

NIE

_R

IN(2

)

DN

IE_B

IN(2

)D

NIE

_B

IN(2

)

DN

IE_B

IN(1

)D

NIE

_B

IN(1

)

DN

IE_B

IN(0

)D

NIE

_B

IN(0

)

)9:0(NIB_EIND

DN

IE_G

IN(9

)D

NIE

_G

IN(9

)

DN

IE_G

IN(8

)D

NIE

_G

IN(8

)

DN

IE_G

IN(7

)D

NIE

_G

IN(7

)

DN

IE_G

IN(6

)D

NIE

_G

IN(6

)

DN

IE_G

IN(5

)D

NIE

_G

IN(5

)

DN

IE_G

IN(4

)D

NIE

_G

IN(4

)

DN

IE_G

IN(3

)D

NIE

_G

IN(3

)

DN

IE_G

IN(2

)D

NIE

_G

IN(2

)

#SAC_RDD

)3(SQD_RDD

LSSV

LDDV

0KLCM_RDD#0KLCM_RDD

FERVM1AB_RDD

)2(SQD_RDD

DN

IE_B

IN(9

)D

NIE

_B

IN(9

)

DN

IE_B

IN(8

)D

NIE

_B

IN(8

)

DN

IE_B

IN(7

)D

NIE

_B

IN(7

)

DN

IE_B

IN(6

)D

NIE

_B

IN(6

)

DN

IE_B

IN(5

)D

NIE

_B

IN(5

)

DN

IE_B

IN(4

)D

NIE

_B

IN(4

)

DN

IE_B

IN(3

)D

NIE

_B

IN(3

)

KLC_PVS

VS

OU

T_

EX

VS

OU

T_

EX

HS

OU

T_

EX

HS

OU

T_

EX

CL

KO

UT

_E

XC

LK

OU

T_

EX

2SSVAP2DDVAP

1SSVAP

1DDVAP

SSVDPDDVAPSSVAP

DDVDP

)0(SQD_RDD

1CDA_SSVA

SSA_GB_3SSVA

DD

R_M

D(5

)D

DR

_M

D(5

)

DD

R_M

A(1

1)

DD

R_M

A(1

1)

1CDA_DDVA

2PSVA_3DDVA

VD

DH

_C

PU

VD

DH

_C

PU

2CDA_DDVA2CDA_SSVA

VD

DH

_C

PU

VD

DH

_C

PU

3CDA_SSVA

3CDA_DDVA

DD

R_

DQ

S(1

)D

DR

_D

QS

(1)

EKLC_RDD

#SAR_RDD

#EW_RDD

0AB_RDD

#0SC_RDD

PVS_RWn

TNI_PVS

V3.3B_HDDV

3CDA_SSVA

2CDA_SSVA

UPC_HDDV

RP_1PMOC

RP_2PMOC

C_1SHVS

BP_1PMOC

BP_2PMOC

1CDA_SSVA

Y_1PMOC

Y_1SHVSNIAM_SBVC_RENUT

Y_2PMOC

TUO_ROTINOM

SV

P_G

(5)

SV

P_G

(5)

SV

P_R

(4)

SV

P_R

(4)

SV

P_R

(5)

SV

P_R

(5)

SV

P_B

(4)

SV

P_B

(4)

SV

P_B

(6)

SV

P_B

(6)

SV

P_G

(3)

SV

P_G

(3)

SV

P_G

(6)

SV

P_G

(6)

SV

P_R

(3)

SV

P_R

(3)

SV

P_R

(6)

SV

P_R

(6)

SV

P_B

(0)

SV

P_B

(0)

SV

P_B

(3)

SV

P_B

(3)

SV

P_B

(7)

SV

P_B

(7)

SV

P_G

(2)

SV

P_G

(2)

SV

P_G

(7)

SV

P_G

(7)

SV

P_R

(2)

SV

P_R

(2)

SV

P_B

(1)

SV

P_B

(1)

SV

P_B

(2)

SV

P_B

(2)

SV

P_R

(0)

SV

P_R

(0)

)7:0(R_PVS

)7:0(B_PVS

PVS_TESER

V3.3_VT_4ADS

V3.3_VT_4LCS

SH_PVS

SV_PVS

ED_PVS

SC_PVSp

PVS_DRn

SBVC_1OEDIV

DD

R_M

D(6

)D

DR

_M

D(6

)

SV

P_R

(1)

SV

P_R

(1)

SV

P_G

(0)

SV

P_G

(0)

SV

P_G

(1)

SV

P_G

(1)

SV

P_R

(7)

SV

P_R

(7)

SV

P_B

(5)

SV

P_B

(5)

SV

P_G

(4)

SV

P_G

(4)


PowerSignal

10-6 S3C2800

10-6

Schematic Diagram

Samsung Electronics

680100-2042 >= 012100-2042

V3.3A

680100-2042 >= 012100-2042

CN-FM

680100-2042 >= 012100-2042

DE

LETE

OP

TIO

N

NOITPO ETELED

NOITPO ETELED

NOITCETORP ETIRW :4

UPC FO REWOP ICP ROF

B >- A : H RID

FS-FM

A >- B : L RID

)M8(822100-7011 : AEROK

FS-RB

NOITPO ETELED

KCOLC :2)EVITCA WOL( POTS_SUB :3

ELBASID :WOL

NOITPO ETELED

UPC_V3.3A

mm45.2:HCTIPNOITPO

ELBANE :HGIH

NOITPO ETELED

NOITPO ETELED

NOITPO ETELED

NOITPO ETELED

FM-FS

KCEHC_TNIOP_PT

)M61(922100-7011 : ASU

ATAD :1

1

rotcennoC GIJ ETIRW MORPEE

DNUORG :5V5 :6

DNG

NOITPO

3006CN

1606CFn01

V05

mhoK7.4 4806R

6606CFn001

mho749806R

2106PT

V61

9006CFn001

0306CFn001

V3.3A

3806R mho001

V61

mhoK7.43006R

FERX

mho04306RW01/1

4.7K

ohm

FERX

R60

17

2806RmhoK7.4

7CW/CCV

8

4.7K

ohm

R60

22

T6NMW-65242M

0A1

1A2

CN34

SSV5

ADSLCS

6

8016RmhoK01

5006CI

Fn001

W01/1mhoK86

8006R

V61

6506C

V05Fn01

9506CFn0018506C

V61

V5A

0ohm

R61

13

3106PT

6106PT

2006CN 1

2106DA 1

mho0013606R

9006DC 1

V5A

1006QL2007N2

D

G

S

mho0011506R

9706RmhoK7.4

R60

144.

7Koh

m

V5A

2006DNG 1

V61Fu0013106C

mhoK7.45906R

1006DNG 1

1

FERX

mho0011606R

V3.3A

4006DNG

944QDDV

1SSV 82

142SSV

453SSV

6 1QSSV

21 2QSSV

643QSSV

4QSSV 25

61 _EW

1C_N

042C_N

81 _SAR

93MQDU

1 1DDV

41 2DDV

72 3DDV

3 1QDDV

9 2QDDV

343QDDV

51QD

5 2QD

7 3QD

4QD8

01 5QD11 6QD

31 7QD 248QD

449QD

51 MQDL

6391 SC

2 0QD

1QD4

5401QD

7411QD

8421QD

0531QD

41QD 15

35

5A

136A

237A

8A 33439A

02 0AB12 1AB

71 _SAC73EKC

83KLC

32 0A42 1A

22 01A

5311A

52 2A62 3A 924A

03

0106CI000H1LT-B236182S4K

4.7K

ohm

R60

26

8106DA 1

Fn0011106C

V61

4106PT

1106DC 1

5106PT

V05Fn01

0106C

Fn0016406C

V61

6006DC 1

6906R mhoK7.4

B1

72EO/

CCV8

1EO/1

A12

A234

DNG5

B2

6

0116R

2106CIX8K5213DBW7CN

Y-3261CSK mho001

4.7K

ohm

4006Q

Fn0010506C

V61

R60

25

4016RmhoK01

W01/1

FERX

8006DC 1

FERX

4.7K

ohm

R60

09

SC_FSN 1

2006DC 1

Fu011306C

5006DC 1

W01/10306R mho0

FERX

mhoK012706R

1

V61

2106CFn001

mho05006RW01/1

TNI_NALP

W01/12306R mho0

7306CFp51

mhoK7.4 0406R

8106PT

7106PT

mhoK18306R

mhoK7.48906R

4006DC 1

Fn0015606C

V61

1

2_V3.3B

7106DA

nSD

CA

S

702 0SCDSn802 1SCDSn

1nS

DC

S2

nSD

CS

32

nSD

RA

S8

45TSRTn

47nW

E

391LATX

5nD

CA

S0

nDC

AS

16

nOE

46

29TESERn

TUO_TESERn 86

0SCSn302

1SCSn402

2SCSn502602 3SCSn

7

88

106

VS

S3O

P_5

118

VS

S3O

P_6

131

VS

S3O

P_7

145

VS

S3O

P_8

851 9_PO3SSV

VS

S_1

28

2_SSV 47

VS

S_3

124

881 4_SSV

980LATX

371

391 9_PO3DDV

4DDV781

27V

DD

_1

372_DDV

123

VD

D_3

VS

S30

P_3

42

VS

S3O

P4

01_PO3SSV471

491 11_PO3SSVV

SS

3OP

_222

4_PO3SSV

ODT 85

19TSET

SMT 65

41V

DD

30P

_3

3V

DD

3OP

21V

DD

3OP

_2

784_PO3DDV

VD

D3O

P_5

113

135

VD

D3O

P_6

153

VD

D3O

P_7

8_PO3DDV

PC

I_nR

EQ

1

PC

I_nR

EQ

x310

8

TSRn_ICP001

PC

I_nS

ER

R14

1

PC

I_nS

TOP

138

PC

I_nT

RD

Y13

6

PACLLP 89

9S

DC

KE

SD

CLK

10

55KCT

75IDT

101

120

PC

I_ID

SE

L

PC

I_P

AR14

2

137

PC

I_nD

EV

SE

L

133

PC

I_nF

RA

ME

2011TNGn_ICP2xTNGn_ICP 301

3xTNGn_ICP 401

461 ATNIn_ICP

PC

I_nI

RD

Y13

4

PC

I_nP

ER

R14

0

105

4DA_ICP951

5DA_ICP751

PC

I_A

D615

6

PC

I_A

D715

5

152

PC

I_A

D8 15

1P

CI_

AD

9

PC

I_C

0_nB

E0

154

143

PC

I_C

1_nB

E1

PC

I_C

2_nB

E2

132

119

PC

I_C

3_nB

E3

KLC_ICP

122

PC

I_A

D23

121

PC

I_A

D24

117

116

PC

I_A

D25

PC

I_A

D26

115

114

PC

I_A

D27

PC

I_A

D28

112

111

PC

I_A

D29

061 3DA_ICP

PC

I_A

D30

110

109

PC

I_A

D31

148

PC

I_A

D13

147

PC

I_A

D14

146

PC

I_A

D15

144

PC

I_A

D16

130

PC

I_A

D17

129

PC

I_A

D18

128

127

PC

I_A

D19

2DA_ICP161

PC

I_A

D20

126

125

PC

I_A

D21

PC

I_A

D22

7FPG 68

95NIRI

590MO 691MO

139

PC

I-NLO

CK

107

PC

I-nR

EQ

x2

0DA_ICP361261 1DA_ICP

PC

I_A

D10

150

149

PC

I_A

D11

PC

I_A

D12

574EPG675EPG

6EPG77

7EPG87970FPG081FPG182FPG

3FPG2838

4FPG5FPG 48

586FPG

1DPG2DPG 26

363DPG4DPG 46

565DPG6DPG

66767DPG

960EPG1EPG 07

172EPG3EPG

27

DQ

M3

14

35NAIDNE

0LATXE 09

491LATXE

GP

B6_

nWA

IT48 49

GP

B7_

CLK

OU

TG

PC

050 51

GP

C1

GP

C2

52

0DPG0616

44 45D

ATA

31

571 4ATAD

771 5ATAD

971 6ATAD

181 7ATAD

8ATAD381

9ATAD581

11D

QM

0D

QM

112 13

DQ

M2

DA

TA20

DA

TA21

29 31D

ATA

22

33D

ATA

23

35D

ATA

24

DA

TA25

37

DA

TA26

38 39D

ATA

27D

ATA

2840 43

DA

TA29

3ATAD171

DA

TA30

11ATAD191

21ATAD591

31ATAD791

991 41ATAD

51ATAD102

15D

ATA

16

17D

ATA

17

19D

ATA

18

23D

ATA

19

2ATAD961

25

4RDDA

5RDDA871

6RDDA081

7RDDA281

8RDDA481

9RDDA681

DDVA 79

SSVA99

0ATAD561

1ATAD761

01ATAD981A

DD

R17

18

AD

DR

1820

AD

DR

1924

071 2RDDA

AD

DR

2026

AD

DR

2130

AD

DR

2232

AD

DR

2334

AD

DR

2436

271 3RDDA

671

661 0RDDA

1RDDA861

091 01RDDA

291 11RDDA

691 21RDDA

891 31RDDA

002 41RDDA

202 51RDDA

AD

DR

1616

1

6006CIX0082C3S

3 4 5 6

MG

ND

1

MG

ND

2

6106DA

1006NCL60-RW705211 2

3506R mho001

V5A

9006DA 1

6006DA 1

zHM6 H5MS/94-CH3006X

Q0

Q1

V05Fn01

1206C

3506CFn01

V05

7006DC 1

mho741006R

mho08806R

1706R mhoK01

6016R mho001

1006OIPG_UPC1

3006DA 1

Fn0012206C

V61

EWN 1

1006D2.8ZLR

4406CFu001

V61

mho02016R

SC_RBN 1

Fn0017006C

V61

V3.3A

R60

214.

7Koh

m

3016RmhoK7.4

W01/1

W01/19906R mhoK7.4

8006DA 1

2006LHu01

TP60

091

2606R mho001

FERX

1

V61

2506CFn001

TESERN_UPC

8406R mho001

1

1006CFu001

V61

6106DC

3106DC 1

1

Fn0013206C

V61

1006L

2006A

8506RmhoK01

0106DA 1

Fp335306C

2406CFu01

5206C

V61

mhoK7.44906R

Fn001

mho0

mhoK7.44006RW01/1

1

9016R

EON

mho001

V61

4206CFn001

7A9

8A

TP60

101

8706R

EO/ 1A2CCV

02

2A34

3A5

4A6

5A6A

78

8B7B

2131

6B5B

414B

5161

3B2B

7181

1B

91

7006CIXCTM542XCL47

1RID

DNG0111

R60

270o

hm

1

W01/16006R mho0

3006DNG 1

1006AQ

34

UPC_V8.1A

)mpp02,zHK867.23(S62-XMDzH867.23

2006X

Q0

1 2Q

13

Q2

)mpp001,zHM33(ECH0573K1006X

DNG2

-HNI1

TUO 3

CCV 4

4006DA 1

1006DA 1

V61

0406CFn001

CCV2

0B3 0O

1A4

1B5

1O67

DNG8

3O3B

9

10A

013A2O

11212B

2A3141

mhoK7.41016RW01/1

XM23XCL471006CI

mhoK7.4

V3.3A

2506R

mho0015606R

W01/1

8206RmhoK7.4

1

Fn0014506C

V61

4.7K

ohm

R60

11

4106DC

mhoK7.41806R

Fu013606C

Fn0013006C

V61

Fn01V05

V01

6206CFu1

7506C

9506RmhoK01

V61Fu0013406C

R60

9210

0ohm

1

mho05806R

4206DA 1

1006DC

Fn011506C

4106DA 1

V05

1

7306RmhoK7.4

1

4006CN

3206DA 1

5006CN

V5A

4.7K

ohm

R60

23R

6024

4.7K

ohm

D

G

S

2_V3.3B

L2007N22006Q

2006CFu001

V61

V61

8406CFn001

2006DA 1

Fn0015106C

V61

TSRP 1

mho05306RW01/1

5106DC 1

0506R mho0

4.7K

ohm

V3.3A

7406R mho001

R60

19

12

34

56

78

2006ARmhoK7.4

V3.3A

4106CFu74V3.6

8006CFn01

V05

1

V3.3A

R60

9010

0ohm

3006DC

1

mho0019406R

1006SCSN

8306CFn01

V05

V61

8106CFn001

3406R mho001

1

mhoK16806R

5006DA 1

0106DC

mho0015506R

NYP5011-SPK1006WS

1

2

3

4

4506R mho001

4306CFp33

4606R mho001

EO/

55EW/42A,PW/

65

681A71A7

861A

9CCV

7431QDDNG

8494

6QD

591A

41QD 057QD

1525

51QDSTS

3545

402A

043QD

1411QDDNG

2434

QCCV,CCV4QD

4421QD5464

5QD

230QD 33

438QD

531QD9QD

63CCV

7383

2QD01QD

93

524A3A

62

2A7282

1A 2EC,CN92

CN,12A3

0332A

13ETYB/0A

9A91

1EC2

028A

12DNG

7A22

6A3242 5A

41A1121

31A3121A0EC

41

PPV,NEPV51

PR/6171

11A01A

81

9006CI021-A3J046F82E

1CN,22A

51A01

2106DC 1

V61Fu017206C

0206DA 1

V61Fn0018206C

5406R

mho07006RW01/1

4406R mho001mho001

FERX

mho03306R

1

V3.3A

4.7K

ohm

R61

14

7506R mho001

2206DA

7006DA 1

TP60

04

V3.3A

3006PT

TP60

111

2006PT

mho0012406R

FERX

7DNG

83Y/3A

9

215Y/5A

3141

CCV2

0Y/31A1Y/

4

2A5

2Y/6

XM40XVL473006CI

10A

014Y/4A

11

mhoK18606R

mho0016406R

R60

104.

7Koh

m

2006DBA003S2102ZPM

9206CFu01V61

mhoK010706R

7906RmhoK7.4

Fn0011406C

4QSSV

_EW61

V61Fu0015406C

9

3QDDV 34

4QDDV 94

821SSV

2SSV 14

3SSV 45

1QSSV6

2QSSV21

3QSSV 64

25

44

MQDL51

1C_N 63

2C_N 04

_SAR81

MQDU 93

1DDV1

2DDV41

3DDV72

1QDDV3

2QDDV

41QD

51QD 35

2QD5

3QD78 4QD

5QD01

6QD11

7QD31 8QD 24

9QD

73KLC 83

SC91

0QD2

4 1QD

01QD 54

11QD 7421QD 84

31QD 0515

62 4A 925A 036A 137A 23

338A

9A 430AB02

1AB12

_SAC71

EKC

000H1LT-B236182S4K1106CI

0A32

1A42

01A22

11A 53

2A52

3A

6106CFu01

7706R

mhoK01

4.7K

ohm

R60

15

6

789

1DNGM

2DNGM

3DNGM

4DNGM

KS

A-2

441

SW

6002

1

01

2345

V3.3A

3306CFp065

1/10

WR

6115

4.7K

ohm

1106DA 1

4006L

4.7K

ohm

R60

20

V61

9306CFn001

mho06116R

6006PT

W01/16306R mho0

7006PT

mho22

2606CFn001

mho0016506R

9606R

R60

734.

7Koh

m

DNG

F7207AIK

NI1

DNG

2

TUO3

0016RmhoK7.4

2006CI

Fn001

12

34

56

78

V61

4606C

mhoK7.43006AR

V61

0206CFn001

1NI

2

DNG

3TUO

DNG

FERX

0ohm

R61

12

FERX

F7207AIK4006CI

mho0017116R

32A3A

4

4A5

5A67

6A7A

8

8A9

5B

514B3B

6171

2B1B

81EO/

91 21A

02CCV

XCTM542XCL478006CI

RID1

01DNG8B

1121

7B6B

3141

4.7K

ohm

R60

13

9406CFn01

V05

1306R mho0

V05Fn01

5506C

W01/1

R60

754.

7Koh

m

4.7K

ohm

R60

76

FERX

V3.3A

R60

124.

7Koh

m

V05Fn01

7406C

4006CFn01

V05

V61

2306CFn001

5006PT

8006PT

2006Rmho74

1206DA 11

V05Fn01

6006C

NEPVN 1

1006CN

1

9206R

9106DA

A003S2102ZPM1006DB

mhoK7.4

4.7K

ohm

R60

18

1

Fn0017106C

V61

V3.3A

3106DA

FERX

4.7K

ohm

R60

74

1406R mho001

6606R mho22

mhoK7.47016R

0606R mho001

R60

164.

7Koh

m

mho227606R

V61

0606CFn001

5106DA 1

W01/1

Fp516306C

V5A

V3.3A

mho09306R

100o

hmR

6093

mho0015016R

9106CFn01

V05

7806R mho0

2_V3.3B

3006QG-3261CSK

R60

91

R61

110o

hm

mhoK7.40806R

100o

hm

1006AR

12

34

56

78

3006L

mhoK7.4

NEPVn

NE_UT

NEPVn

V61

5006CFn001

HCVTD_6ADSHCVTD_6LCS

MOCIMS_3ADSMOCIMS_3LCS

0103CI_WS 652C42_2LCS652C42_2ADS

652C42_PW

)51(DA)61(DA)71(DA

)81(DA)91(DA)02(DA)12(DA)22(DA)32(DA

)42(DA

TNI_PVS

SUBPVS_WS

TSR_4002TXNn

TNI_EVALS

RI

)0(DC)1(DC)2(DC)3(DC)4(DC)5(DC)6(DC)7(DC)8(DC)9(DC

)01(DC)11(DC)21(DC)31(DC)41(DC)51(DC

)1(DA)2(DA)3(DA)4(DA)5(DA)6(DA)7(DA)8(DA

)9(DA)01(DA)11(DA)21(DA)31(DA)41(DA

HCVTD_1LCS

TNI_XAMICn

TENYNA_DXTTENYNA_DXR

OFNI_REWOPFFO_LATX_SPLA

GUBED_DXTGUBED_DXR

SC_XAMICn

V5_VT_5LCS

V5_VT_5ADS

OTESERnNEPVn

TSRpTNI_NALp

EWnEOn

2SCSnSC_RBnSC_FSn

OTESERn

V3.3_VT_4LCSV3.3_VT_4ADS

ATAD_UTKLC_UT


TNI_NALp

HCVTD_1ADS

)7(DA

)0(DA_PVS

)1(DA_PVS

)2(DA_PVS

)3(DA_PVS

)4(DA_PVS

)5(DA_PVS

)6(DA_PVS

)7(DA_PVS

SUBPVS_WS

)7:0(DA_PVS

SC_PVSnSC_PVSp

PVS_DRn

PVS_RWn

OTSRn

)7:0(DC)0(DC

)1(DC

)2(DC

)3(DC

)4(DC

)5(DC

)6(DC

)7(DC

)7:0(DC_PVS)0(DC_PVS

)1(DC_PVS

)2(DC_PVS

)3(DC_PVS

)4(DC_PVS

)5(DC_PVS

)6(DC_PVS

)7(DC_PVS

SUBPVS_WS

)7:0(DA)0(DA

)1(DA

)2(DA

)3(DA

)4(DA

)5(DA

)6(DA

)62(DC)52(DC

)42(DC

)3:0(MQD)13:0(DC

)42:0(DA

0SCSn 1SCSn

SC_FMn

SC_FSnSC_RBn

3SCSn)42(DA

PVS_DRn

EOnEWn

SC_PVSn

)7(DA)8(DA)9(DA)01(DA)11(DA)31(DA

)8(DC

)9(DC)01(DC

)11(DC)21(DC

)31(DC)41(DC

)51(DC

)32(DA

SC_FMnNEPVnOTESERn

)61(DC

)71(DC)81(DC

)91(DC)02(DC

)12(DC)22(DC

)32(DC

)13(DC

)03(DC)92(DC

)82(DC)72(DC

)7(DA)8(DA)9(DA)01(DA)11(DA)31(DA

)2(DA)3(DA

)21(DA

)4(DA)5(DA

)32(DA)42(DA

SACDSnEKCDSKLCDS

0SCDSn

)0(DC

)1(DC)2(DC

)3(DC)4(DC

)5(DC)6(DC

)7(DC

)0(MQD

SARDSn

)1(MQDEWn

)6(DA

)6(DC

)91(DA

)41(DC)7(DC)51(DC

EOnEWn

)81(DA)71(DA)61(DA

)2(DA)3(DA

)21(DA

)4(DA)5(DA

)32(DA)42(DA

SACDSnEKCDSKLCDS

0SCDSn

)2(MQD

SARDSn

)3(MQDEWn

)42:0(DA

)22(DA

)13:0(DC

)6(DA

)51(DA)41(DA)31(DA)21(DA

)11(DA)01(DA

)9(DA)8(DA

)7(DA)6(DA)5(DA)4(DA)3(DA)2(DA)1(DA

)12(DA

)0(DC)8(DC)1(DC)9(DC

)2(DC)01(DC

)02(DA

)3(DC)11(DC

)4(DC)21(DC)5(DC)31(DC

)13:0(DA_P

UPC_KLCPMAS_KLCP

)0(DA

TIAW_XAMICn

652C42_PW

)0(DC

TSRp

SACDSn

0SCDSn

SARDSn

TESERn_UPC

EWn

)42:0(DA

AD

(16)

AD

(17)

AD

(18)

AD

(19)

AD

(20)

AD

(21)

AD

(22)

AD

(23)

AD

(24)

)3:0(MQD

POTSN_P YDRTN_P

EKCDSKLCDS

652C42_2ADS652C42_2LCS

EOn

TESERn_UPC

0SCSn1SCSn2SCSn3SCSn

P_A

D(9

)

)0(EBN_P)1(EBN_P

)2(EBN_P

)3(EBN_P

UPC_KLCP

RAPN_P

VEDN_P

EMARFN_P

1TNGN_PATNIN_P

YDRIN_PRREPN_P

1QERN_P

OTSRn

RRESN_P

P_A

D(2

2)P

_AD

(23)

P_A

D(2

4)P

_AD

(25)

P_A

D(2

6)P

_AD

(27)

P_A

D(2

8)P

_AD

(29)

)3(DA_P

P_A

D(3

0)P

_AD

(31)

)4(DA_P

)5(DA_P

P_A

D(6

)P

_AD

(7)

P_A

D(8

)

KCOLN_P

)0(DA_P)1(DA_P

P_A

D(1

0)P

_AD

(11)

P_A

D(1

2)P

_AD

(13)

P_A

D(1

4)

P_A

D(1

5)

P_A

D(1

6)P

_AD

(17)

P_A

D(1

8)P

_AD

(19)

)2(DA_P

P_A

D(2

0)P

_AD

(21)

DQ

M(1

)D

QM

(2)

DQ

M(3

) CD

(24)

CD

(25)

CD

(26)

CD

(27)

CD

(28)

CD

(29)

)3(DC

CD

(30)

CD

(31)

)4(DC

)5(DC

)6(DC

)7(DC

)8(DC

)9(DC

DQ

M(0

)

)1(DC

)01(DC

)11(DC

)21(DC

)31(DC

)41(DC

)51(DC

CD

(16)

CD

(17)

CD

(18)

CD

(19)

)2(DC

CD

(20)

CD

(21)

CD

(22)

CD

(23)

)1(DA

)01(DA

)11(DA

)21(DA

)31(DA

)41(DA

)51(DA

)2(DA

)3(DA

)4(DA

)5(DA

)6(DA

)7(DA

)8(DA

)9(DA


A85400-95NB : ROK

RETTILPS_FR

tuptuO golanA/ltaigiD +ELGAE

.NEG KCOLC YALPSID & GEPM A0102H5S

NOITPO ETELED

RENUT MIN ROF

WEN

NOITPO ASU

DOP ROF

ECAFRETNI YROMEM +ELGAE

NOITPO AEROK

NOITPO

A95400-95NB : ASUV05

Fn01

5507C

2107C

Fn01

V05

41QD38

QSSV48

51QD58

SSV68

QDDV9

9QD67

01QD77

QSSV87

11QD97

4QD8

21QD08

QDDV18

31QD28

CN96

3QD7

CN07

1MQD17

SSV27

CN37

8QD47

QDDV57

4A16

5A26

6A36

7A46

8A56

9A66

EKC76

KLC86

03QD45

QDDV55

13QD65

CN75

SSV85

3MQD95

QSSV6

3A06

52QD74

62QD84

QDDV94

2QD5

72QD05

82QD15

QSSV25

92QD35

1QD4

22QD04

QDDV14

32QD24

DDV34

SSV44

42QD54

QSSV64

QSSV23

71QD33

81QD43

QDDV53

91QD63

02QD73

QSSV83

12QD93

0A52

1A62

2A72

2MQD82

DDV92

QDDV3

CN03

61QD13

SAC/81

SAR/91

0QD2

SC/02

CN12

0AB22

1AB32

PA,01A42

5QD01

6QD11

QSSV21

7QD31

CN41

DDV51

0MQD61

EW/71

68

QDDV9

5007CI

06CT-E232346S4K

DDV1

974QD

821QD

08QDDV

1831QD

2841QD

38QSSV

4851QD

58SSV

17SSV

27CN

378QD

47QDDV

579QD

6701QD

77QSSV

8711QD

468A

569A

66EKC

76KLC

86CN

96

3QD7

CN07

1MQD

75SSV

853MQD

95

QSSV6

3A06

4A16

5A26

6A36

7A

5

72QD05

82QD15

QSSV25

92QD35

03QD45

QDDV55

13QD65

CN

24

DDV34

SSV44

42QD54

QSSV64

52QD74

62QD84

QDDV94

2QD

53

91QD63

02QD73

QSSV83

12QD93

1QD4

22QD04

QDDV14

32QD

82

DDV92

QDDV3

CN03

61QD13

QSSV23

71QD33

81QD43

QDDV

02

CN12

0AB22

1AB32

PA,01A42

0A52

1A62

2A72

2MQD

31

CN41

DDV51

0MQD61

EW/71

SAC/81

SAR/91

0QD2

SC/

06CT-E232346S4K

4007CI

DDV1

5QD01

6QD11

QSSV21

7QD

1 2

3 4

5 6

7 8

4007AR

mhoK7.4

W01/1

1207R mhoK1

mhoK19107R

W01/1

1007R

mhoK01

1 2

V9_S

4007L Hu1

V05

Fn01

3607C

mho22

FERX

2_V3.3B

5107R

4107R

mhoK7.4

Fn01

V05

7107C

V61

4307C

Fn001

V61

Fu001

2307C

2407C

Fn01

V05

2707C

Fn01

V05

7 8

V05

8107C

Fn01

4107AR

mho74

W61/1

1 2

3 4

5 6

V61

4507C

Fn001

FERX

8107R mho22

V05

6107C

Fn01

Fu1

0207C

4

5 6

7 8

1007C

Fu001

V61

mhoK1

2007AR

1 2

3

2_V3.3B

7107R mho22

9507C

Fn01

V05

mho226107R

Fn001

7007C

V61

MG

ND

3M

GN

D3

MG

ND

4M

GN

D4

V05

Fn01

6007C

1

B+

B+

2

LN

ALN

A

3

S/W

1S

/W1

GN

DG

ND

4

S/W

2S

/W2

5

MG

ND

1M

GN

D1

MG

ND

2M

GN

D2

140-TN-XMU

1007NC

1 2

3 4

5 6

7 8

1107C

V61

W61/1

mho74

5107AR

mho743007R

Fn001

2007R mho74

mho74

3307R mho0

8207R

V05

9107C

mho74

FERX

Fn01

3507C

Fn01

V05

9207R

Fn033

7307C

52L

NISSa

62L

FERVSa

52M

PMOCSa

62M

SBVCa22N

Ya

32N

Ca

42N

FERVHa

52J

PMOCHa

62J

BPBa

22K

YGa

32K

42K

RPRa

TESRIHa

52K

NISHa62K

TESRISa

3E

TUOD_VA

72KLC_VA

4E

NE_NACS6E

CCVDMC_CS

3F

ODLV_VA

4F

NID_VA

5F

NITSR_CS

4G

1LES_F_CS

5G

TSRn_VA

3D

NE_TSET

5D

XR

6D

SMTJ

7D

3LLPa

21E

2LLPa

31E

1LLPa

41E

CUOI_CS

2E

0ROH

02C

531TF

4C

5C

XT

TSRTJn

6C

IDTJ7C

8CLC_ATADA

FFO_CS

1D

KLC_CS2D

21C

CNYSVOH

31C

5BOH

41C

1BOH

51C

4GOH61C

1GOH

71C

7ROH

81C

3ROH

91C

IDLV_VA

2C

42TF

3B

KLCC2I

4B

KCTJ

5B

6B

CSTN_ATADA RS_ATADA

7B

0LES_F_CS1C

FIDPSO

11C

TESERn

6BOH

41B

2BOH

51B

61B

7GOH

5GOH

71B

2GOH

81B

0GOH

91B

4ROH

02B

1ROH

12B

ATADC2I

3A

ODTJ

4A

TM_ATADA5A

KLCRLO

9A

ATADAO

01B

KLCDO

11B

M72KLC

21B

CNYSHOH

31B

4BOH

51A

3BOH

61A

0BOH

71A

6GOH

81A

3GOH

91A

6ROH02A

5ROH

12A

2ROH

22A

A0102H5S

3-0107CI

KLCBO

01A

MWP

11A

KLCDIVH

21A

KLCDHO

31A

7BOH41A

mho0

5207R

mhoK01

9307R

Fn001

2507C

V61

1607C

V61

Fn001

B

C

E

4207R

1007Q

G-3261CSK

PODDV

12W

22W

IDDV

POSSV

32W

6W

PODDV

PODDV

12Y

6Y

PODDV

mhoK1

POSSV

4U

5U

IDDV

6U

PODDV

PODDV

12V

22V

ISSV

32V

PODDV

ISSV

5V

6V

PODDV

POSSV

61T

22T

ISSV

32TPODDV

4T

PODDV

5T

ISSV

12U

PODDV

22U

IDDV

32U

POSSV

32R

POSSV

POSSV

4R

5R

IDDV

11T

POSSV

POSSV

21T

31T

POSSV

POSSV

41T

51TPOSSV

5P

ISSV

11R

POSSV

POSSV

21R

31R

POSSV

POSSV

41R

51R

POSSV

POSSV

61R

22R

PODDV

POSSV

41P

51P

POSSV

POSSV

61P

1DS_3DDVA

22P

32P

2DS_3DDVA

DS_SSVA

42P

52P1DS_SSVA

4P

PODDV

POSSV61N

52N

3DS_SSVA

2DS_SSVA

62N

4N

POSSV

5N

IDDV

11P

POSSV

POSSV

21P

31P

POSSV

3DS_3DDVA

42M

4M

PODDV

5M

ISSV

11N

POSSV

POSSV

21N

31N

POSSV

POSSV

41N

51N

POSSV

11M

POSSV

POSSV

21M

31M

POSSV

POSSV

41M

51M

POSSV

POSSV

61M

5DS_3DDVA

22M

32M

4DS_3DDVA

POSSV

41L

51L

POSSV POSSV

61L

22L

5DH_3DDVA

4DH_3DDVA

32L3DH_3DDVA

42L

POSSV

4L

5L

IDDV

6J

PODDV

12K

PODDV

4K

PODDV

5K

ISSV

6K

PODDV

11L

POSSV

POSSV

21L

31L

POSSV

3DH_SSVA

62H

6H

PODDV

12J

PODDV

22J

1DH_3DDVA

32J

2DH_3DDVA

42J

DH_BBVA

4J

POSSV

5J

IDDV

9F

PODDV

12G

PODDV

22G

PODDV

6G

PODDV

PODDV

12H

POSSV

22H

1DH_SSVA

42H

52H

2DH_SSVA

81F

PODDV

91FPODDV

02F

PODDV

12F

PODDV

22F

POSSV

6F

PODDV

7F

PODDV8F

PODDV

12E

IDDV

22E

PODDV

5E

PODDV

7E

ISSV

8E

IDDV

9E

ISSV

01F

PODDV

71F

PODDV

01E

IDDV

11E

LLP_BBVP

51E

LLP_IDDVP

61EISSV

71EIDDV

81E

ISSV

91E

IDDV

02E

ISSV

81D

PODDV

91D

POSSV

02D

PODDV

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SH_DH

Samsung Electronics

Schematic Diagram

10-7

10-7 EAGLE+This Document can not be used without Samsung’s authorization. Power

Signal

37361HTVL47NS

NOITPO ETELED

gnitteS tuptuO V8

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Z-IH 0 0

V3.3 1 0

==================

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10-8

Schematic Diagram

Samsung Electronics

10-8 POD * This page is not reguired for PODless model.


PowerSignal

NOITPO ETELEDNOITPO ETELED

8Cx0

NOITPO ETELED

NOITPO ETELED

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C.N

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IE_R

OU

T(4

)D

NIE

_R

OU

T(4

)

-2TUOXT_EIND

+1TUOXT_EIND

-1TUOXT_EIND

+0TUOXT_EIND

-0TUOXT_EIND

TUOKLC_EIND

TUOED_EIND

TUOSH_EIND

TUOSV_EIND

)0(TUOB_EIND

)1(TUOB_EIND

)2(TUOB_EIND

)3(TUOB_EIND

DN

IE_B

OU

T(4

)D

NIE

_B

OU

T(4

)

DN

IE_B

OU

T(5

)D

NIE

_B

OU

T(5

)

DN

IE_B

OU

T(6

)D

NIE

_B

OU

T(6

)

DN

IE_B

OU

T(7

)D

NIE

_B

OU

T(7

)

DN

IE_B

OU

T(8

)D

NIE

_B

OU

T(8

)

DN

IE_B

OU

T(9

)D

NIE

_B

OU

T(9

)

DN

IE_B

OU

T(1

0)

DN

IE_B

OU

T(1

0)

DN

IE_B

OU

T(1

1)

DN

IE_B

OU

T(1

1)

DN

IE_R

IN(9

)D

NIE

_R

IN(9

)

DN

IE_R

IN(8

)D

NIE

_R

IN(8

)

DN

IE_R

IN(7

)D

NIE

_R

IN(7

)

DN

IE_R

IN(6

)D

NIE

_R

IN(6

)

DN

IE_R

IN(5

)D

NIE

_R

IN(5

)

+0NIXR_EIND

-0NIXR_EIND

Samsung Electronics

Schematic Diagram

10-9

10-9 DNIe Lite & LVDSThis Document can not be used without Samsung’s authorization. Power

Signal

Samsung Electronics

Schematic Diagram

10-10

10-10 Function A'ssy BoardThis Document can not be used without Samsung’s authorization.

Schematic Diagram


REWOP

TS_V5

TS_V5

TS_V5

300R

002 8061

10DZ

2V6C48XZB

1

2

3

20C

Fu1.0 8061

400R

002 8061

600R

K1

32

5.5

1

42

5.5

1

52

8.1

1

62

8.1

1

TG

NIP T/G

1

10C

V61/Fu74

200DEL

KBT353-LTL

300DEL

KBT353-LTL

200DC

HTG03C3SDC

900R

74 806110MR

A01FH643

1

2

3300DC

HTG03C3SDC

100C

Fn001

100DEL

KBT353-LTL

CD

02

CD

S3C

30G

TH

ZD

5B

ZX

84C

6V

2

1

2

3

10R

K01 8061

ZD

001

BZ

X84C

5V

1

1

2

3

ZD

002

BZ

X84C

5V

1

1

2

3

ZD

003

BZ

X84C

5V

1

1

2

3

001 8061700R

001 8061800R

C002

1608 1

00nF

C003

1608 1

00nF

C004

1608 5

pF

C005

1608 5

pF

C006

1608 5

pF

100WS

MEBE4611-PTJ

100PO

0552LST

3

1

2

4

KLCBMS

DDV

DNG

ATADBMS400DEL

KBT353-LTL

500R

002 8061

ZD

004

BZ

X84C

5V

1

1

2

3

100L

Hu01 5223

100Q

4093TSS

700C

V61/Fu22 100DC

HTG03C3SDC

100NC

L80-RW70521

1

2

3

4

5

6

7

8

910

CD

01

CD

S3C

30G

TH

200R

002 8061

RI

TS_V5

TUO REWOP

TUO REWOP

DEL

DEL

ADS

LCS

ADS

LCS

RI

10-11 Power & IR A'ssy BoardThis Document can not be used without Samsung’s authorization.

PowerSignal

Operation Instruction & Installation


11. Operation Instruction & Installation11-1 Product Features and Functions11-1-1 Front Panel

1 SOURCE button

Press to display all of the available video

sources (TV, AV, S-Video, Component1,

Component2, PC, and HDMI).

2 MENU button

Displays the main on-screen menu.

3 VOL +, - buttons

Press to increase or decrease the volume.

Also used to select or adjust items on the

on-screen menu.

4 CH( , ) buttons

Press CH or CH to change channels.

Also used to move up or down in the on-screen

menu.

5 (Enter) button

Press to confirm a selection.

6 Power button

Press to turn the TV on and off.

Power indicator

- Power Off : Blue

- Power On : Off

7 Remote Control Sensor

Aim the remote control towards this spot on

the TV.

8 Speakers

1

2

3

4

5

8 7 6



11-1-2 Rear Panel

1 POWER IN

Connect the supplied power cord.

2 SERVICE ONLY

Connector for service only.

3 HDMI/DVI IN

Connect to the HDMI jack of a device with

HDMI output. These inputs can also be used

as a DVI connection with separate analog

audio inputs. An optional HDMI/DVI cable

will be necessary to make this connection.

When using the optional HDMI/DVI adapter,

the DVI analog audio inputs on your TV allow

you to receive left and right audio from your

DVI device. (Not compatible with PC)

4 DVI AUDIO IN (L-AUDIO-R)

Connect to the DVI audio output jack of an

external device.

5 PC IN

Connect to the video output jack on your PC.

6 PC AUDIO IN

Connect to the audio output jack on your PC.

7 OPTICAL DIGITAL AUDIO OUT

Connect to a Digital Audio component.

8 COAXIAL DIGITAL AUDIO OUT

Connect to a Digital Audio component.

9 Anynet

Please refer to the Anynet Owner’s

Instruction. This jack is for connecting to

other Samsung Anynet-enabled devices.

10 COMPONENT IN 1, 2

Video (Y/PB/P R) and audio (L-AUDIO-R)

component inputs.

11 CableCARDTM

Insert the CableCARD into the slot.

12 ANT (75Ω )

75Ω Coaxial connector for Antenna/Cable

Network.

13 AV IN(L-AUDIO-R)

Audio inputs for external devices, such as

a camcorder or VCR.

14 VIDEO

Video input for external devices, such as

a camcorder or VCR.

15 S-VIDEO

Video input for external devices with an

S-Video output, such as a camcorder or VCR.

16 AUDIO OUT

Audio outputs for external devices.

Note• Please be sure to match the color coded input terminals and cable jacks.



11-1-3 Remote Control

1 POWER button

Turns the TV on and off.

2 GUIDE button

Press to display the on-screen Electronic Program Guide (EPG).

3 ANTENNA button

Press to select “Air” or “Cable”.

4 Number buttons

5 - button

Press to select additional channels (digital and analog)

being broadcast by the same station. For example, to select channel

“54-3”, press “54”, then press “-” and “3”.

6 MUTE button

Press to mute the TV sound.

7 VOL (Volume) buttons

Use it to adjust volume.

8 Anynet button

Runs the Anynet view functions and sets up Anynet devices.

9 MENU button

Displays the main on-screen menu.

10 ENTER button

Confirms a selection.

11 FAV.CH button

Press to switch to your favorite channels.

12 CH LIST button

Displays the channel list.

13 MODE button

Selects a target device to be controlled by the Samsung remote control

(i.e., TV, STB, VCR, CABLE, or DVD).

14 PRE-CH button

Tunes to the previous channel.

15 SOURCE button

Press to display all of the available video sources (TV, AV, S-Video,

Component1, Component2, PC, and HDMI).

16 CH (Channel) buttons

Use it to switch channels.

17 INFO button

Press to display information on the TV screen.

18 EXIT button

Press to exit the menu.

19 Up/Down/Left/Right buttons

Control the cursor in the menu.



20 P.MODE buttonAdjust the TV picture by selecting one of the preset factory settings (or

select your personal, customized picture settings).

21 S.MODE buttonSelect Sound effect.

22 E.SAVING buttonPress to adjust screen brightness according to surrounding environment.

(Refer to page 111)

23 P.SIZE buttonSelect Picture size.

24 DNIe buttonActivates DNIe (Digital Natural Image engine).

25 MTS buttonPress to choose stereo, mono or Separate Audio Program

(SAP broadcast).

26 SET buttonUsed during set up of this Samsung remote control, so that it will work

compatibly with other devices (VCR, Cable Box and DVD).

27 PIP buttonActivates picture in picture.

28 PIP control buttonsCH , : Displays the available channels in sequence.

(These buttons change channels in the PIP window only.)

29 CAPTION buttonControls the caption decoder.

30 VCR, DVD control buttonsControls VCR tape or DVD disc functions: Stop, Rewind, Play/Pause,

and Fast Forward.

31 RESET button If your remote control is not functioning properly, take out the batteries

and press the reset button for about 2~3 seconds.

Re-insert the batteries and try using the remote control again.



11-2 New Features11-2-1 Energy Saving Mode (Applies to the "Setup" of the User Menu)

- Location of the Ambient Light Sensor

The sensor is attached to the Power Assy., which is on the front of the PDP. The location of the sensor on the Power Assy isdisplayed in the figure below. External light reaches the sensor through the guide of the Power Assy.

The screen brightness is adjusted according to the brightness measured by the Ambient Light Sensor, using the Multi APCfunction (controls the number of sustain pulses according to the average signal levels) of the PDP panel, thus reducing power consumption.

- Procedures for entering the menu: Select Menu → Setup → Energy Saving Mode

When pressing the "Energy Saving Mode" button on the remote control:The Energy saving mode changes in the sequence of "Standard" → "Auto Saving" → "Super Saving".

- Description of each power saving modeStandard: The screen brightness and the power consumption are not changed regardless of the ambient brightness measured

by the Ambient Light Sensor.Auto Saving: The screen brightness and the power consumption are changed depending on the ambient brightness.

If the ambient brightness is low, it automatically turns the TV brightness down and reduces the power consumption.Super Saving: This mode controls the screen brightness so that the power consumption is always reduced regardless of the

ambient brightness.

.



11-2-2 PIP Settings (A : Analog, D : Digital, X : PIP doesn't operate, : PIP and swap operate)

Note : This TV has only one tuner and does not allow you to watch one TV channel in the main screen and another channel in the PIP screen.

Main screenPIP screen

TVAV(A) S-Video(A) Component(A) PC HDMI(D)

Analog Digital (ATSC)

TVAnalog

XX X X

Digital (ATSC) X XAV(A) X X X X

S-Video(A) X X X X

Component(A) X X X X

PC X X X X X X XHDMI(D) X X X



11-3 Installation Notes and Precautions

11-3-1 Installation Notes

1. Contact a technician for installing the wall bracket.

2. Samsung Electronics is not responsible for any damage to the product or injury to yourself or others if you elect to perform the wall installation.

3. This product is for installing on cement walls. The product may not stay in place when installed on plaster or wood.

11-3-2 Parts (Wall attachment panel is sold separately)Only use the components and accessories shipped with the panel.

Plastic Hanger : 4 Screw : 11

Screw : 4 Anchor : 111 Left : 1 Right : 1

Wall Bracket Hinge Accessories



11-3-3 How to assemble the Wall Mount Bracket

1 Insert and tighten the Captive Screw in the direction of the arrow.When done, mount the wall bracket on the wall.

2 Before drilling into the wall, check if thelength between the two locking holes at the back of the product is correct.If the length is too short or long, loosen all or some of the 4 screws on the wall bracket to adjust the length.

Hinge (Left)

Length between thetwo locking holes

Captive Screws

Hinge (Right)

3 Check the installation diagram and markthe drill points on the wall. Use the 5.0 mm bit to drill holes deeperthan 35 mm. Fix each anchor in the corresponding hole.Match each of the brackets and hinge holes to the corresponding anchor holesand insert and tighten the 11 screws .

There are two hinges(left and right). Use thecorrect one.

Wall Bracket



11-3-4 Fixing the TV panel to the wall attachment panel bracket

1 Remove the 4 screws on the back of the product.

2 Insert the screw into the plastic hanger. (See the figure below)

3 Tighten the 4 screws in step 2 (plastichanger + screw ) to the rear holes of the product.

4 Remove safety pin ( ) and insert the 4product holders into the corresponding bracket holes ( ). Then place the product ( ) so that it is firmly fixed to the bracket. Make sure to reinsert and tighten the safety pin ( ) to securely hold the product to the bracket.

PDP

Wall Bracket Wall

• Mount the product on the wall bracket and make sure it is properly fixed to the left and right plastic hangers.

• Be careful when installing the product on the bracket as fingers can be caught in the holes.• Make sure the wall bracket is securely fixed to the wall, or the product may not stay in

place after installation.



11-3-5 How to Adjust Mounting Angle

Notes• Contact an authorized technician when installing the wall attachment panel.• After hanging the TV panel on the wall attachment panel, make sure that the Insulation holders are

completely secured. • Be careful not to get your fingers caught during installation.• Make sure the wall attachment panel brackets are tightened. Otherwise, the TV panel may

fall down.• Please secure the mounting bracket on the wall surface after setting its angle at 0°.

NoteNote : Adjust the bracket angle to -2 o before installing it on the wall.

How to Adjust Mounting Angle

Make sure to use the top center, and not theleft or the right side of the product to adjustthe angle.

1 Fix the product to the wall bracket.

2 Hold the product at the top in the center and pull it forward (direction of the arrow) to adjust the angle. (See the figure to the right)

3 You can adjust the bracket angle between -2°and 15°.

Change Angle



11-3-6 How to assemble the Stand-Base

Two or more people should carry the TV. Never lay the TV on the floor because of possible damage to the screen. Always store the TV upright.

1 Using the 4 screws for securing the stand pegs and the monitor, firmly attach the monitorto the stand pegs. (The exterior of the set may be different than the picture.)

WarningFirmly secure the stand tothe TV before moving it, asthe stand may fall and could cause serious injury.


MEMO

Part Name Description Description PhotoCover

Speaker① Remove 6 screws on the SPEAKER-COVER

: BH,+,B,M4,L12,ZPC(BLK)

② Remove the SPEAKER-COVER.

Disassembly & Reassembly


12. Disassembly & Reassembly12-1 Overall Disassembly & Reassembly

12-1-1 Separation of StandPart Name Description Description Photo

Stand ① Remove 4 screws.: PH,+,WSP,S,M4,L35,ZPC(BLK)

② Pull the stand down to remove it from the unit.

: Please lay the PDP unit face down on a soft surface whenremoving the stand.

12-1-2 Separation of ASSY COVER-STAND CABLE

Notice- Be sure to separate the power cord before disassembling the unit.- Discharge the capacitors first when separating PCB's with high capacity capacitors such as SMPS, X Drive Board, Y Drive

Board, etc. (A spark may be generated by the electric charge, and there is danger of electronic shock.)- Check that the cables are properly connected referring to the circuit diagram when disassembling or assembling the unit taking

care not to damage the cables.- Take care not to cause a flaw in the Glass Filter in the front.- Assemble the boards in the reverse order of the disassembly.- The plasma must be layed down on a flat padded surface for disassembly and reassembly.



12-1-3 Separation of ASSY COVER P-REAR TOPPart Name Description Description Photo

RearTop

① Remove the 9 screws on the cover rear.: BH,+,-,S,M4,L8,ZPC(BLK)

② Remove the 2 Hex nuts for the PC input.: M3,L6,NI PLT,SUM24L,#4-40

③ Remove the cover rear.

12-1-4 Separation of ASSY COVER P-REAR Part Name Description Description Photo

Rear ① Remove 24 screws.: BH,+,-,S,M4,L8,ZPC(BLK)

② Remove 4 screws.: M8,L16,ZPC(BLK)

③ Remove the Back Cover.

12-1-5 Separation of ASSY FANPart Name Description Description Photo

FAN ① Remove 3 screws.: PH,+,WWP,M3,L8,NI PLT

② Remove the Fan Assy.

Part Name Description Description PhotoSpeaker ① Remove 1 screw.

: BH,+,-,S,M4,L8,ZPC(BLK)

② Remove the Speaker Assy.

12-1-8 Separation of ASSY SPEAKER



12-1-6 Separation of ASSY PCB MISC-MAINPart Name Description Description Photo

MainBoard

① Remove 5 screws: PH,+,WWP,M3,L8,NI PLT

② Remove all connectors from the board.

③ Remove the Main Board.

12-1-7 Separation of ASSY COVER P-REAR SUBPart Name Description Description PhotoRear Sub ① Remove 3 screws.

: BH,+,-,S,M4,L8,ZPC(BLK)

② Remove 3 screws.: BH,+,B,M4,L8,ZPC(BLK)

③ Remove the sub cover.



12-1-10 Separation of ASSY LOGIC BOARDPart Name Description Description PhotoFlat Cable ① Take care when separating the Logic Board not to damage

the Flat-Cable Connector Cover.

Logic Board ① Remove 4 screws.: PH,+,WWP,M3,L8,NI PLT

② Remove the Logic Board.

Part Name Description Description PhotoSMPS

+SMPS-POD

SMPS DC-DC

① Remove 12 screws.: PH,+,WWP,M3,L8,NI PLT

② Detach all connectors from the ASSY SMPS and the ASSYSMPS POD PCBs then remove the boards.

③ Remove 4 screws.: PH,+,WWP,M3,L8,NI PLT

④ Detach all connectors from the ASSY SMPS DC DC PCB then remove the board.

: Wear gloves when handling the power board as there maybe some remaining electrical charge in the capacitor.Specifically, avoid touching any part of the capacitor.

12-1-9 Separation of ASSY SMPS, ASSY SMPS POD and ASSY SMPS DC-DC



12-1-11 Separation of ASSY X DRIVE BOARDPart Name Description Description Photo

X-DriveBoard

① To separate the Flat Cable of the X-Board, press the upper and the lower sides of the connector.

① While pressing the connector, apply slight force toward the direction of the cable to release the connector.

① Remove the Flat cable.


② Detach all reamining connectors from the X-Drive Board.

③ Remove the X-Drive Board.



12-1-12 Separation of ASSY Y DRIVE BOARDPart Name Description Description PhotoFlat Cable ① Detech the 6 Scan Board connectors from the Panel Assy by

pulling the holder from both the top and bottom ends.

Y-Scan ① Remove 5 screws.: PH,+,WWP,M3,L8,NI PLT

Connectors ① Separate the Scan Boards from the Y-Main Board bydetaching the 2 connectors and remove the Scan Boards.

Y Drive ① Remove 8 screws.: PH,+,WWP,M3,L8,NI PLT

② Detach all connectors from the Y-Main Board and remove the Y-Main Board.



12-1-13 Separation of ASSY BUFFER BOARDPart Name Description Description Photo

WallBracket

① Remove 8 screws.: BH,+,-,S,M4,L8,ZPC(BLK)

② Separate PDP module from Front cover.

: Please lay the PDP panel face down on a soft surface whenseparating front cover.

③ Remove 16 screws.: BH,+,S,M4,L10,ZPC(BLK)

TCP Cover ① Remove 8 screws.: PH,+,WWP,M3,L8,NI PLT

② Remove TCP covers.

Buffer (TOP)


② Remove the E-Board, F-Board and G-Board.

Buffer(BOT)


② Remove the E-Board, F-Board and G-Board.


MEMO

Circuit Description


13. Circuit Description13-1 Power ON/OFF Signal Timing Sequence

NO YALPSID NO YALPSID

NO_SV NO_SV NO_SV NO_SV

NO REWOP CA NO REWOP CA

FFO FFO

FFO/NO REWOP CA

)woL evitcA( NO_SPlanretxE SP morf

)FFO/NO rellortnoc etomeR(

)stuptuo noitpO POP( ,yB-dnatS

tuptuo CFP

STUPTUO CDtV,pmaV,V21,V5.6A,V3.5D

)hgih evitcA( NO_SVlanretxE S/P morf

TUPTUO CDsV

FFO / NO YALPSID

V 5 V 5V 4.3 V 4.3

ffo-nrut pets ybdnatS rof µµ teser rossecorp-

ffo-nrut pets ybdnatS rof µµ teser rossecorp-

.ceS m 07 .ceS m 07

NO rellortnoC etomeR NO rellortnoC etomeR NO rellortnoC etomeR NO rellortnoC etomeR

STUPTUOgV

NO YALPSID NO YALPSID

STUPTUO CDaV

acV acV

scV scV

1. When connecting the AC power cord, Stand-By 5V from the Main SMPS is supplied to the Main Board (Pin 3 of CN1002 of Main Board).

2. When pressing the Power button on the remote control or on the main body, PS_ON (Pin 5 of CN1002 of Main Board) changes from High to Low.

3. If the PS_ON signal changes to Low, the Main SMPS supplies power to the Main Board and Logic Board, and Va and Vg power is supplied to the DC-DC SMPS.

4. If the VS_ON signal from the Logic Board changes from Low to High, the Main SMPS supplies VS power to the X and Y Drive Board through the DC-DC SMPS, and the screen displays a picture on it.

Circuit Description


13-2 Partial Block Description

13-2-1 Main Board

No Loc. No. Description(1) TU1002 (DNVS303EH261A) The Main Tuner.(2) CN7001 (UMX-NT-043) The RF Splitter for selecting Antenna IN 1 or Antenna IN 2.(3) IC9001,IC9003 (DTC34LM85AL) Converts the digital R, G, B signals from the main board into an LVDS signal and transmits the signal to the PDP Logic board.(4) IC9002 (SDP43) The DNIe IC for visual quality improvement.(5) IC7010 (S5H2010A01) MPEG Decoder IC(6) IC6006 (S3C2800X01) CPU IC(7) IC5003 (K4D263238E) SDRAM for STP22.(8) IC5004 (STP22) A Scaler IC that generates the output resolution appropriate to the PDP panel and generates the PIP screen.(9) IC2016 (NSP-6241A) Sound PWM IC

(10) IC2015 (TAS5122) Sound AMP IC(11) IC3002 (3F866B) Generates various control signals required for operating the circuit. The software is downloaded through PC D-SUB Jack.(12) IC3003 (P_PCFM_012) The Micom that inputs and outputs various control signals.(13) IC2012 (MSP4440K) Sound Processing IC(14) IC4005 (SIL9993) Converts the TMDS signal on the HDMI input into 8 bit digital R, G, B signals.(15) IC4003 (MST9883) A/D converts the R, G, B input signal from 15 Pin PC video to 8 bit digital R, G, B signals.(16) IC3006 (MAX232) RS-232 receiver IC(17) JA9001 LVDS Logic Connector(18) CN1002 SMPS Connector(19) CN1001 SMPS Connector(20) CN8002 SMPS-POD Connector(21) CN1004 Function key board Connector(22) 60P CONNECTOR for Debug (Option)(23) CN2001 SPEAKER CONNECTOR(24) CN1003 POWER&IR BOARD CONNECTOR(25) CN8003 POD SLOT Connector(26) CN8001 POD FAN Connector

Circuit Description


ATSC Tuner

Analog PowerCN1001

Digital PowerCN1002

POD PowerCN8002

FuncionConnectorCN1004

DebugConnectorTEST5001

SVC InHDMI DVI L/R PC In - Audio

Digital OutOptical/Coaxial

Component 2R-L-Pr-Pb-Y

Component 1R-L-Pr-Pb-Y

Anynet In

LVDS outJA9001

POD Slot

Splitter

AirCable

Power-IRCN1003

Video In

Monitor Out

S-Video

SPK.outCN2001

FAN Conn.CN8001

MAIN

OOB

OOB MAIN SUB

1. POD_SW2. 3. GND4. S_12V5. GND6. S_12V7. GND8. S_6.5V9. GND10. S_5V11. GND12. S_5V

1. FAN_D 2. THER_D 3. STD_5V 4. GND 5. PS_ON 6. D12V 7. GND 8. D3.3V 9. D3.3V10. GND11. D6V

1. GND 2. VT(B33V) 3. GND 4. GND 5. 18V_A 6. 18V_A 7. GND 8. A12V 9. GND10. +6V

1. KEY12. KEY23. GND

1 1

1. GND 2. LED_RED 3. A5V 4. GND 5. KEY2 6. SDA 7. SCL 8. IR

1. R(-) 2. R(+) 3. L(-) 4. L(+)

11

1

1

13-2-2 Connectors of Main Board

Circuit Description


13-2-3 Power Button Board

13-2-4 Function Key Board

Function Key. Located on the side of the unit.

No Loc. No. Description(1) RM01 Remote Control Sensor(2) SW001 Power Button

(3) OP001

The Illumination sensor that senses the quantity oflight. It senses the illumination and automaticallyadjusts the screen brightness according to the sur-rounding brightness when the Power Saving Modeof the User menu is set to Auto.

Circuit Description


13-2-5 Main SMPS

(1) CN800: AC IN (90 ~ 264V)

※ CN811, CN806, CN807 and CN808 are not used.

(2)CN804-1

MAIN SMPS↔

CN1002(Main B'D)Pin No Signal1 FAN-D

2 FAN-ON3 STB5V4 RTN5 PS-ON6 12V7 RTN8 RTN9 VCA

10 VCS11 RTN12 5.3V

(3)CN803(MAIN SMPS)

↔CN1001(Main B'D)

Pin No Signal1 RTN

2 VT(33V)3 RTN_AMP4 RTN_AMP5 18V_AMP6 18V_AMP7 RTN8 12V9 RTN

10 6V

(4)CN810(Main SMPS)

↔CN2013(Logic B'D)

Pin No Signal1 5.3V

2 5.3V3 RTN4 RTN5 5.3V6 RTN7 PS-ON8 N.C9 VS-ON

10 STB 5V

(5)CN809(Main SMPS)

↔CN3(DC-DC SMPS)Pin No Signal1 5.3V


10 N.C11 Vs12 Vs

Circuit Description


1. Outline (PDP 42inch/50inch SMPS)Considering various related conditions, the switching regulator with good efficiency and allowing for its small size and light weightwas used as the power supply for PDP 42inch(Schubert)/50inch(Strauss), VS requiring high power consumption Asymmetrical HalfBridge converter and flyback converter. To comply with the international harmonics standards and improve the power factor, activePFC(Power Factor Correction) was used to rectify AC input into +400V DC output, which in turns used as input to the switchingregulator.

2. InputThe power supply shall be capable of supplying full rated output power over free voltage ranges that are rated 100 VAC - 240 VACRMS nominal. Operating voltage : 90 VAC - 264 VAC The power supply must be able to start up under peak loading at 90V AC. The power supply shall automatically recover from ACpower loss. (Note that nominal voltages for test purposes are considered to be within +/- 1.0V of nominal).STD_5V & Vpr2(3.3V) is a SELV standby voltage that is always present when AC mains voltage present.

3. Output

4. Over Voltage ProtectionThe over voltage sense circuitry and reference shall reside in package that are separate and distinct from the regulator controlcircuitry and reference. No single point fault shall be able to cause a sustained over voltage condition on any or all outputs.The supply shall provide latch-mode Over Voltage Protection as defined below.

5. Short Circuit and Over current Protection An output short circuit is defined as output impedance of less than 300mohms. The power supply shall shutdown and latch off forshorting VS DC rails to return. Shorts between main output rails and STD_5V shall not cause any damages to the power supply.The power supply shall either shutdown and latch off until the short condition is removed, at which point the P/S shall recover.The power supply shall be capable of withstanding a continuous short-circuit to the output without damage or over stress to theunit (components, PCB traces,connectors,etc.) under the input conditions specified in Section 3 above. Current Protection asdefined below.

Output Name Output Voltage Output Current(Max.) Using in PDP DrivingVS +190V ~ 220V (210V) 2.0A Sustain Voltage of Drive BoardVA +60V ~ 80V (70V) 3.0A Address Voltage of Drive Board

D5.3V +5.3V 5.0AA6.5V +6.5V 3.0A

FAN_9V +9V 0.2AVG +15V 1.0A

D12V +12V 1.5AA12V +5.3V 0.5A

18VAMP +18V 2.5A Amp Voltage of Audio BoardVT +33V 0.006A

STD_5V +5V 1.0A Standby for Remote Control

Parameter Min UnitVS(210V) 250 ~ VVA(70V) 100 ~ V

VCC(+5.3V) 6.8 ~ V

Output Over Current Limit UnitVS(210V) 20A, Constant Current.(TBD) AVA(70V) 10A, Constant Current.(TBD) A

Output except Vs,Va No damage (Auto Recovery or Shut down.) A

Circuit Description


13-2-6 POD SMPS(1)

J0802(POD SMPS)↔

CN8002(MAIN B'D)Pin No Signal1 N.C

2 +33V3 GND4 +12V5 GND6 +12V7 GND8 +6.5V9 GND

10 +5V11 GND12 +5V

(2)J0802(POD SMPS)

↔CN811(MAIN SMPS)Pin No Signal

1 AC2 AC3 5.3V4 N.C5 Va

1. Block Diagram

Circuit Description


2. Description of Each Block- Input Filter Circuit

This consists of a Common Mode Reactor LF801, X-condenser C803, C804, Line by-pass condenser(Y con), C801, C802, C823, C824 and a lightning conductor, Z801.The external noise from the AC line and the feedback noise from the internal power are reduced.

- Rectification CircuitConverts (rectifies) the supplied AC current into DC.

- MAIN SWITCHING Circuit BlockTransmits the energy of the electrolytic capacitor (C805) to the secondary coil, T801 [MAIN TRANS], by turning the MOS-FETembedded in U802 (5M0565R) on or off for PWM power, and generates a DC output voltage of +5.3V, +6.5V, +12V and +30V. When the input voltage is supplied, the activation voltage is supplied to Pin 3 of U802, and U802 starts oscillating.Via the oscillation, the energy is transmitted to the secondary coil, T801.

- DC-DC Circuit BlockThe circuit that converts the energy transmitted to T801 via the oscillation of the MAIN SWITCHING U802 into DC voltage.The +6.5V and +12V voltages are controlled by the Voltage Regulator and the +30V output voltage is controlled by the Turn Ratio of T801.

Circuit Description


(6) D5.3V, Vg, Ve Test Point(7) Va, Vset, Vscan Test Point

13-2-7 DC-DC SMPS

(1)CN809(Main SMPS)

↔CN3(DC-DC SMPS)Pin No Signal1 5.3V


10 N.C11 Vs12 Vs

(4), (5)CN1, CN5

(DC-DC SMPS)↔

CN2501(E-Buffer),CN2701(G-Buffer)

Pin No Signal1 RTN

2 N.C3 5.3V4 N.C5 Va

(2)CN2(DC-DC SMPS)↔ CN5007(Y B'D)

Pin No Signal1 Vs

2 Vs3 RTN4 RTN5 Vset6 RTN7 Vscan8 RTN9 Vg

10 5.3V

(3)CN4(DC-DC SMPS)↔ CN4000(X B'D)

Pin No Signal1 Vs

2 Vs3 RTN4 RTN5 Ve6 RTN7 RTN8 Vg9 5.3V

Circuit Description


Controland

Switching Block

Controland

Switching Block

Controland

Switching Block

Transformer

Transformer

Transformer

AuxiliaryPower

AuxiliaryPower

AuxiliaryPower

RectificationBlock

RectificationBlock

RectificationBlock

FeedbackBlock

FeedbackBlock

FeedbackBlock

Vs Input Part Vscan Output

Vset Output

Ve Output

(-175~-220)

DC DC SMPS receives Vs input (195~215V) from the Main SMPS and the necessary Vscan, Vset and Ve voltages are output tooperate the PDP Module as shown in the block diagram above.

1. Block Diagram

Circuit Description


13-2-8 PDP Module

No Assy Name Description(1) ASSY PDP P-LOGIC BOARD (BN96-02031A) Logic Main Board(2) ASSY PDP P-X MAIN BOARD (BN96-02024A) X Drive Board(3) ASSY PDP P-Y MAIN BOARD (BN96-02025A) Y Drive Board(4) ASSY PDP P-ADDRESS E BUFFER BOARD (BN96-02028A) Buffer Board(5) ASSY PDP P-ADDRESS F BUFFER BOARD (BN96-02029A) Buffer Board(6) ASSY PDP P-ADDRESS G BUFFER BOARD (BN96-02030A) Buffer Board(7) ASSY PDP P-Y BUFF UPPER BOARD (BN96-02026A) Y Buffer Upper Board(8) ASSY PDP P-Y BUFF LOWER BOARD (BN96-02027A) Y Buffer Upper Board

Circuit Description


1. Logic Block

Logic Block Diagram

ASIC

nRESET

CONTROL

SIGNAL

60pin Connector 60pin Connector

10Pin(Power)31Pin LVDS

SPS-NIRB

(ASIC 816P)DDR

(FA)

DDR

(MA)

DDR

(MB)

MICOM

DRIVE

RESET

R,G,B : 16bit

CLK A, B

BLK, POL, STB

R,G,B : 16bit

CLK A, B

BLK, POL, STB

DATA : 32bit

ADDR : 12bit

DQS, CLK, nCLK

RELAY_EINT

AC-OFF-EINT

Vs-ON

LVDS

SIGNAL

SDA, SCL

TX, RX

X-MAIN

CONTROL

SIGNAL

Y-MAIN

CONTROL

SIGNAL

ADC 4bit

ADC 3bit

ADC 1bit

4p

in (

I2C

)

30MHz

60MHz

74MHz

50

pin

Co

nn

ecto

r

30

pin

Co

nn

ecto

r

Circuit Description


A name of main part of Logic Board and vocabulary.

Item Name Description

① LVDS Connector The connector to receive the RGB, H, V, DATAEN and DCLK signals that have been LVDS encoded through themain board.

② Operating Status LED (LED2001) The LED that shows whether the Sync and Clock signal is properly supplied to the logic board (NormalStatus:Blinks at 0.8 second intervals)

③ I2C Connector (Debug only) The connector for the Key Scan board that checks and controls the 512K data.④ V-TOGG TP for V Sync Check⑤ Y Connector The connector to output the control signal for the Y drive board.⑥ X Connector The connector to output the control signal for the X drive board.⑦ CN2006, CN2007, CN2008 The connector to output the address data and the control signal to the E,F and G-buffer board of BOTTOM.⑧ CN2009, CN2010, CN2011 The connector to output the address data and the control signal to the E,F and G-buffer board of TOP.

⑨ ARM-PROCESSOR 512K including the Gamma Table, APC Table, drive waveform timing and other options is saved to internalflashmemory.

⑩ Power Connector The connector to receive power (5V, 3.3V) for the Logic board.⑪ ASIC CHIP The main processor that generates and outputs the logic drive signal and the address data.

⑫MICOM LOADING 5PIN CONNECTOR(Debug only) The connector to load the Micom drive program. The program is loaded by connecting to the GA-WRITER.

About Logic BoardThe Logic Board consists of a Logic Main board, which processes the main signal input through LVDS and creates the addressdriver output and X,Y drive signals, and a Buffer board, which buffers the output signal and outputs the signal to the Address DriverIC (TCP IC).

Logic Board Function Remark

Logic Main- Video Signal Processing (W/L, error diffusion, APC)- Outputs the Address Driver Control and Data Signals to the Buffer board.- Outputs the XY Drive Board Control Signal

Buffer Board

Lower E Buffer board Outputs data and control signals to the bottom left TCP IC.

Top and bottomSymmetry design

Lower F Buffer board Outputs data and control signals to the bottom center TCP IC.Lower G Buffer board Outputs data and control signals to the bottom right TCP IC.Upper E Buffer board Outputs data and control signals to the Top right TCP IC.Upper F Buffer board Outputs data and control signals to the top center TCP IC.Upper G Buffer board Outputs data and control signals to the top left TCP IC.

Circuit Description


Major Check Points and Waveforms- The waveform during a Normal Operation

When the PDP set and the Logic Board are properly operating, the Operation Status LED blinks at approximately 0.8 second interval as shown in Figure 1.If the set is out of order, check the Operation Status LED first, and check that the output waveform is normal using anoscilloscope.Check if the waveform is the same as shown in Figure 2 by connecting the oscilloscope to the No. 12 TP in Figure 1. Check if the waveform is the same as in Figure 3 by connecting the oscilloscope to the connector that is connected to the Buffer board. If the measured waveform is different from the following waveforms, the board must be replaced.To check the waveforms, refer to the following waveform patterns.

Figure 2. Normal V-SYNC Output Waveform Figure 3. Normal Address Data Output Waveform

Circuit Description


1. X, Y Control Block

Drive Circuit DefinitionThe Drive Circuit is a circuit that generates a waveform (high-voltage pulse) for the X and Y electrode group of the panel's externalport so as to control the panel. The high-voltage switching pulse is generated through the combination of the IC HYBRID (Driveblock + IGBT) and FET.

Drive Circuit MechanismA picture is displayed on the PDP by applying voltage to the X, Y and ADDRESS electrodes of each pixel according to the appro-priate condition. The drive waveform applied to 42HD V4 is of the ISSS (ISSS: Interweaving Scan and Selective Sustain with ScanIC) type and has IDS (InDependent Sustain) in the Scan section unlike the existing ADS. Discharges within a PDP pixel can beclassified into 3 types:① Address Discharge: To form a wall voltage within the pixel by giving information (applying DATA voltage) to the pixel to be lit.② Sustain Discharge: Sustain Discharge is a display section that voluntarily maintains the discharge of the pixels whose wall

voltage has been formed by the Address Discharge. (Optical output for displaying a picture is generated).③ Erase Discharge: To selectively perform Address Discharge for each pixel, all pixels on the panel should be in the same status

(the wall electric charge status and space electric charge status must be the same). Therefore, the Erase Discharge section is an important component for guaranteeing the drive margin, and is implemented byvarious methods such as applying a log waveform. However, the current 42HD V4 has adopted a wall voltage control through an RA (Repeated Auto-quenching) reset that separates the discharge area and performs switching to perform an efficient erase operation, while the gradient was the same in the RAMP section in the existing approach.

1) Address DischargeA discharge that is caused by the difference between the plus electric potential (Va apply voltage of 65~70V + Positive WallCharge) of the electrode and the negative electric potential (Applied GND Level + Negative Wall Charge) of the Y electrode. TheAddress discharge forms a wall voltage within the pixel to display color (to be discharged) before the Sustain Discharge period.That is, the pixel whose wall charge has been formed by the Address Discharge forms a Sustain Discharge vis the followingSustain pulse.

2) Sustain DischargeA Sustain Discharge is a Self-Sustaining Discharge formed by the accumulation of the electric potential of the Sustain pulse (gen-erally 200 ~ 210 Volt) alternating over the X and Y electrodes during the sustain period, and the wall charge depending on whetherthe pixel has previously been discharged or not. That is, it is controlled by the memory characteristics, one of the basic characteris-tics of the AC PDP (in that the past operating conditions determine the current status). That is, if a wall voltage exists on the pixel(if the pixel is on), a discharge is formed again because the applied voltage, which is the sum of the following applied Sustain volt-age and the wall voltage, is higher than the discharge threshold voltage. If no wall voltage exists on the pixel (if the pixel is off), adischarge will not occur because the Sustain voltage is not higher than the discharge threshold voltage. The Sustain Dischargeperiod is the period for generating actual optical output so as to display a picture on the PDP screen.

3) Erase DischargeThe purpose of a Reset (Erase) Discharge is to create uniformity of the wall voltage within all panel pixels. It evens the wall volt-ages regardless of the Sustain Discharge in the previous stage. The Erase Discharge has to remove the wall voltage introduced bythe Sustain Discharge by supplying ions or electrons by a discharge. When the wall voltage is removed through a discharge, thetime when the reverse polarity is applied to the wall voltage (fine width erasing) is to be limited or ions or electrons are to be sup-plied by a weak discharge (low voltage erasing) so as to prevent a wall charge in reverse polarity. There are 2 known weak discharge (low-voltage) erase methods. 1) A log waveform adopted by F company and 2) a weak erasedischarge via a ramp waveform adopted by Matsushita and other companies. Both methods control the externally applied voltageby the difference of the wall voltage of the pixel by applying the rising gradient of the erasing waveform slowly, because the dis-charge begins when the sum of the existing remaining wall voltage and the rising waveform voltage exceeds the drive thresholdvoltage. In addition, a weak discharge is introduced, because the applied voltage is low.

Circuit Description


Drive Circuit Operating Block Diagram

- Y Drive Board


Logic Signal Buffer


Logic Signal Buffer

- X Drive Board

Requisite Components Necessary for Drive Board Operation

- Power : Supplied from the power board. The optimal value may differ from the following:a) Vs : 205V - Sustainb) Vset : 195V - Y Rising Rampc) Ve : 100V - Ve bias d) Vscan : -190V - Scan low biase) Vnf : -175V - Y falling Ramp (Created by the DC-DC power block of the Y Drive board)f) Vsc_h : -70V - Scan high bias (Created by the DC-DC power block of the Y Drive board)g) Vdd : 5V - Logic signal buffer IC and IPMh) Vcc : 15V - Gate drive IC ¹× IPM

- Logic Signal : Supplied by the Logic board. Gate signal of each switch

Circuit Description


Drive Circuit Architecture and Function Description

- Description of the function of each board

1) X Drive BoardThis is connected to the X port part of the panel. 1) Sustain voltage waveform (including ERC) is output, and 2) Ve bias in the Scansection is maintained.

2) Y Drive BoardThis is connected to the Y port part of the panel. It outputs 1) Sustain voltage wave form (including ERC), and 2) Y Rising, FallingRamp waveform, and maintains 3) Vscan bias.

3) Y Buffer Board (Upper, Lower)This board supplies the Scan waveform to the Y port and consists of Upper and Lower boards. For an HD grade unit, 6 scandriver ICs (TEXAS INSTRUMENT SN755867APZP: 64 outputs) are mounted on the board.

Circuit Description


Drive Waveform Specifications

- Drive Waveform

- Description of the function of each pulse

1) Y Preset RA PulseThis is supplied to the first sub-field and erases the discharge status of the previous subfield.

2) Y Main RA PulseDuring the Y Rising Ramp section, approximately 300V~350V (Vscan-h + Vset) of external voltage is supplied to the Y electrode,and a weak discharge is started when each gap voltage is equal to the discharge start voltage. While maintaining the weak dis-charge, as a whole, negative wall charges are accumulated on the Y electrode and positive wall charges on the X electrode andthe address electrode.During the Y Falling Ramp section, the negative wall charges accumulated on the Y electrode by the approximately 105V of X biasare used to erase the positive wall charges on the X electrode, and the address electrode maintains most of the positive wallcharges accumulated during the (0V) Rising Ramp section preparing for the next address discharge.

3) Y Scan Pulse (Odd/Even)A scan pulse classifies the Y electrode into Odd and Even lines and selects FPC output electrodes sequentially (one line-at-a-time). At this time, Vscan is called the Scan Bias Voltage.A Vscan voltage of approximately -175 Volt (Vsc_1) is supplied to the electrode lines. For the other lines, -56 volt (Vsc_h is higherthan Vscan-l by 120V) is supplied. However, negative wall charges are accumulated on the Y electrode by the Ramp pulse, andpositive wall charges are accumulated on the address electrode, and the voltage applied to the cells, to which the Address pulse(70V~75V) has been applied, becomes higher than the discharge voltage. An address Discharge occurs as a result. Since theScan and Data pulse is applied one line at a time as above, the address time of PDP is very long.

4) IDS Pulse (InDependent Sustain Pulse)Since an Odd Scan is performed first, the Odd line output sustains optical twice during the IDS section. At this time, a SustainDischarge does not occur for the Even line because the Even line is not scanned.

5) CPS Pulse (ComPare Sustain Pulse)By floating the Odd line that caused the Sustain Discharge in the IDS section to the Vscan-h level, and introducing the SustainDischarge only for Even lines, it compensates for the optical output difference between the Even and Odd lines.

6) CMS Pulse (ComMon Sustain Pulse)Actual optical is output during the common Sustain Discharge section.

Circuit Description


Mechanism of the FET Operation and High-Voltage Switching

Mechanism of the FET Operation

1) When the signal is output to the gate, (positive electric potential) FET short circuits(i.e. Conductor of resistance 0)

2) When no signal is output to the gate (GND), FET changes to an open circuit (i.e. an insulator of resistance ∞ ).

High-Voltage Switching of the FET Operation

1) When no signal is applied to G1, FET1 is opened and when the signal is applied to G2, FET2 short circuits, GND is output via the output terminal.

2) When a signal is applied to G1, FET1 short circuits and when no signal is applied to G2, FET2 is opened, and 180V is output via the outputterminal.

Circuit Description


Drive Board Connector Layout1) X-Main

Circuit Description


2) Y-Main

CN5007- Power

CN5008- Signal

CN5010

CN5009

CN5503- Panel

CN5502

CN5501- Panel

- Panel

CN5403- Panel

CN5402- Panel

CN5401- Panel

CN5507

265mm

320mm

CN5407

Circuit Description


Troubleshooting the Drive Board1) Y Buffer

- To check whether the Y Main board is properly working, check the operation of the Y Buffer first.- Separate the connector of the Y Buffer from the Y Main board.- Check OUTL and OUTH and confirm that the forward voltage reduction is between 0.4V ~ 0.5V.

UP - CN5407 1~10pin - OUTH / 11~33pin - OUTLLOW - CN5507 50~41pin - OUTH / 40~17pin - OUTL

- In addition, the resistance between the points must be higher than a few kΩ .

OUTL OUTH

OUTL

OUTH

OUTL

OUTH

<Y buffer U P> <Y buffer LOW>

Circuit Description


2) Y Main- Connect the Y Main and Y Buffer, and confirm that the output from TP(CN5410, CN5411) of the Y Buffer UP is the same as

#Attachment 1 when the power is supplied.

CN5410

CN5411

Circuit Description


Adjust the drive waveform so that the main reset (Rising: 100 usec, Falling: 40 usec) are the same as those in the figure.

※ The Vsc_h and Vnf voltages are controlled by the DC-DC power part of the Y Main board.

<Voltage Adjustment Specifications>

...

1 0 0 us

4 0 us

Rising Ramp

Falling Ramp

Y Main Board

IPM

DC-DCFalling Ramp Variable resistor

Rising Ramp Variable resistor

1 0 0 us

4 0 us

Y Main Board

Vsc_h TPDC-DC

Vset Vs Vsc_l Vsc_h Ve Va

200V 205V -175V -56V 105V 70V

Circuit Description


3) X- Check that the output of X-Out of the X board follows the waveform of #Attachment 2 when the power is supplied.

XOUT

Circuit Description


※ Attachment 1 Y Output Waveform

The Scan Waveform Must Be Observed

Y Output Waveform (200us/div, 100V/div)

1us/div, 100V/div (Sustain Waveform)

Circuit Description


※ Attachment 2 X Output Waveform

X Output Waveform (200us/div, 100V/div)

2us/div, 100V/div (Sustain Waveform)

Circuit Description


13-3 New Circuit Description

Ambient Light Sensor(TSL2550 Lux Calculation IC)

S3C2800

13-3-1 Power Saving Modes (Standard, Automatic, Super Power Saving)

1. ObjectiveTo enhance a sensible visual quality by maintaining an appropriate screen brightness according to the ambient brightness and toreduce power consumption.

2. Circuit Architecture

The CPU S3C2800 of the Video Board monitors the current ambient brightness (in Lux units), stored in the Ambient Light Sensorof Power Assy., which is attached at the front of the PDP, at given intervals through SMBUS communication (identical to I2C) andcontrols the PDP module to operate at the appropriate luminance level.

3. Descriptions of Each Mode1) Standard Mode

Standard Mode is set as standard visual quality.2) Auto Power Saving Mode (Ambient Light Sensor)

This uses the TAOS 4 pin TSL2550 and is currently being used in LCD TVs. It also uses SMBUS, which is the same type as I2C, for communication. The Ambient Light Sensor can detect up to 1846 Lux in normal mode. The data of the sensor can be measured for Lux operations once every 800ms.Control is implemented by using R_ASL_GAIN. The number ofsustain pulses moves left or right as shown in the figure on the right. For a low gradation condition, the change by R_ASL_GAIN has been minimized considering the degradation of the visual quality.That is, the Auto Power Saving mode screen controlled by theambient light sensor aims at normal video of medium gradation.

※ The following values are for a normal air signal with 80 Watt attenuation at maximum

Number of Sustain Pulses

Detected Lux R_ASL_GAIN (Address 0xE9) Remarks0 ~ 8 250 - Read the Lux value once per second and change it the target

R_ASL_GAIN value by 5 per second according to the changed Lux value.

- If more than 3 communication errors or saturation (count1>count0) is detected, the default value is set (R_ASL_GAIN=128).

9 ~ 22 21023 ~ 35 170

Else 128 (default)

Circuit Description


3) Super Power Saving ModeThis uses the Multi APC function of the PDP module, and aims at reducing power consumption more than 100 W for the white pattern, which is similar to the power consumption reduction of other manufacturers.

- Concept of Multi APC: Controls the number of sustain pulses according to the ASL (Average Signal Level) by R_P_Lower_Gain value.

In the PDP Logic, R_Multi_APC is set to 0X01, Multi_APC operates, and R_P_CM_Gain_SW is set to 0X01 so that the upper and lower limits of the APC Table can be shifted by adjusting the R_P_Lower_Gain value only.Therefore, the sustain pulse is controllable for the white pattern, even though it was formerly not controllable.

※ Caution: The Super Power Saving Mode screen is darker than that of Standard Mode.

Number of Sustain Pulses


MEMO

Reference Information


14. Reference Information14-1 Other issues related to other products

Problem Descriptions

A fixed screen can causepermanent damage to the TVBraun tube.

Braun, PDP and LCD TVs can all be damaged. When a still image is displayed in a sequence,this can leave stains or after-images due to the characteristics of the panel.However, the DLP TV has the advantage that no stains or after-images are left on the screen.The DLP TV has mirror pixels on the DMD panel that project the beam onto the screen, inwhich the mirror is a digital representation of 0s and 1s, leaving no trace of light.The mirror returns to a blank state so that no stains or after-images are left.

Confusion between theANYNET Port and theSERVICE Jack Port

The SAMSUNG SKY500N model has both an ANYNET port and a SERVICE jack port.Because the shape of the ANYNET port on the DLP TV is the same as that of the SERVICEjack port of the SKY500N, it fails to turn the TV off after a connection has been reported.The ANYNET port uses an RS232 port called Phone Jack, and the SERVICE jack port alsouses the RS232 port. However, you must not connect the SERVICE port and the ANYNET port.Check if the port is the ANYNET port or the SERVICE port before connecting the port.Even if the TV cannot be turned on after connecting, the TV will turn on if you disconnect theconnection.

Length of DVI Cable / PC RGBCable

- A too long DVI cable may cause a malfunction or degradation of the visual quality due to an attenuation of the signal. There is no recommendation for the cable length at present.In general, although a cable length of up to 5 meters should work, please check if video is properly displayed on the screen after connecting. If you think the length of the cable is longer than for normal use, check the visual quality of the video on the screen and shorten the length, if necessary.

- This also applies to the PC RGB (D-Sub) cable. When the length of the cable is longer than for normal use, video may not be displayed on the screen. In this case, shorten the cable length.

When a digitally distributed TVuser receives HD-ratedbroadcasts:

The digital distributed TV (Ready Technique) can render HD sources as HD-rated.However, you need to install a set-top box for this purpose. The digital TV alone cannot renderHD broadcasting as HD-rated. Install the formal set-top box for HD broadcasts.

When a digital distributed TVuser selects normal size (4:3) toreceive SD-rated digitabroadcasts:

The digitally distributed TV (Ready Technique) renders any broadcasting service as SD-rated.However, when connected to a set-top box, the digital TV renders HD broadcasts as HD-ratedand renders SD as SD-rated. The screen size is scaled to 4:3.

When a digitally built-in TV userreceives SD (air) broadcasting:

The digitally integrated TV ("built-in" type) renders SD broadcasting as SD-rated.This can be understood easily.Even a high-resolution TV cannot improve a low resolution picture into high quality.In contrast, an SD-rated TV cannot represent HD broadcasting as HD because the resolution ofthe TV is lower than the original.

When selecting a picture size of4:3 in connection with acomputer or a multimediadevice:

The representation capability of SD or HD-rated depend entirely on the TV set. The HD TV canrender HD broadcasting as HD-rated only when it receives HD sources.In the meantime, the HD TV renders SD as SD-rated when it receives SD sources.The picture size has nothing to do with the resolution; TV models like SVP-XXL3HD orSVP-XXL6HD have a size adjustment feature to 16:9, 4:3, Panorama, Zoom1, Zoom2 and AutoWide. This is about the aspect ratio of the top and bottom boundaries to the overall screen andusers can select their preference.



SD/HD broadcasts and the TV's display capability are related

1. A digital broadcast should be transmitted in wide screen (an aspect ratio of 16:9) HD. If the broadcasting station converts aconventional program created in normal screen (aspect ratio of 4:3) into a digital signal and broadcasts the signal, the left and right of the picture will not be displayed.This symptom also appears in other manufacturer's TV's. The three appliance companies are trying to resolve the problem through the Ministry of Information and Communication.＊ When watching an SD (normal) broadcast through a Digital (Wide) TV (480P normal broadcast)＊ When watching an SD (normal) broadcast through a Digital Ready (Wide) TV (Using a set-top-box)＊ When watching an analog (normal) broadcast through a wide TV

(When watching a broadcast after changing the aspect ratio of the TV from 16:9 (wide screen) to 4:3)

2. When watching a DVD title or video tape in wide screen (21:9) through a wide (16:9) TV, watching video from a computer or game console by selecting the aspect ratio to 4:3, or watching video from a DVD, VCR, computer or game console through a wide TV by selecting the aspect ratio to normal (4:3) or wide (21:9), the left and right, or top and bottom of the picture will not be displayed.This symptom appears in other manufacturer's TV's. The three appliance companies are trying to resolve the problem through the Ministry of Information and Communication.

Changing the Order of the Picture Size for 16:9 Display Devices

Changing the Order of the Picture Size for DTV 1080i/720p Sources

Restrictions

1. When you want to change the picture size in PIP 'ON', you must turn the PIP off before changing the size.However, you can change the main picture size even in PIP ON for products with no restrictions.

2. When the picture size is not Normal (4:3 for 4:3 display devices, 16:9 for 16:9 display devices) and you turn PIP on, the picture size is changed to Normal.However, you can turn PIP on without changing the picture size for products with no restrictions.

3. In the OSD notation for the picture size, 16:9 is represented as "Wide" instead of "16:9" for devices other than with 16:9 displays.Ex: For LCD 15:9 devices, "Wide" is displayed on the OSD instead of "16:9".

4. The picture size can be changed even in the blue screen.However, the picture size should be controlled by the product specifications if the change is impossible due to hardwarerestrictions.



14-2 Technical Terms

Virtual ChannelIn digital channels, a virtual channel is used. A virtual channelis a function that enables users to watch a channel by selectinga virtual channel number regardless of the region of the user. Run Auto Channel Scan for digital broadcasts, tune in to a UHFchannel number according to the region for terrestrial broad-casts, or tune into a channel number allocated by the cablebroadcasting station for a cable TV network, and then select adisplayed virtual channel.For example, even if you tune into channels UHF 14(MBC),15(KBS1), 16(SBS), 17(KBS2) and 18(EBS) broadcast fromKwanak mountain in Seoul, you can watch the channels usingvirtual channels such as 11-1(MBC), 9-1(KBS1), 6-1(SBS), 7-1(KBS2) and 10-1(EBS) regardless of your region and theactual local channel number. The virtual channel numbers maybe used nationwide, but the virtual channel numbers may varydepending on the local broadcasting stations.(Since the digital channel numbers may vary depending onyour region and can be changed by the broadcasting policy,ask your local broadcasting station or regional cable TV net-work company about the channel numbers.) If the virtual chan-nel numbers are saved and the TV set can receive digitalbroadcasting, you can watch a digital channel by pressing theDTV+ button and pressing the first two digits of the correspond-ing virtual channel number.

Custom Color AdjustmentUsing this function, a user can adjust the color according topersonal preferences (Red, Grass-Color, Sky-Color, Gold-Color, Skin-Color, White, Standard, Custom) without affectingother colors using automatic selection mode or fine adjustmentmode.

Simultaneous ScreenUsing this function, a user can view two video signals fromseparate video sources on a single screen at the same time.For example, you can watch TV and video simultaneously.

Dolby DigitalThis is the digital sound standard developed by the DolbyLaboratory. You can select your preferred digital surroundmode after connecting external speakers.

Digital BroadcastingDigital Broadcasting is a television broadcasting signal digitizedand transmitted according to the United States' terrestrial digitalbroadcast standard, or ATSC.

MonoA type of audio interface that transmits the audio signal througha single channel only. Through a mono interface, it is hard to experience stereophonicsound and the sound is played using only one speaker.

Reception Sensitivity Amplification (LNA)A signal amplification technique that amplifies a weak broad-casting signal by applying satellite technology to provide bettervisual quality even for users in regions where only a weakbroadcasting signal is available. (LNA: Low Noise Amplifier)

Sub WooferA Sub Woofer is a speaker for ultra bass sound output onlywhose frequency is as low as 150Hz. There are two types: anactive type which includes an amplifier, and a passive type,which requires an additional amplifier.

StereoA type of audio interface that transmits audio signal through 2channels.Stereo transmits audio signals for right and left sound so thatyou can experience stereophonic sound, and the sound isplayed through 2 speakers.

Partial Color Blind Person ModeUsing this function, a user can adjust the red, green or bluecolors according to the preferences of the partially color-blindperson so that he or she can view the clearest possible pictureon the screen.

Analog BroadcastingAnalog Broadcasting is a television broadcasting signal trans-mitted according to the NTSC standard.

ANTENNA IN PortThe port connecting the TV aerial via a coaxial cable. It is gen-erally used for watching public broadcast programs.

English CaptionA function that displays English captions or text informationincluded in the broadcast signal or video tape. You can use thisfunction for your English studies by watching AFKN or CCmarked video tapes.

Video/Audio PortsYou may experience poor visual and audio quality when watch-ing a video tape on channel 3 or 4 through the antenna cable.You can experience better visual and audio quality by connect-ing the TV and VCR through the Video/Audio ports. The videoport is in yellow, and the audio ports are in white and red.

Wide ScreenWide Screen refers to a screen that is horizontally longer thana conventional TV screen.While the aspect ratio of a normal TV is 4：3, that of a widescreen is 16：9.



External InputExternal Input is a connected video device such as a VCR,camcorder, DTV receiver, DVD, etc. as a video source.

Satellite BroadcastingSatellite Broadcasting transmits programs via satellite so that aprogram can be viable in all areas at a high visual and soundquality. Approximately 100 channels including public broadcastchannels are provided. To view a satellite broadcast, you haveto install an additional receiver.

Wire BroadcastingWire Broadcasting refers to movie, entertainment and educa-tional programs transmitted by a broadcasting station within ahotel or school.

Audio MultimixAudio Multimix provides 2 audio languages when foreignmovie, drama, news, etc. are broadcast. You can select and lis-ten to one of the supported languages or you can select andlisten to both languages simultaneously.

After-Image ProtectionUsing this function, a user can configure the options necessaryfor protecting the PDP TV screen.

Power Saving ModeThis function adjusts the screen brightness according to theambient brightness so as to conserve power.

Component PortThe Component Port transmits a separate luminance signal aswell as the green, blue, and red color signal and provides thebest quality of all video connection types.

Cable BroadcastingCable Broadcasting transmits programs via cable instead of viathe air. To view cable broadcasting, you have to subscribe toyour local cable broadcast service provider and install an addi-tional receiver.

TunerA device that enables the selecting of specific channel frequen-cies for TV or radio.

Panorama ScreenThis refers to a screen that corrects the picture distortion dueto a screen size mismatch on the TV.

Progressive ScanProgressive scan displays the entire frame in a single sweepso as to provide clearer and sharper visual quality.

AnynetAnynet is an AV network system that enables an easy-to-useAV interface for users by controlling all connected AV devicesthrough the Anynet menu when the AV devices of SamsungElectronics are connected.

DVD (Digital Versatile Disc)DVD is a large capacity storage media that can store multime-dia content such as video, games, audio applications, etc.using MPEG-2 video compression technology on a CD sizeddisc

DRCThis is a sound quality enhancement function that automaticallycontrols audio output so as to prevent sound quality distortioneven at loud volumes and correct the sound to the speakers sothat you can listen to the sound at the original sound quality.

DVI (Digital Visual Interface) PortA DVI interface is a standard for high definition television con-nectivity. It provides a clear picture on the screen using TMDSwhich minimizes video signal loss.

DVI-D CableA type of DVI connector. Using this cable you can only transmitdigital signals.

DVI-I CableA type of DVI connector. Using this cable you can transmiteither digital or analog signals.

HDMIHDMI (High-Definition Multimedia Interface) is the first industry-supported, uncompressed, all-digital audio/video interface.HDMI provides an interface between any audio/video source,such as a set-top box, DVD player, and A/V receiver and anaudio and/or video monitor, such as a digital television (DTV). HDMI supports standard, enhanced, or high-definition video,plus multi-channel digital audio on a single cable. It transmitsall ATSC HDTV standards and supports 8-channel digital audio,with bandwidth to spare to accommodate future enhancementsand requirements.

PCMPCM (Pulse Coded Modulation): This refers to an uncom-pressed digital signal. Use this for an AV amplifier that does notsupport 5.1 channels when connecting the audio output viaoptical or coaxial cable.

SRS TruSurround XTThis function provides 5.1 channel surround sound using 2channel speakers when inputting a stereo audio signal.



VESA Plug & PlayThis function enables the automatic recognition of deviceswhen connecting the TV to the computer without additional set-tings.

S-VIDEO IN PortThis is called super video. S-Video is a type of video signalwhich has the video luminance and the color signal separatedin order to provide better visual quality.

VHF/UHFVHF refers to TV channels 2 to 13, and UHF refers to TV chan-nels 14 to 69.

Pixels, ResolutionThe pixels are the number of small dots that make up the TV screen. The resolution represents the number of pixels on a screen.For example, if the resolution of a TV is 852x480, it means the width of the screen consists of 852 pixel columns and the height ofthe screen consists of 480 pixel rows. In this case, the total number of pixels on the screen is 408,960. The more pixels there are,the higher the visual quality that can be achieved because the picture on the screen is displayed with more pixels and thereforewith more detail.

Gradation, Color DepthGradation describes the number of gradual brightness levels. Since all information is represented by binary numbers in a digitalsystem, the Gradation is determined by the number of bits used to represent the brightness levels of a pixel on the TV screen. Forexample, if a pixel is represented by 8 bits, the Gradation is 28 or 256. Since a TV uses the three primary colors of light, R, G andB, the number of possible colors for a pixel is 256 x 256 x 256, 16,777,216, or 16.7 million colors. If 12 bits are used for a pixel, thegradation is 212 or 4096 for a color. Since three colors R, G and B are used, 4096 x 4096 x 4096 or 68.7 billion colors are support-ed per pixel. Since 68.7 billion colors are far more than 16.7 million colors, the picture will be displayed by far more abundant andnatural colors using a 12 bit pixel. That is, since Gradation means the number of brightness levels, color represented by 4096 lev-els appears more natural than color represented by 256 levels.

ContrastThe contrast is the ratio of brightness of the brightest color to the darkest color. The contrast is calculated by dividing the bright-ness of the brightest color by the brightness of the darkest color. For example, if the brightness of the darkest color is 1 and thebrightness of the brightest color is 3000, then the Contrast is 3000/1 or 3000. A higher contrast means that a dark color is dis-played darker and bright color is displayed brighter so that the screen contrast can be easily distinguished. The contrast differsfrom the Gradient which means the number of brightness levels.Therefore, if someone says that a 5000:1 contrast displays a color by 5000 levels, he is confusing Contrast with Gradation.

BrightnessBrightness is the brightness per unit screen area, the unit for brightness is candela (cd). For example, 1000cd/m2 means thebrightness that is measured when 1000 candles are lit within 1 square meters area.

852

480

42SD = 409K Pixels



Color ReproductivityEach color displayed on the TV screen is implemented by a pixel on color coordinates which have an X and Y axis.For example, when a pixel on the X coordinate 0.65 and the Y coordinate 0.74 is displayed as acolor and it becomes visible on the TV screen. While the possible color coordinate area is verywide, the color coordinate area of the signal broadcast from a broadcast station is smaller thanthat of possible color coordinates. Moreover, a TV provides a smaller color coordinate area thanthat of the signal from the broadcasting station even though the size of the color coordinate areavaries depending on the TV model. In general, Color Reproductivity is used as follows:The Color reproductivity of a TV is a certain % of NTSC. This means the TV displays thatparticular % of the color coordinate area of the NTSC signal broadcast by the broadcastingstation. In general, a CRT TV provides the highest functional color reproductivity.

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