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HOLMS http://www.optical-computing.co.uk John F. Snowdon February 20th 2004
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Page 1: HOLMS  John F. Snowdon February 20th 2004.

HOLMS

http://www.optical-computing.co.uk

John F. Snowdon

February 20th 2004

Page 2: HOLMS  John F. Snowdon February 20th 2004.

Research

Page 3: HOLMS  John F. Snowdon February 20th 2004.

http://www.conjunct.co.uk

Conjunct Dynamic Serial Optical Interconnect (DSOI)

• A next generation protocol-agile serial optical interconnect component.

• New market between telecoms and traditional parallel all electrical transmission.

• Stepping stone from solely electrical short range interconnects to high bandwidth optical solutions.

• Uses proven components creating a low cost, tolerance insensitive part.

• Optoelectronics are used in amanner that is both cost-effectiveand technologically elegant.

Page 4: HOLMS  John F. Snowdon February 20th 2004.

Demonstrator Projects• Advanced Modelling of Optical Systems (AMOS)

Partners: Leeds University and Silicon Graphics.

• Neural Optoelectronic Switch Controller (NOSC)Partners: Transtech, BT and NeuScience.

• High-Speed Optoelectronic Memory (HOLMS)Partners: ETH Zurich, Siemens and Hagen Univeristy et. al.

• Programmable Optoelectronic Computer Architectures (POCA)

Partners: Edinburgh University, Xilinx and BAe Systems.

• System for Transparent Avionics (STAR)Partners: Imperial College London, BAe Systems and DERA.

Page 5: HOLMS  John F. Snowdon February 20th 2004.

PartnersBAe Systems, UKBritish Telecom, UKEcole Superieure d'Electricite (SUPELEC), FranceILFA GmbH, GermanyImperial College London, UKLeeds University, UKSiemens Business Services GmbH & Co. OHG, GermanySilicon Graphics Inc., UKSwiss Federal Institute of Technology (ETHZ), SwitzerlandTerahertz Photonics, UKTHALES Communications (TCFR), FranceUniversität Gesamthochschule Paderborn, GermanyUniversity of Hagen, GermanyXilinx, USA

Page 6: HOLMS  John F. Snowdon February 20th 2004.

HOLMSHigh-Speed Optoelectronic

Memory Systems• To develop optoelectronic packaging technology that

allows a seamless integration of complex, parallel optoelectronic interconnection with conventional high performance electronic systems.

• To construct a demonstrator to prove that the above technology can dramatically increase the performance of real life information systems.

• The key problem of today’s computer architectures will be addressed: memory latency.

Page 7: HOLMS  John F. Snowdon February 20th 2004.

Technical ApproachThe project aims to integrate:

• Planar Free Space Optics

• Opto-Electronic MCM

• Opto-Electronic PCB

Page 8: HOLMS  John F. Snowdon February 20th 2004.

Aims and Advantages• The project aims to develop an opto-mechanical interface

between OE-MCM components and the waveguides integrated in an OE-PCB system.

• The three types of communication do not require different drivers and I/O devices.

• Regardless of the type of communication, latency and bandwidth can become virtually identical.

• The integration of OE-MCM, OE-PCB and fiber is a key enabling technology for the replacement of high latency multistage networks with low latency direct optical interconnections in information systems.

Page 9: HOLMS  John F. Snowdon February 20th 2004.

Memory Architecture• A Mephisto (ARM) processor is

connected both optically and electronically.

• Custom memory controllers manage multiple RAM chips in what are known as memory banks.

• Memory banks are logically grouped.

• The architecture has a low memory latency.

• Multicast support makes this system well suited to multiprocessor applications.

• The proposed example application is a real-time JPEG 2000 decoder.

Optoelectronics enables the construction of this innovative

memory architecture.

Page 10: HOLMS  John F. Snowdon February 20th 2004.

Memory Architecture

• Optoelectronics enables the construction of this innovative memory architecture.

• A processor is connected both optically and electronically.

• Custom memory controllers manage multiple RAM chips in what are known as memory banks.

• Memory banks are logically grouped.

• The architecture has a low memory latency.

• Multicast support makes this system well suited to multiprocessor applications.

• The proposed example application is a real-time JPEG 2000 decoder

• A sample application is include real-time satellite image decoding.

Page 11: HOLMS  John F. Snowdon February 20th 2004.

Memory Architecture

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Architectural Overview

Page 13: HOLMS  John F. Snowdon February 20th 2004.

System Segmentation

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PCB Segmentation

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PIFSO Interface

Page 16: HOLMS  John F. Snowdon February 20th 2004.

PIFSO and Fibre Interface

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Assembly (PCB-MCM-OE)

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Assembly (PIFSO-MCM-PCB)

Page 19: HOLMS  John F. Snowdon February 20th 2004.

Assembly – Optical Path