Highly Advance Voting Machine

A Project Report On Highly Advance Voting Machine Through Cell PhoneBy DEEPAK KUMAR GAURAV KR. SINGH VAISH KHAN VASHIM KHAN (0725431013) (0725431019) (0725431056) (0725431057)

Submitted to department Of

ELECTRONICS & COMMUNICATIONENGINEERINGIn partially fulfillment of the requirement for the Degree Of

Bachelor of TechnologyIn

ELECTRONICS & COMMUNICATION ENGINEERING

Aunahan,Rasulabad Road,Ramabai Nagar (Affiliated to Uttar Pradesh Technical University, Lucknow) June 2011

CONTENTSCONTENTSDeclaration Certificate Acknowledgement Abstract List of Table List of Figures Chapter 1 Introduction Chapter 2 Literature Review PCB Designing Working Block Diagram Cost Analysis Problem Faced & Troubleshooting Conclusion Future Scope 24-29 30-31 32 33 34 35 36 36 37 Chapter 3 1-23

Page No.(i) (ii) (iii) (iv) (v) (vi)

Chapter 4

Chapter 5

REFERENCES APPENDIX Program Coding

38-48

DECLARATIONWe hereby declare that this submission is our own work and that, to the best of my knowledge and belief, it contains no material previously published or written by another person nor material which to a substantial extent has been accepted for the award of any other degree or diploma of the university or other institute of higher learning, except where due acknowledgment has been made in test.

Name:DEEPAK KUMAR (0725431013)

Signature:

GAURAV KR. SINGH (0725431019) VAISH KHAN VASHIM KHAN (0725431056) (0725431057)

Date:

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Aunahan,Rasulabad Road,Ramabai Nagar CERTIFICATE

This is to certify that Project Report entitled HIGHLY ADVANCE VOTING

MACHINE THROUGH CELL PHONE which is submitted by DEEPAKKUMAR(0725431013),GAURAV KR. SINGH(0725431019),VAISH KHAN(0725431056) VASHIM KHAN(0725431057), in partial fulfillment of the requirement for the award of degree B.Tech in the Department of ELECTRONICS & COMMUNICATION ENGINEERING of U.P. Technical University, is a record of the candidates own work carried out by them under our supervision. The matter embodied in this thesis is original and has not been submitted for the award of any other degree.

Date:

Supervisor:Er.Sandeep Parihar (Lecturer) Department of Electronics & Communication Engineering

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ACKNOWLEDGEMENT

Many lives & destinies are destroyed due to the lack of proper guidance, directions & opportunities. It is in this respect We feel that We are in much better condition today due to continuous process of motivation & focus provided by our parents & teachers in general. The process of completion of this project was a tedious job & requires care & support at all stages. We would like to highlight the role played by individuals towards this. We are eternally grateful to honorable director Dr. Pradeep Bajpai for providing us the opportunity & infrastructure to complete the project as a partial fulfillment of B.Tech degree. We are very thankful to Er. Varun Pandey Head of Department, for his kind support & faith in us. We would like to express our sincere thanks, with deep sense of gratitude to our project guide Er. Sandeep Parihar and Er. Kirti Singh for their keen interests my project. We also thank Er. Priyanka Yadav for his valuable help in our project. We are also thankful to all visible & invisible hands which helped us to complete this project with a feeling of success.

DEEPAK KUMAR

(0725431013)

GAURAV KR. SINGH (0725431019) VAISH KHAN VASHIM KHAN (0725431056) (0725431057)

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ABSTRACTIndia is worlds largest democracy. Fundamental right to vote or simply voting in elections forms the basis of Indian democracy. In India all earlier elections a voter used to cast his vote by using ballot paper. This is a long, time-consuming process and very much prone to errors. This situation continued till election scene was completely changed by electronic voting machine. No more ballot paper, ballot boxes, stamping, etc. all this condensed into a simple box called ballot unit of the electronic voting machine. Cell phone based voting machine is capable of saving considerable printing stationery and transport of large volumes of electoral material. It is easy to transport, store, and maintain. It completely rules out the chance of invalid votes. Its use results in reduction of polling time, resulting in fewer problems in electoral preparations, law and order, candidates' expenditure, etc. and easy and accurate counting without any mischief at the counting centre. Our highly advance voting machine through cell phone consists of microcontroller 16F877A, a DTMF decoder CM8870C, a memory storage device EEPROM. DTMF is sent to the microcontroller which is decoded by CM8870C and the password is fed with the candidate number. The EEPROM is used to store the memory in case of power failure. This project is based on assembly language programming. The software platform used in this project are Keil uVision3 and SPIPGM37.

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LIST OF TABLESTABLE NO.1.1 1.2 1.3 4.1

TOPICList of Components Port 1 Configuration Port 3 Configuration Cost Analysis

PAGE NO.3 7 8 35

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LIST OF FIGURESFIGURE NO.1.1 1.2 1.3 1.4 1.5 1.6 1.7 1.8 1.9 1.10 1.11 1.12 1.13 3.1 3.2

TOPICPin Diagram of 16F877A Block Diagram of 16F877A Pin Diagram of CM8870C Pin Diagram of LM358 Voltage Regulator 7805 Schematic Diagram of LCD Power Supply Bridge Rectifier Basic Forms of Transformer Diode Symbol of Capacitor Capacitor & Battery Connection LED & LED Symbol Block Diagram Circuit Diagram

PAGE NO.5 10 14 16 17 17 18 19 20 20 22 22 23 33 34

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HIGHLY ADVANCE VOTING MACHINE THROUGH CELL PHONE

CHAPTER 1 INTRODUCTION & COMPONENTSINTRODUCTIONThe aim of our project is to design & develop a mobile based voting machine. In this project user can dial the specific number from any land line or mobile phone to cast his vote. Once the user is connected to the voting machine he can enter his password & choice of vote. If he has entered a valid choice & password his vote will be caste with two short duration beeps. For invalid password/choice long beep will be generated. User is allotted 15 seconds to enter his password & choice. A reset button is provided for resetting the system. A total key is provided to display the result. We have also used non-volatile memory for storing all data. EEPROM will preserve all information in case of power failure. In this project all information is transmitted through DTMF tones. The major block & their functions are described in details below.

DTMF DECODERIn DTMF decoder circuit we use IC 8870. IC 8870 converts the dual tones to corresponding binary outputs.

DTMF SIGNALLINGAC register signaling is used in DTMF telephones, here tones rather than make/break pulse are used for dialing, each dialed digit is uniquely represented by a pair of sine waves tones. These tones (one from low group for row and another from high group for column) are sent to the exchange when a digit is dialed by pushing the key, these tone lies within the speech band of 300 to 3400 HZ, and are chosen so as to minimize the possibility of any valid frequency pair existing in normal speech simultaneously. Actually, this minimisator is made possible by forming pairs with one tone from the higher group and the other from the lower of frequencies. A valid DTMF signal is the sum of two tones, one from a lower group ( 697-940 Hz) and the other from a higher group ( 1209-1663 Hz). Each group contains four individual

DEPARTMENT OF ELECTRONICS & COMMUICATION ENGG. BHABHA INSTITUTE OF TECHNOLOGY,RAMABAINAGAR

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tones. This scheme allows 10 unique combinations. Ten of these code represent digits 1 through 9 and 0. . tones in DTMF dialing are so chose that none of the tones is harmonic of are other tone. Therefore is no change of distortion caused by harmonics. Each tone is sent as along as the key remains pressed. The DTMF signal contains only one component from each of the high and low group. This significantly simplifies decoding because the composite DTMF signal may be separated with band pass filters into single frequency components, each of which may be handled individually.

DEPARTMENT OF ELECTRONICS & COMMUICATION ENGG. BHABHA INSTITUTE OF TECHNOLOGY,RAMABAINAGAR (2)


COMPONENTSLIST OF COMPONENTS USEDTable No. 1.1 List of components

Sr. no1 2 3 4 5 6 7 8 9 10 11 12 13 14

EquipmentIC 16F877A MC IC MT8870DE IC 16F877A Voltage Regulator 7805 2 line LCD display Transformer Crystal Oscillator Switch LED Resistors(1K,10K,47k,100K,330k,) Capacitors(22pf,.1f,10f,470f,1000f) Diodes Mobile Speaker Port Mobile MIC Port

Quantity1 1 1 1 1 1 2 2 2 10 17 5 1 1



COMPONENT DESCRIPTION 1) MICRO-CONTROLLER 16F877A FEATURES Compatible with MCS-51 Products 4K Bytes of In-System Programmable (ISP) Flash Memory Endurance: 1000 Write/Erase Cycles 4.0V to 5.5V Operating Range Fully Static Operation: 0 Hz to 33 MHz Three-level Program Memory Lock 128 x 8-bit Internal RAM 32 Programmable I/O Lines Two 16-bit Timer/Counters Six Interrupt Sources Full Duplex UART Serial Channel Low-power Idle and Power-down Modes Interrupt Recovery from Power-down Mode Watchdog Timer Dual Data Pointer Power-off Flag Fast Programming Time Flexible ISP Programming (Byte and Page Mode)



DESCRIPTIONThe 16F877A is a low-power, high-performance CMOS 8-bit microcontroller with 4K bytes of in-system programmable Flash memory. The device is manufactured using Atmels high-density non-volatile memory technology and is compatible with the industry- standard 80C51 instruction set and pin out. The on-chip Flash allows the program memory to be reprogrammed in-system or by a conventional non-volatile memory programmer. By combining a versatile 8-bit CPU with in-system programmable Flash on a monolithic chip, the Atmel 16F877A is a powerful microcontroller which provides a highlyflexible and cost-effective solution to many embedded control applications. The 16F877A provides the following standard features: 4K bytes of Flash, 128 bytes of RAM, 32 I/O lines, Watchdog timer, two data pointers, two 16-bit timer/counters, a five vector two-level interrupt architecture, a full duplex serial port, on-chip oscillator, and clock circuitry. In addition, the 16F877A is designed with static logic for operation down to zero frequency and supports two software selectable power saving modes. The Idle Mode stops the CPU while allowing the RAM, timer/counters, serial port, and interrupt system to continue functioning. The Power-down mode saves the RAM contents but freezes the oscillator, disabling all other chip functions until the next external interrupt or hardware reset.

PIN DIAGRAM

Figure No. 1.1: Pin Diagram of 16F877A



PROCESSORA processor is an electronic device capable of manipulating data in a way specified by a sequence of instructions.

INSTRUCTIONSInstructions in a computer are binary numbers just like data. Different numbers, when read and executed by a processor, cause different things to happen. The instructions are also called opcodes or machine codes. Different bit patterns activate or deactivate different parts of the processing core. Every processor has its own instruction set varying in number, bit pattern and functionality.

PROGRAMThe sequence of instructions is what constitutes a program. The sequence of instructions may be altered to suit the application.

ASSEMBLY LANGUAGEWriting and understanding such programs in binary or hexadecimal form is very difficult ,so each instructions is given a symbolic notation in English language called as mnemonics. A program written in mnemonics Form is called an assembly language program. But it must be converted into machine language for execution by processor.

ASSEMBLERAn assembly language program should be converted to machine language for execution by processor. Special software called ASSEMBLER converts a program written in mnemonics to its equivalent machine opcodes.

HIGH LEVEL LANGUAGEA high level language like C may be used to write programs for processors. Software called compiler converts this high level language program down to machine code. Ease of programming and portability.



PIN DESCRIPTIONVCC: Supply voltage. GND: Ground.

Port 0: Port 0 is an 8-bit open drain bidirectional I/O port. As an output port, each pin can sink eight TTL inputs. When 1s are written to port 0 pins, the pins can be used as highimpedance inputs. Port 0 can also be configured to be the multiplexed low-order address/data bus during accesses to external program and data memory. In this mode, P0 has internal pullups. Port 0 also receives the code bytes during Flash programming and outputs the code bytes during program verification. External pull-ups are required during program verification.

Port 1: Port 1 is an 8-bit bidirectional I/O port with internal pull-ups. The Port 1 output buffers can sink/source four TTL inputs. When 1s are written to Port 1 pins, they are pulled high by the internal pull-ups and can be used as inputs. As inputs, Port 1 pins that are externally being pulled low will source current (IIL) because of the internal pull-ups.

Table 1.2 : Port 1 Configuration

Port 2: Port 2 is an 8-bit bidirectional I/O port with internal pull-ups. The Port 2 output buffers can sink/source four TTL inputs. When 1s are written to Port 2 pins, they are pulled high by the internal pull-ups and can be used as inputs. As inputs, Port 2 pins that are externally being pulled low will source current (IIL) because of the internal pull-ups. Port 2 emits the high-order address byte during fetches from external program memory and during accesses to external data memory that use 16-bit addresses (MOVX @ DPTR). In this application, Port 2 uses strong internal pull-ups when emitting 1s. DEPARTMENT OF ELECTRONICS & COMMUICATION ENGG. BHABHA INSTITUTE OF TECHNOLOGY,RAMABAINAGAR (7)


Port 3 Port 3 is an 8-bit bidirectional I/O port with internal pull-ups. The Port 3 output buffers can sink/source four TTL inputs. When 1s are written to Port 3 pins, they are pulled high by the internal pull-ups and can be used as inputs. As inputs, Port 3 pins that are externally being pulled low will source current (IIL) because of the pull-ups. Port 3 receives some control signals for Flash programming and verification. Port 3 also serves the functions of various special features of the 16F877A, as shown in the following table:

Table 1.3: Port 3 Configuration

RST Reset input. A high on this pin for two machine cycles while the oscillator is running resets the device. This pin drives High for 98 oscillator periods after the Watchdog times out. The DISRTO bit in SFR AUXR (address 8EH) can be used to disable this feature. In the default state of bit DISRTO, the RESET HIGH out feature is enabled. ALE/PROG Address Latch Enable (ALE) is an output pulse for latching the low byte of the address during accesses to external memory. This pin is also the program pulse input (PROG) during Flash programming. In normal operation, ALE is emitted at a constant rate of 1/6 the oscillator frequency and may be used for external timing or clocking purposes. Note, however, that one ALE pulse is skipped during each access to external data memory. If desired, ALE operation can be disabled by setting bit 0 of SFR location 8EH.


HIGHLY ADVANCE VOTING MACHINE THROUGH CELL PHONE PSEN Program Store Enable (PSEN) is the read strobe to external program memory. When the 16F877A is executing code from external program memory, PSEN is activated twice each machine cycle, except that two PSEN activations are skipped during each access to external data memory. EA/VPP External Access Enable. EA must be strapped to GND in order to enable the device to fetch code from external program memory locations starting at 0000H up to FFFFH. Note, however, that if lock bit 1 is programmed, EA will be internally latched on reset. This pin also receives the 12-volt programming enable voltage (VPP) during Flash programming. XTAL1 Input to the inverting oscillator amplifier and input to the internal clock operating circuit. XTAL2 Output from the inverting oscillator amplifier



PROCESSOR ARCHITECTURE

Figure No. 1.2: Block Diagram of Microcontroller



ALUThe Arithmetic Logic Unit (ALU) performs the internal arithmetic manipulation of data line processor. The instructions read and executed by the processor decide the operations performed by the ALU and also control the flow of data between registers and ALU. Operations performed by the ALU are Addition , Subtraction , Not , AND , NAND , OR , NOR , XOR , Shift Left/Right , Rotate Left/right , Compare etc. Some ALU supports Multiplication and Division. Operands are generally transferred from two registers or from one register and memory location to ALU data inputs. The result of the operation is the placed back into a given destination register or memory location from ALU output.

REGISTERSRegisters are the internal storage for the processor. The number of registers varies significantly between processor architectures.

WORKING REGISTERS Temporary storage during ALU Operations and data transfers. INDEX REGISTERS Points to memory addresses.

STATUS REGISTERSStores the current status of various flags denoting conditions resulting from various operations.

CONTROL

REGISTERS

Contains configuration bits that affect processor operation and the operating modes of various internal subsystems.



MEMORYMemory is used to hold data and program for the processor.

SRAMVolatile, fast, low capacity, expensive, requires lesser external support circuitry.

DRAMVolatile, relatively slow, highest capacity needs continuous refreshing. Hence require external circuitry.

OTP ROMOne time programmable, used for shipping in final products.

EPROMErasable programmable, UV Erasing, Used for system development and debugging.

EEPROMElectrically erasable and programmable, can be erased programmed in- circuit, Used for storing system parameters.

FLASHElectrically programmable & erasable, large capacity, organized as sectors.

BUSESA bus is a physical group of signal lines that have a related function. Buses allow for the transfer of electrical signals between different parts of the processor. Processor buses are of three types: Data bus Address bus Control bus DEPARTMENT OF ELECTRONICS & COMMUICATION ENGG. BHABHA INSTITUTE OF TECHNOLOGY,RAMABAINAGAR (12)


CONTROLLER LOGICProcessor brain decodes instructions and generate control signal for various sub units. It has full control over the clock distribution unit of processor.

I/O PeripheralsThe I/O devices are used by the processor to communicate with the external Parallel Ports. Serial Ports. ADC/DAC. world

3) IC CM8870FEATURES Full DTMF receiver Less than 35mW power consumption Industrial temperature range Uses quartz crystal or ceramic resonators Adjustable acquisition and release times 18-pin DIP, 18-pin DIP EIAJ, 18-pin SOIC, 20-pin PLCC

DESCRIPTIONThe CAMD CM8870/70C provides full DTMF receiver capability by integrating both the band-split filter and digital decoder functions into a single 18-pin DIP, SOIC, or 20-pin PLCC package. The CM8870/70C is manufactured using state-of-the-art CMOS process technology for low power consumption (35mW, MAX) and precise data handling. The filter section uses a switched capacitor technique for both high and low group filters and dial tone rejection. The CM8870/70C decoder uses digital counting techniques for the detection and decoding of all 16 DTMF tone pairs into a 4-bit code. This device contains input protection against damage due to high static voltages or electric fields; however, precautions should be taken to avoid application of voltages higher than the maximum rating. DEPARTMENT OF ELECTRONICS & COMMUICATION ENGG. BHABHA INSTITUTE OF TECHNOLOGY,RAMABAINAGAR

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PIN DIAGRAM

Fig No.: Pin Diagram of CM8870C

PIN CONFIGURATIONIN+: Non-inverting IN: Inverting GS: Gain select VREF: Reference Output Voltage (nominally VDD/2) INH: Inhibits OSC3: Digital buffered oscillator output PD: Power down OSC1: Clock input OSC2: Clock output VSS: Negative power supply TOE: Three-state output enable (Input) Q1: Three-state outputs Q2, Q3, Q4: Tone pair received StD: Delayed Steering output ESt: Early steering output St/Gt: Steering input/guard VDD: Positive power supply IC: Internal connection DEPARTMENT OF ELECTRONICS & COMMUICATION ENGG. BHABHA INSTITUTE OF TECHNOLOGY,RAMABAINAGAR (14)


3) LM358 FEATURES Low-voltage and Standard-voltage Operation 2.7 (VCC = 2.7V to 5.5V) 1.8 (VCC = 1.8V to 5.5V) Internally Organized 128 x 8 (1K), 256 x 8 (2K), 512 x 8 (4K), 1024 x 8 (8K) or 2048 x 8 (16K) 2-wire Serial Interface Schmitt Trigger, Filtered Inputs for Noise Suppression Bi-directional Data Transfer Protocol 100 kHz (1.8V, 2.5V, 2.7V) and 400 kHz (5V) Compatibility 8-byte Page (1K, 2K), 16-byte Page (4K, 8K, 16K) Write Modes Partial Page Writes are Allowed Self-timed Write Cycle (10 ms max) High-reliability Endurance: 1 Million Write Cycles Data Retention: 100 Years Automotive Grade and Extended Temperature Devices Available 8-lead PDIP, 8-lead JEDEC SOIC, 8-lead MAP and 8-lead TSSOP Packages

DESCRIPTIONThe AT24C01A/02/04/08/16 provides 1024/2048/4096/8192/16384 bits of serial electrically erasable and programmable read-only memory (EEPROM) organized as 128/256/512/1024/2048 words of 8 bits each. The device is optimized for use in many industrial and commercial applications where low-power and low-voltage operation are essential. The AT24C01A/02/04/08/16 is available in space-saving 8-pin PDIP, 8-lead JEDEC SOIC, 8-lead MAP and 8-lead TSSOP packages and is accessed via a 2-wire serial interface.


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PIN DIAGRAM

Fig No. Pin Diagram of LM358

PIN CONFIGURATIONA0 - A2 : Address Inputs SDA : Serial Data SCL : Serial Clock Input WP : Write Protect NC : No Connect GND : Ground

4) VOLTAGE REGULATOR FEATURES Output current in Excess of 1.0 A No external component required Internal thermal overload protection Internal short circuit current limiting Output transistor safe-area compensation Output voltage offered in 2% and 4% tolerance Available I n surface mount D2PAK and standard 3-lead transistor packages Previous commercial temperature range has been extended to a junction temperature range of -40 degree C to +125 degree C.


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DESCRIPTIONVoltage regulator ICs are available with fixed (typically 5, 12 and 15V) or variable output voltages. The maximum current they can pass also rates them. Negative voltage regulators are available, mainly for use in dual supplies. Most regulators include some automatic protection from excessive current and overheating (thermal protection). Many of fixed voltage regulator ICs has 3 leads. They include a hole for attaching a heat sink if necessary.

Figure No. 1.5: 7805 Voltage Regulator

5) LCD DISPLAYThis is the first interfacing example for the Parallel Port. We will start with something simple. This example doesn't use the Bi-directional feature found on newer ports, thus it should work with most, if not all Parallel Ports. These LCD Modules are very common these days, and are quite simple to work with, as all the logic required to run them is on board.

Figure No. 1.8: Schematic Diagram of LCD Display



CIRCUIT DESCRIPTIONThe LCD panel's Enable and Register Select is connected to the Control Port. The Control Port is an open collector / open drain output. While most Parallel Ports have internal pull-up resistors, there is a few which don't. Therefore by incorporating the two 10K external pull up resistors, the circuit is more portable for a wider range of computers, some of which may have no internal pull up resistors. We make no effort to place the Data bus into reverse direction. Therefore we hard wire the R/W line of the LCD panel, into write mode. This will cause no bus conflicts on the data lines. As a result we cannot read back the LCD's internal Busy Flag which tells us if the LCD has accepted and finished processing the last instruction. This problem is overcome by inserting known delays into our program. The 10k Potentiometer controls the contrast of the LCD panel. Nothing fancy here. As with all the examples, I've left the power supply out. You can use a bench power supply set to 5v or use an onboard +5 regulator. Remember a few de-coupling capacitors, especially if you have trouble with the circuit working properly.

6) POWER SUPPLY

A D1 AC Suppl Y 3

1 D31000 F

7805

+ -

+ -

4 D4 D2 2Figure No. 1.10: Power Supply

B



BRIDGE RECTIFIERBridge rectifier circuit consists of four diodes arranged in the form of a bridge as shown in figure.A D1 AC Supply 1 D3

3 + D4 B

Load D2 2

4

Figure No. 1.11: Bridge Rectifier

OPERATIONDuring the positive half cycle of the input supply, the upper end A of the transformer secondary becomes positive with respect to its lower point B. This makes Point1 of bridge positive with respect to point 2. The diode D1 & D2 become forward biased & D3 & D4 become reverse biased. As a result a current starts flowing from point1, through D1 the load & D2 to the negative end .During negative half cycle, the point2 becomes positive with respect to point1. Diodes D1 & D2 now become reverse biased .Thus a current flow from point 2 to point1.

7) TRANSFORMER PRINCIPLE OF THE TRANSFORMERTwo coils are wound over a Core such that they are magnetically coupled. The two coils are known as the primary and secondary windings. In a Transformer, an iron core is used. The coupling between the coils is source of making a path for the magnetic flux to link both the coils. A core as in fig.2 is used and the coils are wound on the limbs of the core. Because of high permeability of iron, the flux path for the DEPARTMENT OF ELECTRONICS & COMMUICATION ENGG. BHABHA INSTITUTE OF TECHNOLOGY,RAMABAINAGAR (19)

HIGHLY ADVANCE VOTING MACHINE THROUGH CELL PHONEflux is only in the iron and hence the flux links both windings. Hence there is very littleleakage flux. This term leakage flux denotes the part of the flux, which does not link both

the coils, i.e., when coupling is not perfect. In the high frequency transformers, ferrite core is used. The transformers may be step-up, step-down, frequency matching, sound output, amplifier driver etc. The basic principles of all the transformers are same.

Figure 2.12: Basic Forms of Transformer

8) DIODEThe diode is a p-n junction device. Diode is the component used to control the flow of the current in any one direction. The diode widely works in forward bias.

Figure No. 1.13: Diode

When the current flows from the P to N direction. Then it is in forward bias. The Zener diode is used in reverse bias function i.e. N to P direction. Visually the identification of the diode`s terminal can be done by identifying he silver/black line. The silver/black line is the negative terminal (cathode) and the other terminal is the positive terminal (cathode).

APPLICATION Diodes: Rectification, free-wheeling, etc Zener diode: Voltage control, regulator etc. Tunnel diode: Control the current flow, snobbier circuit, etc DEPARTMENT OF ELECTRONICS & COMMUICATION ENGG. BHABHA INSTITUTE OF TECHNOLOGY,RAMABAINAGAR (20)


9) RESISTORSThe flow of charge through any material encounters an opposing force similar in many respects to mechanical friction .this opposing force is called resistance of the material .in some electric circuit resistance is deliberately introduced in form of resistor. Resistor used fall in three categories , only two of which are color coded which are metal film and carbon film resistor .the third category is the wire wound type ,where value are generally printed on the vitreous paint finish of the component. Resistors are in ohms and are represented in Greek letter omega, looks as an upturned horseshoe. Most electronic circuit require resistors to make them work properly and it is obliviously important to find out something about the different types of resistors available. Resistance is measured in ohms, the symbol for ohm is an omega ohm. 1 ohm is quite small for electronics so resistances are often given in kohm and Mohm. Resistors used in electronics can have resistances as low as 0.1 ohm or as high as 10 Mohm.

Figure No. 1.14: Symbol of Resistance

TESTINGResistors are checked with an ohm meter/millimeter. For a defective resistor the ohm-meter shows infinite high reading.

10) CAPACITORSIn a way, a capacitor is a little like a battery. Although they work in completely different ways, capacitors and batteries both store electrical energy. If you have read How Batteries Work, then you know that a battery has two terminals. Inside the battery, chemical reactions produce electrons on one terminal and absorb electrons at the other terminal.

BASICLike a battery, a capacitor has two terminals. Inside the capacitor, the terminals connect to two metal plates separated by a dielectric. The dielectric can be air, paper, plastic or anything else that does not conduct electricity and keeps the plates from touching each other. You can



easily make a capacitor from two pieces of aluminum foil and a piece of paper. It won't be a particularly good capacitor in terms of its storage capacity, but it will work. In an electronic circuit, a capacitor is shown like this:

Figure No. 1.17: Symbol of Capacitor When you connect a capacitor to a battery, heres what happens: The plate on the capacitor that attaches to the negative terminal of the battery accepts electrons that the battery is producing. The plate on the capacitor that attaches to the positive terminal of the battery loses

electrons to the battery.

Figure No. 1.18: Capacitor & Battery Connection

TESTINGTo test the capacitors, either analog meters or special digital meters with the specified function are used. The non-electrolyte capacitor can be tested by using the digital meter.



11) LEDLED falls within the family of P-N junction devices. The light emitting diode (LED) is a diode that will give off visible light when it is energized. In any forward biased P-N junction there is, with in the structure and primarily close to the junction, a recombination of hole and electrons. This recombination requires that the energy possessed by the unbound free electron be transferred to another state. The process of giving off light by applying an electrical source is called electroluminescence.

Figure No. 1.19: LED & LED Symbol

LED is a component used for indication. All the functions being carried out are displayed by led .The LED is diode which glows when the current is being flown through it in forward bias condition. The LEDs are available in the round shell and also in the flat shells. The positive leg is longer than negative leg.

12)

CRYSTAL OSCILLATORS

Crystal oscillators are oscillators where the primary frequency determining element is a quartz crystal. Because of the inherent characteristics of the quartz crystal the crystal oscillator may be held to extreme accuracy of frequency stability. Temperature compensation may be applied to crystal oscillators to improve thermal stability of the crystal oscillator. Crystal oscillators are usually, fixed frequency oscillators where stability and accuracy are the primary considerations. For example it is almost impossible to design a stable and accurate LC oscillator for the upper HF and higher frequencies without resorting to some sort of crystal control. Hence the reason for crystal oscillators. The frequency of older FT-243 crystals can be moved upward by crystal grinding.



CHAPTER 2 LITERATURE REVIEWPREHISTORY: 8048In fact, it should have started with chapter -2, the invention of microprocessor. Intel introduced a single-chip processor, the 4004, in 1971. It was a 4-bit microprocessor, with whopping processing speed of 100 thousand operations per second, and was meant for an electronic calculator. There is a lot of 4-bit processing in calculators, especially if the software is based on BCD arithmetics. Later Intel introduced the 8-bitter 8008 and it's grownup brother - the famous 8080 (which then was perfected by an ex-Intel employee as Zilog Z80, one of the best 8-bit microprocessors of all times).

In 1976, Intel introduced its first microcontroller, 8048. It integrated the processing core with code and data memory and certain peripherals. The code memory was a 1kB mask ROM (defined by the last metallisation mask during the chip processing) or EPROM (after all, Intel invented EPROM), the data memory was 64 bytes of RAM (including the 8-level stack and two pages of eight general purpose registers). Besides general-purpose I/O (see below), peripherals included a timer and an external interrupt (plus the necessary interrupt system).

Although the 8048 is clearly an 8-bit architecture, it is said to be an ancestor of the 4-bit 4004 rather than the 8080. Also it is said to bear remarkable similarities to Fairchild F8 microprocessor. Today, it is hard to say whether something of this is true, but one thing is sure, the 8048 has a couple of strange features. Using four of its general purpose input/output ports, and adding one or more 8243-type chip - and the I/O expand into another four 4-bit ports. This expansion has not only support in the hardware - dedicated pins on 8048 - but also in the instruction set, having dedicated instructions for I/O operations (including AND and OR(!)) via the expander. The 8048 already had a lot of useful features known well to 8051-users: external code memory support; external data memory support (inherently only 256 bytes addressed indirectly by R0 and R1 as there is no 16 bit pointer register such as the DPTR in 8051 - the



8051 inherited this 8-bit external data access); quasibidirectional I/O ports. Maximum clock is 11MHz, but an instruction cycle takes 15 oscillator clocks. The "A" version (advanced) introduced powerdown mode

There were multiple variations of the 8048 around, mostly with different numbering, but generally denoted as the MCS-48 family. 8048 itself denoted a mask-ROM part, 8748 an EPROM part - windowed (CERDIP - erasable) for development, and unwindowed (PDIP) OTP. The romless part was a bit surprisingly marked 8035 (probably most of the parts sold as romless were parts with unusable ROM, due to error in the "programmed" firmware). There was a low-cost version with reduced pin count and omitted some of the features as 8021, and versions with more ROM and RAM as 8049 (2kB ROM/128B RAM) and 8050 (4kB ROM/256B RAM); with ROMless versions as 8039 and 8040; and 8049 had also an EPROM version 8749 (the funny thing is, that 8749 came in 1981, one year after 8051/8751). 8048's were second sourced by a number of manufacturers, including NEC, Toshiba, and were cloned also behind the then iron curtain in Czechoslovakia (Tesla MHB8048/8035) and USSR. Application specific versions of 8048 were also built quite early, with adding of various peripherals, such as 8-bit ADC in 8022 and a parallel-bus slave interface in 8041/8042. The MCS-48 family was used in a quite wide range of applications. One of the first applications of 8048 was in a gaming console (Magnavox Odyssey2), but there were also more "serious" applications, for example in one of the first car engine "computerized" control units. But the biggest hit came when IBM decided to use 8048 in its original PC keyboard. Although in the AT keyboard IBM used the (presumably cheaper) 6805, it used 8042 as a coprocessor on the mainboard, communicating with the keyboard. The 8042 is still present in almost each and every PC even today, but don't search for a chip with "8042" on it - it is integrated in the chipset. It may come as a surprise to somebody, but thanks to this fact the 8048 with its derivatives is most probably the most widespread microcontroller at all. As in the 70s there were no pdf-s and no world-wide web, datasheets and other documentation is hardly available over the internet. I believe Intel will give out a copy if one really wants it (there is a "literature request" form at their "museum" pages). However, there



seems to be a couple of enthusiastic people, one of the maintaining a wonderful document called Grokking the MCS-48 System at http://home.mnet-online.de/al/mcs-48/mcs-48.pdf .

8051: THE CLASSICSIn 1980, Intel introduced the successor to 8048, the 8051. Intel made sure that the transition from the already successful model will be as smooth as possible. Architecturally, the 8051 is an extension to 8048. Almost every feature and resource of 8048 is present in 8051 in same or superior form. 4kB ROM and 128B RAM on chip. Pin compatibility was not maintained, but it was not a real issue. Software compatibility is not binarywise but source-wise, but that is also acceptable. The preliminary datasheet read: "Enhanced MCS-48 Architecture". The extensions included code and data memory extended to 64kB with appropriate support in instruction set and registers (DPTR), relative conditional and unconditional jumps (conditionals and DJNZ were constrained within a 256-byte page in 8048), four register banks instead of two, "unlimited" stack (8048 had stack limited to 16 bytes), multiple and divide instructions. As for peripherals, second timer was added and both were extended to 16 bits with multiple modes (including 8-bit autoreload mode), and an UART (which was a luxury that many lower-end microcontrollers didn't have even a couple of years ago). The raw clock frequency did not increase considerably, being 12MHz, but an instruction cycle is 12 clocks now. Similarly to 8048, also the 8051 had variants, but there was no cut-down "low-cost" version (presumably because of the cost of ROM/RAM and the DIP40 package went low enough). The romless version was 8031 and the EPROM version was 8751. The "extended" version 8052 (with 8032 and 8752) came 3 years later and featured besides 8kB ROM and 256B RAM also an extra 16-bit timer. An unusual chip was the 8052AH-BASIC, which according to Intel was "software-onsilicon version of the 8052 microcontroller with a BASIC interpreter on-chip in 8K ROM". The whole family was eventually called MCS-51 and was manufactured in NMOS, since 1986 in CMOS.



Intel provided all the needed initial tools and support with the 8051 - assembler, application notes, example software, in-circuit emulator. Some of the appnotes and software still can be found on Intel's webpages and are of excellent quality. The basic datasheet set - dubbed in the community as "the bible" - is still THE reference source of information on 8051 and its derivatives, even today. So, Intel did its job, providing everything needed to make 8051 successful, and the rest is history.

THE BIRDS ARE OUT OF THE NESTSimilar to 8048, also the 8051 has been licensed to various manufacturers worldwide. Some of the early adopters include Philips, Signetics, MHS (Matra) and Siemens. Most of these companies don't exist any more, some have been taken over, others have been renamed; but most of them still manufacture some derivative of 8051. The licensees started to make fully compatible models. Naturally, they took over also the datasheets, for example the "bible" is better used in the Philips version, which is a verbatim copy of the Intel version, except that it is a true searchable pdf, while the Intel is a scanned copy of paper document, unsearchable. More than that, the manufacturers took over the annoying practice of Intel to include in datasheets only the specific differences to the "bible", very confusing for the newbies (but there are opinions on this, some of the users consider this arrangement better than having huge datasheets containing all the common details). The manufacturers published their own appnotes, which all together form a huge knowledge base and code library, but... due to competition it is scattered across the manufacturers' sites, an another confusing fact for the newbies. Later, the manufacturers rolled out their own derivatives and variants with varying marking there is no real standard in it (although there are some idiosyncrasies present in the marking of most manufacturers). All types of modifications described in the following chapters were applied; but the compatibility to the original 8051 was usually maintained. This, together with



the availability of second-, third-,...,35th-,...-source of 8051 is the true source of its immortality.

EMBEDDED IN EMBEDDEDIntel and the licensees soon realized that 8051 is a nice core that can be embedded in various ASIC chips to perform setup and control tasks. Typically, the resources of the ASIC are mapped as external data memory, as if the ASIC would be connected to a conventional 8051 chip. This approach allows to use an unmodified core, which speeds up the chip development and decreases the chance for error; also the ASIC could be breadboard-prototyped in this form easily.

As an example, Intel produced 16F877A, a descendant of 8042. Philips has a line of 8051based teletext controllers. In a particular USB webcamera, the chip interfacing the CCD and USB was controlled by an embedded 8051. There are probably much more examples around, but most of them never get public. In spite of this, the 8051 in this form is produced probably in much higher volumes than as general-purpose microcontrollers.

EXTRASBesides application-specific, also general purpose derivatives have been introduced by Intel and the licensees, with enhanced features and increased code and data memories. In contrast with the ASICs mentioned above, these chips tend to implement the extra features in the core itself, accessed usually via extra SFRs. This allows faster code as SFRs are accessed by all the instructions using direct addressing (mov, logic), and some of them by the bit-manipulation instructions, too.

One of the first such derivative by Intel was the 16F877A, which introduced the programmable counter array (PCA) (and was a 8052 otherwise). It was intended for automotive applications (brake control). Soon, FB and FC continued, with more and more code memory. 80C51RA/RB/RC followed, with added "internal external" data memory. These were the basis for the today's 89C51RD2 "sub-family", produced by Philips, Atmel (as ex-Temic), SST and Winbond. DEPARTMENT OF ELECTRONICS & COMMUICATION ENGG. BHABHA INSTITUTE OF TECHNOLOGY,RAMABAINAGAR (28)


FAT BOYS: 16-BIT EXTENSIONSWhen the 8051 was accepted widely enough, some of the applications started to grow and soon required more power than the 8051 even with enhancements could provide. There were 16-bit microcontrollers around (e.g. Intel had it's 80C196 line), but it seemed a good idea to provide a more natural migration path by creating a 16-bit version of 8051. Intel addressed the problem by introducing 16F877A. It went all the way to achieve compatibility - it was able to run 8051 binary code (being able to switch to native 16-bit 251mode) and had a package pin-compatible with 8051. It was not a big success, most probably for bad market timing (although it is second sourced by Temic/Atmel). Philips on the other hand employed source-compatibility for its XA family, which seems to be adequate for most of the applications, where legacy code has to be maintained or parallel development with 8051 is needed; and poses little constraint on the chip design itself. All in all, the 16-bit versions of 8051 gained far less popularity than the 8051 and are less widespread.

FLASH FOR THE MASSESIn the 90s, Atmel introduced a derivative of 8051 with Flash code memory, enabling fast erasure and reprogramming. It enabled to use the production-grade chip in development, and enabled the chips used in the product to be reprogrammed when upgrade or a bugfix was needed, cutting down costs. It brought down the 8051 to the masses - the small "garage" companies and hobbyists. Besides that, Atmel introduced also 16F877A with decreased pin count (and price).This was a smart move, the chip proved to be extremely popular in many small applications.

Today, virtually all manufacturers produce 8051 derivatives with Flash, most of them able to be programmed via some few-pin serial interface (called in-situ programming (ISP), SPIstyle or UART-style) and the higher-end versions also able to reprogram themselves (inapplication programming, IAP). MaskROM and EPROM - windowed or OTP - seems to become extinct, at least in the mainstream applications.



CHAPTER 3 P.C.B. DESIGNING & WORKING 1) P.C.B. DESIGNINGP.C.B. LAYOUTThe entire circuit can be easily assembled on a general purpose P.C.B. board respectively. Layout of desired diagram and preparation is first and most important operation in any printed circuit board manufacturing process. First of all layout of component side is to be made in accordance with available components dimensions. The following points are to be observed while forming the layout of P.C.B. 1. 2. Between two components, sufficient space should be maintained. High voltage/max dissipated components should be mounted at sufficient distance from semiconductor and electrolytic capacitors. The most important points are that the components layout is making proper compromise with copper side circuit layout. Printed circuit board (P.C.B.s) is used to avoid most of all the disadvantages of conventional breadboard. These also avoid the use of thin wires for connecting the components; they are small in size and efficient in performance.

3.

PREPARING CIRCUIT LAYOUTFirst of all the actual size circuit layout is to be drawn on the copper side of the copper clad board. Then enamel paint is applied on the tracks of connection with the help of a shade brush. We have to apply the paints surrounding the point at which the connection is to be made. It avoids the disconnection between the leg of the component and circuit track. After completion of painting work, it is allowed to dry.



DRILLINGAfter completion of painting work, holes 1/23inch(1mm) diameter are drilled at desired points where we have to fix the components.

ETCHINGThe removal of excess of copper on the plate apart from the printed circuit is known as etching. From this process the copper clad board wit printed circuit is placed in the solution of FeCl with 3-4 drops of HCL in it and is kept so for about 10 to 15 minutes and is taken out when all the excess copper is removed from the P.C.B. After etching, the P.C.B. is kept in clean water for about half an hour in order to get P.C.B. away from acidic, field, which may cause poor performance of the circuit. After the P.C.B. has been thoroughly washed, paint is removed by soft piece of cloth dipped I thinner or turbine. Then P.C.B. is checked as per the layout, now the P.C.B. is ready for use.

SOLDERINGSoldering is the process of joining two metallic conductor the joint where two metal conductors are to be join or fused is heated with a device called soldering iron and then as allow of tin and lead called solder is applied which melts and converse the joint. The solder cools and solidifies quickly to ensure is good and durable connection between the jointed metal converting the joint solder also present oxidation.

SOLDERING AND DESOLDERING TECHIQUES:These are basically two soldering techniques. Manual soldering with iron. Mass soldering.



2) WORKING OF PROJECTThe working of this project is controlled by a microcontroller 16F877A and a DTMF decoder CM8870 is used for decoding key tones of cell phone and EEPROM is used for memory storage. The project works in the following ways: 1. 2. 3. 4. 5. 6. Switch on power supply. Message wait will appear on LCD. Type #22 followed with candidate number to enter the vote where 22 is the password. If vote is casted then vote casted successfully on the LCD & if not then invalid vote try again will appear. To check the number of vote press the button on the PCB and number of votes of each candidate & total number of vote will appear on LCD. A reset key is present to reset the microcontroller.

.



3) BLOCK DIAGRAMFull Wave Bridge Rectifier Voltage Regulator

230V AC

Step Down

T/F

+5VDC/500mA

DTMF Decoder (MM8870)

Microcontroller AT89C2051

LCD Display

MOBILE PHONE

EEPROM (24C16)

Figure No. 3.1: Block Diagram


BJP=5 CONGRESS=6 BSP=7 NDA=8 JD=9

ENT

Reset Switch

Buzzer

UP

12V AC Input m Transformer

Mobile Controled Voting Machine BJP=05 CONGRESS=06 BSP=07 NDA=08 JP=09Connect Mobile Phone to Jack available now dial the phone number of mobile phone which is connected to the kit. Make auto answer ON of the mobile phone. When yo dial the mobile nmber fron other phone it will get connected after few rings. Now Press 5 to vote to BJP one vote will transfer to BJP in memory similarly if you want ot vote to some other Press 6 to vote to CONGRESS one vote will transfer to CONGRESS in memory similarly Press 7 to vote to BSP one vote will transfer to BSP in memory similarly if you want ot vote to some other Press 8 to vote to BSP one vote will transfer to NDA in memory similarly if you want ot vote to some other Press 9 to vote to JD one vote will transfer to JD in memory similarly if you want ot vote to some other

How To Read Votes Available(Press ENT Button to Read Votes)Microcontroller Based Electronic Voting Machine is design for five contenders. To prevent unauthorised ccess of this machine a system password(109) is provided Without entering te password one cannot see the votes available for each contender.

Enter Password 000Password is 109, press up button to set the password to 109

Enter Password 109Then Press Enter button display for correct password LCD shows

Password OKFor wrong password

Password FailIf Password correct the LCD shows

Reading Votes BJP XXXXXPress UP button to see next total for Congress

Reading Votes CONGRESS XXXXXPress UP button to see next total for BSP

Reading Votes BSP XXXXXPress ENTER button to see next total for NDA

Reading Votes NDA XXXXXPress ENTER button to see next total for JD

Reading Votes JD XXXXXNext LCD shows

TO RESET PRESS&HOLD UP KEYIF You want ot reset the total votes then press and hold UP key untill LCD shows

OK ERASING

BJP=05 CONGRESS=06 BSP=07 NDA=08 JP=09Connect Mobile Phone to Jack available now dial the phone number of mobile phone which is connected to the kit. Make auto answer ON of the mobile phone. When yo dial the mobile nmber fron other phone it will get connected after few rings. Now Press 5 to vote to BJP one vote will transfer to BJP in memory similarly if you want ot vote to some other Press 6 to vote to CONGRESS one vote will transfer to CONGRESS in memory similarlyPress 7 to vote to BSP one vote will transfer to BSP in memory similarly if you want ot vote to some other Press 8 to vote to BSP one vote will transfer to NDA in memory similarly if you want ot vote to some other Press 9 to vote to JD one vote will transfer to JD in memory similarly if you want ot vote to some other

This system uses Dual Tone Multi Frequency (DTMF) technology telephone set. There are two type of dialing facilities a telephone system (i) Pulse dialing mode (ii) Tone dialing mode. Here this system works on tone dialing mode. The DTMF mode is shortly called as tone dialing mode. This circuit can control robot via mobile phone.This contains one mobile phone is connected to robot and other mobile/landline phone to give command to the robot. When you press a button in the mobile/ telephone set keypad, a connection is made that generates a resultant signal of two tones at the same time. These two tones are taken from a row frequency and a column frequency. The resultant frequency signal is called "Dual Tone Multiple Frequency". These tones are identical and unique. A DTMF signal is the algebraic sum of two different audio frequencies, and can be expressed as follows: f(t) = A0sin(2**fa*t) + B0sin(2**fb*t) + ........... Where fa and fb are two different audio frequencies with A and B as their peak amplitudes and f as the resultant DTMF signal. fa belongs to the low frequency group and fb belongs to the high frequency group. Each of the low and high frequency groups comprise four frequencies from the various keys present on the telephone keypad two different frequencies, one from the high frequency group and another from the low frequency group are used to produce a DTMF signal to represent the pressed key. When you send these DTMF signals to the telephone exchange through cables, the servers in the telephone exchange identifies these signals and makes the connection to the person you are calling. Control Circuit

the bands enclosing the low and high group tones. The filter also incorporates notches at 350 and 440 Hz, providing excellent dial tone rejection. Each filter output is followed by a single-order switched capacitor section that smooths the signals prior to limiting. Signal limiting is performed by high gain comparators provided with hysteresis to prevent detection of unwanted low-level signals and noise. The comparator outputs provide full-rail logic swings at the frequencies of the incoming tones. The M-8870 decoder uses a digital counting technique to determine the frequencies of the limited tones and to verify that they correspond to standard DTMF frequencies. A complex averaging algorithm is used to protect against tone simulation by extraneous signals (such as voice) while tolerating small frequency variations. The algorithm ensures an optimum combination of immunity to talk off and tolerance to interfering signals (third tones) and noise. When the detector recognizes the simultaneous presence of two valid tones known as signal condition), it raises the Early Steering flag (ESt). Any subsequent loss of signal condition will cause ESt to fall. Before a decoded tone pair is registered, the receiver checks for a valid signal duration (referred to as characterrecognition-condition). This check is performed by an external RC time constant driven by ESt. A logic high on ESt causes voltage VC to rise as the capacitor discharges. Provided that signal condition is maintained (ESt remains high) for the validation period , VC reaches the threshold (VTSt) of the steering logic to register the tone pair, thus latching its corresponding 4-bit code into the output latch. At this point, the GT output is activated and drives VC to VDD. GT continues to drive high as long as ESt remains high. Finally, after a short delay to allow the output latch to settle, the delayed The control circuit consist of PIC16F877A microcontroller, steering output flag (StD) goes high, signaling that a DTMF decoder, Pin Diagram of DTMF decoder is shown received tone pair has been registered. The contents of the in figure 1. The M-8870 is a full DTMF Receiver that output latch are made available on the 4-bit output bus by integrates both band split filter and decoder functions into a raising the three state control input (OE) to a logic high. single 18-pin DIP or SOIC package. Manufactured using The steering circuit works in reverse to validate the inter CMOS process technology, the M-8870 offers low power digit pause between signals. Thus, as well as rejecting consumption (35 mW max) and precise data handling. Its signals too short to be considered valid, the receiver will filter section uses switched capacitor technology for both tolerate signal interruptions (dropouts) too short to be the high and low group filters and for dial tone rejection. Its considered a valid pause. This capability, together with the decoder uses digital counting techniques to detect and ability to select the steering time constants externally, decode all 16 DTMF tone pairs into a 4-bit code. External allows the designer to tailor performance to meet a wide component count is minimized by provision of an on-chip variety of system requirements. The input arrangement of differential input amplifier, the M-8870 provides a differential input operational clock generator, and amplifier as well as a bias source (VREF) to bias the inputs IN+ 1 18 VDD latched tri-state interface at mid-rail. Provision is made for connection of a feedback INST/GT bus. Minimal external resistor to the op-amp output (GS) for gain adjustment.The GS EST c o m p o n e n t s r e q u i r Differential Input Configuration bellow permits gain ed VREF i n c l u d e a l o w - c o s adjustment with the feedback resistor R5.The filter also t STD 3.579545 MHz color burst incorporates notches at 350 and 440 Hz, providing IC* 8870 Q4 crystal, a timing resistor, excellent dial tone rejection. Each filter output is followed IC* Q3 and a timing capacitor. The by a single-order switched capacitor section that smoothes OSC1 low and high group tones the signals prior to limiting. Signal limiting is performed by Q2 are separated by applying high gain comparators provided with hysteresis to prevent OSC2 Q1 the dual-tone signal to the VSS detection of unwanted low-level signals and noise. The inputs of two 6th order 9 10 OE MT-8870 decoder uses a digital

switched

bandpass Fig. 1 Pin Diagram Of Dtmf bandwidths that Decoder 8870

capacitor filters with correspond to

counting technique to determine the frequencies of the limited tones and to verify that they correspond to standard DTMF frequencies. When the detector recognizes the simultaneous presence of two valid tones (known as signal condition), it raises the Early Steering flag (ESt). Any subsequent loss of signal condition will cause ESt to fall. Before a decoded tone pair is registered, the receiver checks for valid signal duration (referred to as characterrecognition-condition). This check is performed by an external RC time constant driven by ESt. A short delay to allow the output latch to settle, the delayed steering output flag (StD) goes high, signaling that a received tone pair has been registered. The contents of the output latch are made available on the 4-bit output bus by raising the three state control input (OE) to logic high. Inhibit mode is enabled by a logic high input to pin 5 (INH). It inhibits the detection of 1633 Hz. The output code will remain the same as the previous detected code. On the M- 8870 models, this pin is tied to ground (logic low). The input arrangement of the MT-8870 provides a differential input operational amplifier as well as a bias source (VREF) to bias the inputs at mid-rail. Provision is made for connection of a feedback resistor to the op-amp output (GS) for gain adjustment. The internal clock circuit is completed with the addition of a standard 3.579545 MHz crystal. The input arrangement of the MT-8870 provides a differential input operational amplifier as well as a bias source (VREF) to bias the inputs at mid-rail. Provision is made for connection of a feedback resistor to the op-amp output (GS) for gain adjustment.

Working of EVM is very straight forward During initiallization it initiallize LCD to work in 8 bit mode. The ask user for password , it continously check port pin 15,16 and 17 to reterive the password after getting four digit it check the password with its value if it is correct then it proceed to next step other wise it ask for password again with a buzzer sound. If password was correct it ask you to change the password? If you want then it will change it otherwise you can proceed to voting mode. In voting mode there are five contender shown on 16X2 LCD display. For voting them you nedd to enter the appropriate code to vote them further you can see the total vote for each contender as well as vote reset option with the same passwod. Data stored is in flash memeory since PIC microcontroller has the ability to write its owm flash program memeory. Evet\ry thing is in code.

LCDLCDs can add a lot to your application in terms of providing a useful interface for the user, debugging an application, or just giving it a professional look. The most common type of LCD controller is the Hitachi 44780, which provides a relatively simple interface between a processor and an LCD. Using this interface is often not attempted by new designers and programmers because it is difficult to find good documentation on the interface, initializing the interface can be a problem, and the displays themselves are expensive. I have worked with Hitachi 44780-based LCDs for a while now and I don't believe any of these perceptions. LCDs can be added quite easily to an application and use as few as two digital output pins for control. As for cost, LCDs can be often pulled out of old devices or found in surplus stores for less than a dollar. The purpose of this section is to give a brief tutorial on how to interface with Hitachi

Table 1 Ground 2 Vcc 3 Contrast 4 Rs 5 RW 6 En 7-14 D0-D14 15 VA 16 VK

Set c u r s o r move d i r e c t i o n : ID I n c r e m e n t t h e c u r s o r a f t e r each b y t e w r i t t e n t o d i s p l a y i f s et S S h i f t d i s p l a y when b y t e w r i t t entodisplay Enable d i s p l a y l c u r s o rD Turn d i s p l a y o n ( l ) / o f f ( O ) C Turn c u r s o r o n ( l ) I o f f ( O ) BCursorblinkon(l)/off(O) Move c u r s o r l s h i f t d i s p l a y

SC D i s p l a y s h i f t o n ( l ) / o f f ( O ) RL D i r e c t i o n o f s h i f t r i g h t ( l ) l l eft(O) Set i n t e r f a c e l e n g t h DL Set d a t a i n t e r f a c e l e n g t h 8 ( 1)/4(0) N Number o f d i s p l a y l i n e s 1 ( 0 ) / 2(1) FCharacterfont5x10(1)/5~ 7(0) P o l l t h e busy f l a g BF T h i s b i t i s s e t w h i l e t h e LCD i sprocessing Move c u r s o r t o CGRAMldisplay A Address R e a d l w r i t e ASCII t o t h e d i s p l a y H Data

44780-based LCDs. I have tried to provide all of the data necessary for successfully adding LCDs to your application. In the book, I use Hitachi 44780-based LCDs for a number of different projects. The most common connector used for the 44780-based LCDs is 14 pins in a row, with pin centers 0.100" apart. The pins are wired as in Table.

As you would probably guess from this description, the interface is a parallel bus, allowing simple and fast

15 L C D

V A

V C

3

2

1

1 u . f

16

1 113 14 12 11 14 13 12 11 6 5 4

+ + 5V

3240 39 38 37 36 35 34 33 29 28 27

2 2 .k 125 24 23 141312118870

4MHZ

26

RS 22p T f 13 1 415

7

8 4

10 18

1 2 3.57MHZ

16

17

3+ 5V

6 9 1

5

33K .1uf 100K 100K+

PIC16f8777A

22pf

12

From Mobile Handfree Speaker SP+ and SP-

1 K 2 2 .k 2 2 .k 0.1uf

2

1 0 0 8 KLm358

2 31 1

1 5

10K 3 + 4

10K Connect1

TXF R1 D2230V

D11N4007X4

1 1 000uf

7805 2

3

TXF R2Fi . 3 : Circuit diagram of Microcontroller Based Electronic Voting Machine g

.1uf

Wait more t h a n 15 ms a f t e r power i s a p p l i e d . W r i t e 0x030 t o LCD and w a i t 5 ms f o r t h e i n s t r u c t i o n t o c o m plete. . W r i t e 0x030 t o LCD and w a i t 160 usecs f o r i n s t r u c t i o n t o c o m plete. 4) W r i t e 0x030 A G A I N t o LCD and w a i t 160 usecs o r P o l l t h e Busy F l ag. 5 . Set t h e O p e r a t i n g C h a r a c t e r i s t i c s o f t h e LCD. - W r i t e "Set I n t e r f a c e Length" - W r i t e 0x010 t o p r e v e n t s h i f t i n gaftercharacterwrite. - W r i t e 0x001 t o C l e a r t h e D i s p l ay - W r i t e "Set C u r s o r Move D i r e c t i on"SettingCursorBehavior Bits - W r i t e "Enable D i s p l a y l C u r s o r " & e n a b l e D i s p l a y and O p t i o n alCursor reading/writing of data to and from the LCD. Write an ASCII byte out to the LCD's screen. The ASCII code to be displayed is eight bits long and is sent to the LCD either four or eight bits at a time. If four-bit mode is used, two nybbles of data (sent high four bits and then low four bits with an E clock pulse with each nybble) are sent to make up a full eight-bit transfer. The E clock is used to initiate the data transfer within the LCD. Sending parallel data as either four or eight bits are the two primary modes of operation. Although there are secondary considerations and modes, deciding how to send the data to the LCD is the most crucial decision to be made for an LCD interface application. Eight-bit mode is best used when speed is required in an application and 10 110 pins are available. Four-bit mode requires six bits. To wire a microcontroller to

an LCD in four-bit mode, just the top four bits (DB4-7) are written to. The RJS bit is used to select whether data or an instruction is being transferred between the microcontroller and the LCD. If the bit is set, then the byte at the current LCD cursor position can be read or written. When the bit is reset, either an instruction is being sent to the LCD or the execution status of the last instruction is read back (whether or not it has completed). The bit descriptions for the different commands are: Reading data back is best used in applications that require data to be moved back and forth on the LCD (such as in applications that scroll data between lines). The busy flag can be polled to determine when the last instruction that has been sent has completed processing. For most applications, there really is no reason to read from the LCD. I usually tie RIW to ground and just wait the maximum amount of time for each instruction (4.1 ms for clearing the display or moving the cursor/display to the home position, 160 ps for all other commands). As well as making my application software simpler, it also frees up a microcontroller pin for other uses. Different LCDs execute instructions at different rates and to avoid problems later on (such as if the LCD is changed to a slower unit), I recommend just using the maximum delays listed here. In terms of options, I have never seen a 5x10 pixel character LCD display. This means that the F bit in the set interface instruction should always be reset (equal to 0). Before you can send commands or data to the LCD module, the module must be initialized. For eight-bit mode, this is done using the following series of operations

MicrocontrllerGenerally PIC architecture increases in complexity and power, so does the size, intricacy, and cost of the devices. For many purposes an 80-pin PIC with 64Kbytes of program memory, 1K EERPOM, 70 I/O ports, 16 A/D

Program Address

Data Address

Program Memory SpaceInstruction Bus

PIC CPUData Bus

Data Memory

channels, is more complex than necessary. In fact, some high-end PICs appear to be closer to microprocessors than to microcontrollers. Furthermore, the programming complexity of these high-end PICs is also much greater than their mid-range counterparts because their instruction set has double the number of instructions and the assembly language itself is more difficult to learn and follow. Finally, the circuits in which we typically find the high-end devices are more advanced and elaborate and their design requires greater engineering skills. For these reasons, and for the natural space limitations of a single volume, we do not discuss the high-performance family or 8-bit PICs nor any of the 16-bit products. It can be argued that the baseline PICs do find extensive use and are quite practical for many applications. Although this is true, the baseline PICs are quite similar in architecture and programming to their mid-range relatives. In most cases the difference between a baseline and mid-range device is that the low-end one lacks some features or has less program space or storage. So someone familiar with the mid-range devices can easily port their knowledge to any of the simpler baseline Products. Our conclusion has been to limit the coverage to the mid-range family of PICs. Within this family we have concentrated our attention on the two most used, documented, and popular PICs: the 16F84 (also 16F84A) and the 16F877A. The F84 sets the lower limit of complexity and sophistications and the F877 the higher limit. Processor Architecture and Design PIC microcontrollers are unique in many ways.We start by mentioning several general characteristics of the PIC: Harvard architecture, RISC processor design, single-word instructions, machine and data memory configuration, and characteristic instruction Formats. Harvard Architecture The PIC microcontrollers do not use the conventional von Neumann architecture but a different hardware design often referred to as Harvard architecture. Originally, Harvard architecture referred to a computer design in which data and instruction used different signal paths and storage areas. In other words, data and instructions are not located in the same memory area but in separate ones. One consequence of the traditional von Neumann architecture is that the processor can either read or write instructions or data but cannot do both at the same time, since both instructions and data use the same signal lines. In a machine with a Harvard architecture, on the other hand, the processor can read and write instructions and data to and from memory at the same time. This results in a faster, albeit more The most recent arguments in favor of the Harvard architecture are based on the access speed to main memory. Making a CPU faster while memory accesses remain at the same speed represents little total gain, especially if many memory accesses

are required. This situation is often referred to as the von Neumann bottleneck and machines that suffer from it are said to be memory bound.complex, machine. Several generations of microcontrollers, including the Microchip PICs, have been based on the Harvard architecture. These processors have separate storage for program and data and a reduced instruction set. The midrange PICs, in particular, have 8-bit data words but either 12-, 14-, or 16-bit program instructions. Since the instruction size is much wider than the data size, an instruction can contain a full-size data Constant. RISC CPU Design The CISC (Complete Instruction Set Computer) design is based on each low-level instruction performing several operations. For example, one Intel 80x86 opcode can decrement a counter register, determine the state of a processor flag, and execute a jump instruction if the flag is set or cleared. Another CISC instruction moves a number of bytes of data contained in a counter register from an area pointed at by a source register, into another area pointed at by a destination register. Any popular Intel CISC CPU contains about 120 primitive operations in its instruction set. The original design idea of the CISC architecture was to provide high-level instructions in order to facilitate the implementation of high-level languages. Supposedly, this would be achieved through complex instruction sets, multiple addressing modes, and primitive operations that performed multiple functions. However, some argued that the CISC architecture did not result in better performance. Furthermore, the more complex the instruction set resulted in greater decoding time. At the same time, implementing large instruction sets required more silicon space and considerably more design effort. Some CISC processors developed in the 1960s and 70s are the IBM System/360, the PDP-11, the Motorola 68000 family, and Intel 80x86 CPUs. In contrast, a RISC (Reduced Instruction Set Computer) machine contains fewer instructions and each instruction performs more elementary operations. Consequences of this are a smaller silicon area, faster execution, and reduced program size with fewer accesses to main memory. The PIC designers have followed the RISC route. Other CPUs with RISC design are the MIPS, the IBM Power PC, and the DEC Alpha. Single-word InstructionsOne of the consequences of the PICs Harvard architecture is that the instructions can

be wider than the 8-bit data size. Since the device has separate buses for instructionsand data, it is possible for instructions to be sized differently than data items. Being able to vary the number of bits in each instruction opcode makes possible the optimization of program memory and the use of single-word instructions that can be fetched in one bus cycle. In the mid-range PICs each instruction is 14-bits wide and every fetch operation brings into the execution unit one

complete operation code. Since each instruction takes up one 14-bit word, the number of words of program memory in a device exactly equals the number of program instructions that can be stored. In a von Neumann machine, instruction storage and fetching becomes a much more complicated issue. Since von Neumann instructions can span multiple bytes, there is no assurance that each program memory location contains the first opcode of a multi-byte instruction. As in conventional processors, the PIC architecture has a two-stage instruction pipeline; however, since the fetch of the current instruction and the execution of the previous one can overlap in time, one complete instruction is fetched and executed at every machine cycle. This is known as instruction pipelining. Since each instruction is 14-bits wide and the program memory bus is also 14-bits wide, each instruction contains all the necessary information, so it can be executed without any additional fetching. The one exception is when an instruction modifies the contents of the Program Counter. In this case, a new instruction must be fetched, requiring an additional machine cycle. The PIC clocking system is designed so that an instruction is fetched, decoded, and executed every four clock cycles. In this manner, a PIC equipped with a 4MHz oscillator clock beats at a rate of 0.25 s. Since each instruction executes at every four clock cycles, each instruction takes 1 s.. Oscillator Mid-range PICs require an external device to produce the clock cycles required for its operation. The PIC executes an instruction every four clock cycles, so the oscillator speed determines the device performance.

Mid-range PICs support up to eight different oscillator modes. For example, in the 16F877, any of the eight modes can be used, while in the 16F84 only four oscillator modes are available. The oscillator mode is selected at device programming time and cannot be changed at runtime. The configuration bits, which are non-volatile flags set during device programming, determine which oscillator mode is used by the program, among the following: 1. LP Low Frequency Crystal 2. XT Crystal Resonator 3. HS High Speed Crystal Resonator 4. RC External Resistor/Capacitor 5. EXTRC External Resistor/Capacitor 6. EXTRC External Resistor/Capacitor with CLKOUT 7. INTRC Internal 4 MHz Resistor/Capacitor 8. INTRC Internal 4 MHz Resistor/Capacitor with CLKOUT The resistor/capacitor oscillator option is the least expensive to implement, but also the least accurate one. This option is used only in systems where clock accuracy and consistency are not issues. The low-power frequency crystal option is the one with lowest power consumption and can be used in systems where the power consumption element is important. The first three oscillator modes (LP, XT, and HS) allow selecting different frequency ranges. The HS option has the highest frequency range and consumes the most power. The XT option is based on a standard crystal resonator and has a mid-range power consumption. The LP option has low gain and consumes the least power of the three crystal modes. The general rule is to use the oscillator with the lowest possible gain that still meets the circuit require ments. The RC mode with EXTRC and CLKOUT features has the same functionality as the straight RC oscillator Option. The XT option (crystal resonator) can be purchased in a ceramic package. This device, called a ceramic resonator, contains three pins. The ones on the extremes are connected to the corresponding oscillator input lines on the PIC, labeled OSC1 and OSC2. The reset mechanism places the PIC in a known condition. The reset mechanism is used to gain control of a runaway or hung-up program, as a forced interrupt in program execution, or to make the device ready at program load time. The processors !MCLR pin produces the reset action when it reads logic zero. The exclamation sign preceding

the pins name (or a line over it) indicates that the action is active-low. To prevent accidental resets the !MCLR pin must be connected to the positive voltage supply through a 5K or 10K resistor. When a resistor serves to place a logic one on a line it is called a pull-up resistor. The mid-range PICs are capable of several reset actions: 1. Reset during power on (POR). 2. !MCLR reset during normal operation. 3. Reset during SLEEP mode. 4. Watchdog timer reset (WDT). 5. Brown-out reset (BOR). 6. Parity error reset. The first two reset sources in the preceding list are the most common. POR reset serves to bring all PIC registers to an initial state, including the program counter register. The second source of reset action takes place when the !MCLR line is intentionally brought down, usually by the action of a push-button reset switch. This switch is useful during program development since it provides a way of forcefully restarting execution. Figure shows a typical wiring of the !MCLR line to provide a reset action The second one is a product of purposefully bringing-in a logical zero to the MCLR pin during normal operation of the microcontroller. This second one is often used in program development. User RAM memory is not affected by a reset. The GPRs (general purpose register) are in an unknown state during power-up and are not changed by reset. SFR registers, on the other hand, are reset to an initial state. The initialization conditions for each of the SFRs are found in the device data sheet. The most important of these is the program count (PC) which is reset to zero. This action directs execution to the first instruction and effectively restarts the program. During power-up the processor itself initiates a reset and the power supply voltage increases from 1.2 to 1.8V. Several bits in various registers are related to the reset action, but these are not available in all mid-range devices. For example, some high-end devices in the mid-range group, such as the 16F87x, contain two resetrelated bits in the PCON register. One of them (named !POR) determines the power-on reset status...


CHAPTER 4 COST ANALYSIS & TROUBLESHOOTINGCOST ANALYSIS OF COMPONENTS USEDTable no. 4.1: Cost Analysis

Sr. no1 2 3 4 5 6 7 8 9 10 11 12 13 14

EquipmentIC 16F877A MC IC MT8870DE IC ATMEL LM358 Voltage Regulator 7805 2 line LCD display Transformer Crystal Oscillator Switch LED Resistors(1K,10K,47k,100K,330k,) Capacitors(22pf,.1f,10f,470f,1000f) Diodes Mobile Speaker Port Mobile MIC Port TOTAL

Quantity1 1 1 1 1 1 2 2 2 10 17 5 1 1

Rate (in Rs.)120 80 85 20 150 60 10 8 6 15 25 10 20 20 629


(34)


PROBLEM FACED First problem that was in making the circuit of METRO TRAIN PROTOTYPE that, it is difficult to match time with rotation of stepper motor & LCD.

Second problem is faced due to redundancy in handling the rotation of STEPPER MOTOR We have to take extra care while soldering 2 line LCD During soldering, many of the connection become short cktd. So we desolder the connection and did soldering again. A leg of the crystal oscillator was broken during mounting. So it has to be replaced.

LED`s get damaged when we switched ON the supply so we replace it by the new one.

TROUBLESHOOT Care should be taken while soldering. There should be no shorting of joints. Proper power supply should maintain. Project should be handled with care since IC are delicate Component change and check again circuit



CHAPTER 5 CONCULSIONFUTURE SCOPE Number of candidates could be increased by using other microcontroller. It could be interfaced with printer to get the hard copy of the result almost instantly from the machine itself. It could also be interfaced with the personal computer and result could be stored in the

central server and its backup could be taken on the other backend servers. Again, once the result is on the server it could be relayed on the network to various offices of the election conducting authority. Thus our project could make the result available any corner of the world in a matter of seconds

AREA OF APPLICATIONS Fast track voting which could be used in small scale elections, like resident welfare association, panchayat level election and other society level elections. It could also be used to conduct opinion polls during annual share holders meeting. It could also be used to conduct general assembly elections where number of candidates are less than or equal to eight in the current situation. It is used in various TV serials as for public opinion.



REFRENCES

Muhammad Ali Mazidi , Janice Gillispie Mazidi, Rolin D. Mckinlay. Second edition, THE 8051 MICROCONTROLLER AND EMBEDDED SYSTEM K. J. Ayala. Third edition, The 8051 MICROCONTROLLERTutorial on microcontroller: www.8051projects.net/microcontroller_tutorials/

Tutorial on LCD: www.8051projects.net/lcd-interfacing/

WEBSITES www.atmel.com www.seimens.com www.howstuffworks.com www.alldatasheets.com www.efyprojects.com www.google.com www.eci.gov.in/Audio_VideoClips/presentation/EVM.ppt www.rajasthan.net/election/guide/evm.htm www.indian-elections.com/electoralsystem/electricvotingmachine.html



APPENDIXCODING SOFTWARE:#include #include #include #include #include #include #include #define DTMF_PORT P1

#define DTMF_READY P3_BITS.B2 #define TIMER0_INT#define DELAY1 #define RESET_KEY

ET0(65536 - 50000)

P2_BITS.B7

void interrupt dtmf_isr(void); void interrupt timer0_isr(void);void on_ack(void); void off_ack(void); const char msg_1[] = {"***WELCOME TO***"}; const char msg_2[] = {" MOBILE VOTING. "}; const char msg_3[] = {" TOTAL VOTE "}; const char msg_4[] = {"CANDIDATE-1 VOTE"}; const char msg_5[] = {"CANDIDATE-2 VOTE"}; const char msg_6[] = {"CANDIDATE-3 VOTE"}; const char msg_7[] = {"CANDIDATE-4 VOTE"};DEPARTMENT OF ELECTRONICS & COMMUICATION ENGG. BHABHA INSTITUTE OF TECHNOLOGY,RAMABAINAGAR (38)


const char msg_8[] = {"NEW VOTER ONLINE"}; const char msg_9[] = {"Please Wait....."};

const char msg_10[] = {" Invalid Vote "}; const char msg_11[] = {"Ask to Try Again"}; const char msg_12[] = {" VOTE CASTED "};const char msg_13[] = {" SUCCESSFULLY "}; const char msg_14[] = {"SYSTEM RESET IN "}; const char msg_15[] = {"PROCESS PLS WAIT"};

unsigned char dtmf_data,dtmf_sts,page_add,data_add,data_status; unsigned char VoteTotal,VoteC1,VoteC2,VoteC3,VoteC4; unsigned char Data1,Data2,Data3,Data4,Data5,DataCounter; unsigned int Timer;

void main() { P0 = 0xff; P1 = 0xff; P2 = 0xff; P3 = 0xff; VoteTotal = 0; VoteC1 = 0; VoteC2 = 0; VoteC3 = 0; VoteC4 = 0; ACK_SIGNAL = OFF;DEPARTMENT OF ELECTRONICS & COMMUICATION ENGG. BHABHA INSTITUTE OF TECHNOLOGY,RAMABAINAGAR (39)


DTMF_READY = ON; DTMF_PORT = 0xff; DTMF_INT = 0; ET0 = 0; ET1 = 0; TR0 = 0; do { if(!RESET_KEY) { Timer = 50; while((Timer > 0) && (! RESET_KEY)); if(Timer == 0) {wr_lcd_cmd(LINE1); wr_lcd_data(msg_14[]);

wr_lcd_cmd(LINE2); wr_lcd_data(msg_15[]);

for(data_add = 0;data_add < 255;data_add++) { write_eprom(0x00,data_add,0x00); } } }DEPARTMENT OF ELECTRONICS & COMMUICATION ENGG. BHABHA INSTITUTE OF TECHNOLOGY,RAMABAINAGAR (40)


if(!TOTAL_KEY) { VoteC1 = 0; VoteC2 = 0; VoteC3 = 0; VoteC4 = 0; VoteTotal = 0; for(data_add = 0;data_add < 100;data_add++) {data_status = read_eprom(0x00,data_add); if(data_status == 1)

{ VoteC1++; VoteTotal++; } else if(data_status == 2) { VoteC2++; VoteTotal++; } else if(data_status == 3) { VoteC3++; VoteTotal++; }(DEPARTMENT OF ELECTRONICS & COMMUICATION ENGG. BHABHA INSTITUTE OF TECHNOLO

Highly Advance Voting Machine

Documents

project report

project guide

advance voting machine

electronic voting machine

singh vaish khan vashim

tech degree

award of degree b

introduction chapter