High-Voltage, High-Current Operational Amplifier (Rev. E) · PDF fileOPA549 High-Voltage, High-Current OPERATIONAL AMPLIFIER DESCRIPTION The OPA549 is a low-cost, high-voltage/high-current

OPA549

High-Voltage, High-CurrentOPERATIONAL AMPLIFIER

DESCRIPTIONThe OPA549 is a low-cost, high-voltage/high-current opera-tional amplifier ideal for driving a wide variety of loads. Thislaser-trimmed monolithic integrated circuit provides excellentlow-level signal accuracy and high output voltage and current.

The OPA549 operates from either single or dual supplies fordesign flexibility. The input common-mode range extendsbelow the negative supply.

The OPA549 is internally protected against over-temperatureconditions and current overloads. In addition, the OPA549provides an accurate, user-selected current limit. Unlikeother designs which use a “power” resistor in series with theoutput current path, the OPA549 senses the load indirectly.This allows the current limit to be adjusted from 0A to 10Awith a resistor/potentiometer, or controlled digitally with avoltage-out or current-out Digital-to-Analog Converter (DAC).

The Enable/Status (E/S) pin provides two functions. It can bemonitored to determine if the device is in thermal shutdown,and it can be forced low to disable the output stage andeffectively disconnect the load.

The OPA549 is available in an 11-lead power package. Itscopper tab allows easy mounting to a heat sink for excellentthermal performance. Operation is specified over the ex-tended industrial temperature range, –40°C to +85°C.

FEATURES HIGH OUTPUT CURRENT:

8A Continuous10A Peak

WIDE POWER-SUPPLY RANGE:Single Supply: +8V to +60VDual Supply: ±4V to ±30V

WIDE OUTPUT VOLTAGE SWING

FULLY PROTECTED:Thermal ShutdownAdjustable Current Limit

OUTPUT DISABLE CONTROL

THERMAL SHUTDOWN INDICATOR

HIGH SLEW RATE: 9V/µs

CONTROL REFERENCE PIN

11-LEAD POWER PACKAGE

APPLICATIONS VALVE, ACTUATOR DRIVERS

SYNCHRO, SERVO DRIVERS

POWER SUPPLIES

TEST EQUIPMENT

TRANSDUCER EXCITATION

AUDIO POWER AMPLIFIERS

OPA549

V+

E/S

RCL

RCL sets the current limitvalue from 0A to 10A.(Very Low Power Dissipation)

ILIM

VO

V–

Ref

ES PinForced Low: Output disabled.Indicates Low: Thermal shutdown.

OPA549

OPA549

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PRODUCTION DATA information is current as of publication date.Products conform to specifications per the terms of Texas Instrumentsstandard warranty. Production processing does not necessarily includetesting of all parameters.

Copyright © 1999-2005, Texas Instruments Incorporated

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications ofTexas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

SBOS093E – MARCH 1999 – REVISED OCTOBER 2005

All trademarks are the property of their respective owners.

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Output Current ................................................ See SOA Curve (Figure 6)Supply Voltage, V+ to V– ................................................................... 60VInput Voltage Range ....................................... (V–) – 0.5V to (V+) + 0.5VInput Shutdown Voltage ................................................... Ref – 0.5 to V+Operating Temperature .................................................. –40°C to +125°CStorage Temperature .....................................................–55°C to +125°CJunction Temperature ...................................................................... 150°CLead Temperature (soldering, 10s) ................................................. 300°CESD Capability (Human Body Model) ............................................. 2000V

NOTE: (1) Stresses above these ratings may cause permanent damage.Exposure to absolute maximum conditions for extended periods may de-grade device reliability.

CONNECTION DIAGRAM

–In

+In Ref ILIM

E/S

V+VO

1 3 5 7 9 11

2 4 6 8 10

V–

Tab connected to V–. Do not use to conduct current.

Connect both pins 1 and 2 to output.Connect both pins 5 and 7 to V–.Connect both pins 10 and 11 to V+.

ABSOLUTE MAXIMUM RATINGS(1)

For the most current package and ordering information, seethe Package Option Addendum at the end of this datasheetor see the TI website at www.ti.com.

PACKAGE/ORDERING INFORMATION

ELECTROSTATICDISCHARGE SENSITIVITY

This integrated circuit can be damaged by ESD. Texas Instru-ments recommends that all integrated circuits be handled withappropriate precautions. Failure to observe proper handlingand installation procedures can cause damage.

ESD damage can range from subtle performance degradationto complete device failure. Precision integrated circuits may bemore susceptible to damage because very small parametricchanges could cause the device not to meet its publishedspecifications.

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ELECTRICAL CHARACTERISTICSBoldface limits apply over the specified temperature range, TA = –40°C to +85°C.At TCASE = +25°C, VS = ±30V, Ref = 0V, and E/S pin open, unless otherwise noted.

OPA549T, S

PARAMETER CONDITION MIN TYP MAX UNITS

OFFSET VOLTAGE VOSInput Offset Voltage VCM = 0V, IO = 0 ±1 ±5 mV

vs Temperature dVOS/dT TCASE = –40°C to +85°C ±20 µV/°Cvs Power Supply PSRR VS = ±4V to ±30V, Ref = V– 25 100 µV/V

INPUT BIAS CURRENT(1)

Input Bias Current(2) IB VCM = 0V –100 –500 nAvs Temperature TCASE = –40°C to +85°C ±0.5 nA/°C

Input Offset Current IOS VCM = 0V ±5 ±50 nA

NOISEInput Voltage Noise Density en f = 1kHz 70 nV/√HzCurrent Noise Density in f = 1kHz 1 pA/√Hz

INPUT VOLTAGE RANGECommon-Mode Voltage Range: Positive VCM Linear Operation (V+) – 3 (V+) – 2.3 V

Negative VCM Linear Operation (V–) – 0.1 (V–) – 0.2 VCommon-Mode Rejection Ratio CMRR VCM = (V–) – 0.1V to (V+) – 3V 80 95 dB

INPUT IMPEDANCEDifferential 107 || 6 Ω || pFCommon-Mode 109 || 4 Ω || pF

OPEN-LOOP GAINOpen-Loop Voltage Gain AOL VO = ±25V, RL = 1kΩ 100 110 dB

VO = ±25V, RL = 4Ω 100 dB

FREQUENCY RESPONSEGain Bandwidth Product GBW 0.9 MHzSlew Rate SR G = 1, 50Vp-p Step, RL = 4Ω 9 V/µsFull-Power Bandwidth See Typical CurveSettling Time: ±0.1% G = –10, 50V Step 20 µsTotal Harmonic Distortion + Noise(3) THD+N f = 1kHz,RL = 4Ω,G = +3, Power = 25W 0.015 %

OUTPUTVoltage Output, Positive IO = 2A (V+) – 3.2 (V+) – 2.7 V

Negative IO = –2A (V–) + 1.7 (V–) + 1.4 VPositive IO = 8A (V+) – 4.8 (V+) – 4.3 VNegative IO = –8A (V–) + 4.6 (V–) + 3.9 VNegative RL = 8Ω to V– (V–) + 0.3 (V–) + 0.1 V

Maximum Continuous Current Output: dc(4) ±8 Aac(4) Waveform Cannot Exceed 10A peak 8 A rms

Output Current LimitCurrent Limit Range 0 to ±10 ACurrent Limit Equation ILIM = 15800 • 4.75V/(7500Ω + RCL) ACurrent Limit Tolerance(1) RCL = 7.5kΩ (ILIM = ±5A), RL = 4Ω ±200 ±500 mA

Capacitive Load Drive (Stable Operation) CLOAD See Typical CurveOutput Disabled

Leakage Current Output Disabled, VO = 0V –2000 ±200 +2000 µAOutput Capacitance Output Disabled 750 pF

OUTPUT ENABLE/STATUS (E/S) PINShutdown Input Mode

VE/S High (output enabled) E/S Pin Open or Forced High (Ref) + 2.4 VVE/S Low (output disabled) E/S Pin Forced Low (Ref) + 0.8 VIE/S High (output enabled) E/S Pin Indicates High –50 µAIE/S Low (output disabled) E/S Pin Indicates Low –55 µA

Output Disable Time 1 µsOutput Enable Time 3 µsThermal Shutdown Status Output

Normal Operation Sourcing 20µA (Ref) + 2.4 (Ref) + 3.5 VThermally Shutdown Sinking 5µA, TJ > 160°C (Ref) + 0.2 (Ref) + 0.8 V

Junction Temperature, Shutdown +160 °CReset from Shutdown +140 °C

Ref (Reference Pin for Control Signals)Voltage Range V– (V+) – 8 VCurrent(2) –3.5 mA

POWER SUPPLYSpecified Voltage VS ±30 VOperating Voltage Range, (V+) – (V–) 8 60 VQuiescent Current IQ ILIM Connected to Ref IO = 0 ±26 ±35 mAQuiescent Current in Shutdown Mode ILIM Connected to Ref ±6 mA

TEMPERATURE RANGESpecified Range –40 +85 °COperating Range –40 +125 °CStorage Range –55 +125 °CThermal Resistance, θJC 1.4 °C/WThermal Resistance, θJA No Heat Sink 30 °C/W

NOTES: (1) High-speed test at TJ = +25°C. (2) Positive conventional current is defined as flowing into the terminal. (3) See “Total Harmonic Distortion + Noise vsFrequency” in the Typical Characteristics section for additional power levels. (4) See “Safe Operating Area” (SOA) in the Typical Characteristics section.

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TYPICAL CHARACTERISTICSAt TCASE = +25°C, VS = ±30V, and E/S pin open, unless otherwise noted.

–60 –40 –20 0 20 40 60 80 140120100

–130

–120

–110

–100

–90

–80

–70

–60

–50

–40

Inpu

t Bia

s C

urre

nt (

nA)

Temperature (°C)

INPUT BIAS CURRENT vs TEMPERATURE

–IB

+IB

–30 –20 –10 0 10 20 30

–200

–180

–160

–140

–120

–100

–80

–60

–40

–20

–0

Inpu

t Bia

s C

urre

nt (

nA)

Common-Mode Voltage (V)

INPUT BIAS CURRENTvs COMMON-MODE VOLTAGE

1 10 100 1k 10k 100k 1M 10M

120

100

80

60

40

20

0

–20

–40

0

–20

–40

–60

–80

–100

–120

–140

–160

Gai

n (d

B)

Pha

se (

°)

Frequency (Hz)

OPEN-LOOP GAIN AND PHASEvs FREQUENCY

0 5 10 15 20 25 30

9

8

7

6

5

4

3

2

1

0

Cur

rent

Lim

it (A

)

Supply Voltage (V)

CURRENT LIMIT vs SUPPLY VOLTAGE

+ILIM, 5A

–ILIM, 5A

+ILIM, 2A

–ILIM, 2A

+ILIM, 8A

–ILIM, 8A

–75 –50 –25 0 25 50 75 100 125

30

25

20

15

10

5

0

Qui

esce

nt C

urre

nt (

mA

)

Temperature (°C)

QUIESCENT CURRENT vs TEMPERATURE

VS = ±30V

VS = ±5V

IQ Shutdown (output disabled)

–75 –50 –25 0 25 50 75 100 125

9

8

7

6

5

4

3

2

1

0

Cur

rent

Lim

it (A

)

Temperature (°C)

CURRENT LIMIT vs TEMPERATURE

5A

2A

8A

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TYPICAL CHARACTERISTICS (Cont.)At TCASE = +25°C, VS = ±30V, and E/S pin open, unless otherwise noted.

1 10 100 1k 10k 100k

300

250

200

150

100

50

0

Vol

tage

Noi

se (

nV/√

Hz)

Frequency (Hz)

VOLTAGE NOISE DENSITY vs FREQUENCY

10 100 1k 10k 100k 1M

120

100

80

60

40

20

0

Pow

er-S

uppl

y R

ejec

tion

Rat

io (

dB)

Frequency (Hz)

POWER-SUPPLY REJECTION RATIOvs FREQUENCY

–PSRR

+PSRR

–75 –50 0 50 100

AOL

125

120

110

100

90

80

AO

L, C

MR

R, P

SR

R (

dB)

Temperature (°C)

OPEN-LOOP GAIN, COMMON-MODE REJECTION RATIO,AND POWER-SUPPLY REJECTION RATIO

vs TEMPERATURE

CMRR

PSRR

20 100 1k 10k 20k

1

0.1

0.01

0.001

TH

D+

N (

%)

Frequency (Hz)

TOTAL HARMONIC DISTORTION + NOISEvs FREQUENCY

G = +3RL = 4Ω

0.1W 1W

10W

75W

–75 –50 –25 0 25 50 75 100 125

1

0.9

0.8

0.7

0.6

0.5

0.4

0.3

0.2

0.1

0

16

15

14

13

12

11

10

9

8

7

6

Gai

n-B

andw

idth

Pro

duct

(M

Hz)

Sle

w R

ate

(V/µ

s)

Temperature (°C)

GAIN-BANDWIDTH PRODUCT ANDSLEW RATE vs TEMPERATURE

SR+

SR–

GBW

10 100 1k 10k 100k

100

90

80

70

60

50

40

Com

mon

-Mod

e R

ejec

tion

(dB

)

Frequency (Hz)

COMMON-MODE REJECTION RATIO vs FREQUENCY

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TYPICAL CHARACTERISTICS (Cont.)At TCASE = +25°C, VS = ±30V, and E/S pin open, unless otherwise noted.

5

4

3

2

1

0

VS

UP

PLY

–

VO

UT

(V)

Temperature (°C)

OUTPUT VOLTAGE SWING vs TEMPERATURE

–75 –50 –25 0 25 50 75 100 125

IO = +8A

IO = –8A

IO = +2A

IO = –2A

1k 10k 100k 1M

30

25

20

15

10

5

0

Out

put V

olta

ge (

Vp)

Frequency (Hz)

MAXIMUM OUTPUT VOLTAGE SWINGvs FREQUENCY

Maximum outputvoltage without

slew rate-induceddistortion.

0 2 4 6 8 10

5

4

3

2

1

0

VS

UP

PLY

–

VO

UT

(V)

Output Current (A)

OUTPUT VOLTAGE SWING vs OUTPUT CURRENT

(V+) – VO

(V–) – VO

–40 –30 –20 –10 0 10 20 4030

5

4

3

2

1

0

–1

–2

–3

–4

–5

Leak

age

Cur

rent

(m

A)

Output Voltage (V)

OUTPUT LEAKAGE CURRENTvs APPLIED OUTPUT VOLTAGE

RCL = ∞

RCL = 0

Leakage current with output disabled.

OFFSET VOLTAGEPRODUCTION DISTRIBUTION

Per

cent

of A

mpl

ifier

s (%

)

Offset Voltage (mV)

–4.7

–4.2

3–3

.76

–3.2

9–2

.82

–2.3

5–1

.88

–1.4

1–0

.94

–0.4

7 00.

470.

941.

411.

882.

352.

823.

293.

764.

23 4.7

25

20

15

10

5

0

OFFSET VOLTAGE DRIFTPRODUCTION DISTRIBUTION

Per

cent

of A

mpl

ifier

s (%

)

Offset Voltage (µV/°C)

0 4 8 12 16 20 24 28 32 36 40 44 48 52 56 60 64 68 72 76 80 84

25

20

15

10

5

0

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TYPICAL CHARACTERISTICS (Cont.)At TCASE = +25°C, VS = ±30V, and E/S pin open, unless otherwise noted.

0 5k 10k 15k 20k 25k 30k 35k

70

60

50

40

30

20

10

0

Ove

rsho

ot (

%)

Load Capacitance (pF)

SMALL-SIGNAL OVERSHOOTvs LOAD CAPACITANCE

G = –1

G = +1

LARGE-SIGNAL STEP RESPONSEG = 3, CL = 1000pF

10V

/div

5µs/div

SMALL-SIGNAL STEP RESPONSEG = 1, CL = 1000pF

50m

V/d

iv

2.5µs/div

SMALL-SIGNAL STEP RESPONSEG = 3, CL = 1000pF

100m

V/d

iv

2.5µs/div

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APPLICATIONS INFORMATIONFigure 1 shows the OPA549 connected as a basic noninvertingamplifier. The OPA549 can be used in virtually any op ampconfiguration.

Power-supply terminals should be bypassed with low seriesimpedance capacitors. The technique shown in Figure 1, usinga ceramic and tantalum type in parallel, is recommended.Power-supply wiring should have low series impedance.

Be sure to connect both output pins (pins 1 and 2).

CONTROL REFERENCE (Ref) PIN

The OPA549 features a reference (Ref) pin to which the ILIM

and the E/S pin are referred. Ref simply provides a referencepoint accessible to the user that can be set to V–, ground, orany reference of the user’s choice. Ref cannot be set belowthe negative supply or above (V+) – 8V. If the minimum VS

is used, Ref must be set at V–.

ADJUSTABLE CURRENT LIMIT

The OPA549’s accurate, user-defined current limit can be setfrom 0A to 10A by controlling the input to the ILIM pin. Unlikeother designs, which use a power resistor in series with theoutput current path, the OPA549 senses the load indirectly.This allows the current limit to be set with a 0µA to 633µAcontrol signal. In contrast, other designs require a limitingresistor to handle the full output current (up to 10A in thiscase).

Although the design of the OPA549 allows output currents upto 10A, it is not recommended that the device be operatedcontinuously at that level. The highest rated continuouscurrent capability is 8A. Continuously running the OPA549 atoutput currents greater than 8A will degrade long-term reli-ability.

Operation of the OPA549 with current limit less than 1Aresults in reduced current limit accuracy. Applications requir-ing lower output current may be better suited to the OPA547or OPA548.

Resistor-Controlled Current Limit

See Figure 2a for a simplified schematic of the internalcircuitry used to set the current limit. Leaving the ILIM pin openprograms the output current to zero, while connecting ILIM

directly to Ref programs the maximum output current limit,typically 10A.

With the OPA549, the simplest method for adjusting thecurrent limit uses a resistor or potentiometer connectedbetween the ILIM pin and Ref according to Equation 1:

R75kVI

– 7.5kCLLIM

= Ω (1)

Refer to Figure 2 for commonly used values.

Digitally-Controlled Current Limit

The low-level control signal (0µA to 633µA) also allows thecurrent limit to be digitally controlled by setting either acurrent (ISET) or voltage (VSET). The output current ILIM can beadjusted by varying ISET according to Equation 2:

ISET = ILIM/15800 (2)

Figure 2b demonstrates a circuit configuration implementingthis feature.

The output current ILIM can be adjusted by varying VSET

according to Equation 3:

VSET = (Ref) + 4.75V – (7500W)(ILIM)/15800 (3)

Figure 11 demonstrates a circuit configuration implementingthis feature.

FIGURE 1. Basic Circuit Connections.

POWER SUPPLIES

The OPA549 operates from single (+8V to +60V) or dual(±4V to ±30V) supplies with excellent performance. Mostbehavior remains unchanged throughout the full operatingvoltage range. Parameters that vary significantly with operat-ing voltage are shown in the Typical Characteristics. Someapplications do not require equal positive and negative out-put voltage swing. Power-supply voltages do not need to beequal. The OPA549 can operate with as little as 8V betweenthe supplies and with up to 60V between the supplies. Forexample, the positive supply could be set to 55V with thenegative supply at –5V. Be sure to connect both V– pins(pins 5 and 7) to the negative power supply, and both V+pins (pins 10 and 11) to the positive power supply.Package tab is internally connected to V–; however, donot use the tab to conduct current.

G = 1+ R2

R1

ZL

E/S

8

9

10, 11

3

4

5, 76

1, 2

R2

ILIM(1)Ref

R1

0.1µF(2)

10µF

OPA549

V–

V+

+

+

VIN

10µF

0.1µF(2)

VO

NOTES: (1) ILIM connected to Ref gives the maximum current limit, 10A (peak). (2) Connect capacitors directly to package power-supply pins.

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FIGURE 2. Adjustable Current Limit.

ENABLE/STATUS (E/S) PIN

The Enable/Status Pin provides two unique functions:1) output disable by forcing the pin low, and 2) thermalshutdown indication by monitoring the voltage level at thepin. Either or both of these functions can be utilized in anapplication. For normal operation (output enabled), the E/Spin can be left open or driven high (at least 2.4V above Ref).A small value capacitor connected between the E/S pin andCREF may be required for noisy applications.

Output Disable

To disable the output, the E/S pin is pulled to a logic low (nogreater than 0.8V above Ref). Typically the output is shut downin 1µs. To return the output to an enabled state, the E/S pinshould be disconnected (open) or pulled to at least 2.4V aboveRef. It should be noted that driving the E/S pin high (outputenabled) does not defeat internal thermal shutdown; however,it does prevent the user from monitoring the thermal shutdownstatus. Figure 3 shows an example implementing this function.

This function not only conserves power during idle periods(quiescent current drops to approximately 6mA) but also allowsmultiplexing in multi-channel applications. See Figure 12 for two

OPA549s in a switched amplifier configuration. The on/off stateof the two amplifiers is controlled by the voltage on the E/S pin.Under these conditions, the disabled device will behave like a750pF load. Slewing faster than 3V/µs will cause leakagecurrent to rapidly increase in devices that are disabled, and willcontribute additional load. At high temperature (125°C), theslewing threshold drops to approximately 2V/µs. Input signalsmust be limited to avoid excessive slewing in multiplexedapplications.

FIGURE 3. Output Disable.

OPA549

E/S

CMOS or TTL

Ref

LogicGround

7500Ω

RCL 0.01µF(optional, for noisyenvironments)

8

6

8

6

4.75V

RCL = – 7500Ω

OPA549 CURRENT LIMIT: 0A to 10A

NOTES: (1) Resistors are nearest standard 1% values. (2) Offset in the current limit circuitry may introduce approximately ±0.25A variation at low current limit values.

DESIREDCURRENT LIMIT

0A(2)

2.5A3A4A5A6A7A8A9A10A

RESISTOR(1)

(RCL)

ILIM Open22.6kΩ17.4kΩ11.3kΩ7.5kΩ4.99kΩ3.24kΩ1.87kΩ845Ω

ILIM Connected to Ref

CURRENT(ISET)

0µA158µA190µA253µA316µA380µA443µA506µA570µA633µA

VOLTAGE(VSET)

(Ref) + 4.75V(Ref) + 3.56V(Ref) + 3.33V(Ref) + 2.85V(Ref) + 2.38V(Ref) + 1.90V(Ref) + 1.43V(Ref) + 0.95V(Ref) + 0.48V

(Ref)

(a) RESISTOR METHOD

15800 (4.75V)

ILIM

= – 7.5kΩ75kΩILIM

7500Ω

ISET = ILIM/15800

VSET = (Ref) + 4.75V – (7500Ω) (ILIM)/15800

(b) DAC METHOD (Current or Voltage)

D/A

ISET

4.75V

RefRef

±ILIM =

Max IO = ILIM

(4.75) (15800)

7500Ω + RCL

Max IO = ILIM

±ILIM =15800 ISET

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Thermal Shutdown Status

The OPA549 has thermal shutdown circuitry that protects theamplifier from damage. The thermal protection circuitry dis-ables the output when the junction temperature reachesapproximately 160°C and allows the device to cool. When thejunction temperature cools to approximately 140°C, the outputcircuitry is automatically re-enabled. Depending on load andsignal conditions, the thermal protection circuit may cycle onand off. The E/S pin can be monitored to determine if thedevice is in shutdown. During normal operation, the voltage onthe E/S pin is typically 3.5V above Ref. Once shutdown hasoccurred, this voltage drops to approximately 200mV aboveRef. Figure 4 shows an example implementing this function.

FIGURE 4. Thermal Shutdown Status.

FIGURE 5. Output Disable and Thermal Shutdown Status.

FIGURE 6. Safe Operating Area.

External logic circuitry or an LED can be used to indicate ifthe output has been thermally shutdown, see Figure 10.

Output Disable and Thermal Shutdown Status

As mentioned earlier, the OPA549’s output can be disabledand the disable status can be monitored simultaneously.Figure 5 provides an example of interfacing to the E/S pin.

SAFE OPERATING AREA

Stress on the output transistors is determined both by theoutput current and by the output voltage across the conduct-ing output transistor, VS – VO. The power dissipated by theoutput transistor is equal to the product of the output currentand the voltage across the conducting transistor, VS – VO.The Safe Operating Area (SOA curve, Figure 6) shows thepermissible range of voltage and current.

The safe output current decreases as VS – VO increases.Output short circuits are a very demanding case for SOA. Ashort circuit to ground forces the full power-supply voltage(V+ or V–) across the conducting transistor. Increasing thecase temperature reduces the safe output current that can betolerated without activating the thermal shutdown circuit ofthe OPA549. For further insight on SOA, consult ApplicationReport SBOA022 at the Texas Instruments web site(www.ti.com).

POWER DISSIPATION

Power dissipation depends on power supply, signal, and loadconditions. For dc signals, power dissipation is equal to theproduct of output current times the voltage across the con-ducting output transistor. Power dissipation can be mini-mized by using the lowest possible power-supply voltagenecessary to assure the required output voltage swing.

For resistive loads, the maximum power dissipation occurs ata dc output voltage of one-half the power-supply voltage.Dissipation with ac signals is lower. Application BulletinSBOA022 explains how to calculate or measure powerdissipation with unusual signals and loads.

THERMAL PROTECTION

Power dissipated in the OPA549 will cause the junctiontemperature to rise. Internal thermal shutdown circuitry shutsdown the output when the die temperature reaches approxi-mately 160°C and resets when the die has cooled to 140°C.Depending on load and signal conditions, the thermal protec-tion circuit may cycle on and off. This limits the dissipation ofthe amplifier but may have an undesirable effect on the load.

Any tendency to activate the thermal protection circuit indi-cates excessive power dissipation or an inadequate heatsink. For reliable operation, junction temperature should belimited to 125°C maximum. To estimate the margin of safetyin a complete design (including heat sink) increase theambient temperature until the thermal protection is triggered.

1 2 5 10

VS – VO (V)

20 50 100

10

20

1

Out

put C

urre

nt (

A)

0.1

Pulse Operation Only(Limit rms current to ≤ 8A)

Output current canbe limited to lessthan 8A—see text.

TC = 125°C

TC = 85°C

TC = 25°CPD = 90WPD = 47W

PD = 18W

OPA549

E/S

HCT

LogicGround

Ref

E/S pin can interfacewith standard HCT logicinputs. Logic ground isreferred to Ref.

OPA549

E/S

Open Drain(Output Disable)

HCT(Thermal Status

Shutdown)

LogicGround

Ref

Open-drain logic output can disable the amplifier's output with a logic low.HCT logic input monitors thermal shutdown status during normal operation.

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11www.ti.com

Use worst-case load and signal conditions. For good reliabil-ity, thermal protection should trigger more than 35°C abovethe maximum expected ambient condition of your applica-tion. This produces a junction temperature of 125°C at themaximum expected ambient condition.

The internal protection circuitry of the OPA549 was designedto protect against overload conditions. It was not intended toreplace proper heat sinking. Continuously running the OPA549into thermal shutdown will degrade reliability.

AMPLIFIER MOUNTING AND HEAT SINKING

Most applications require a heat sink to assure that themaximum operating junction temperature (125°C) is notexceeded. In addition, the junction temperature should bekept as low as possible for increased reliability. Junctiontemperature can be determined according to the Equations:

TJ = TA + PDθJA (4)

where θJA = θJC + θCH + θHA (5)

TJ = Junction Temperature (°C)TA = Ambient Temperature (°C)

PD = Power Dissipated (W)θJC = Junction-to-Case Thermal Resistance (°C/W)θCH = Case-to-Heat Sink Thermal Resistance (°C/W)

θHA = Heat Sink-to-Ambient Thermal Resistance (°C/W)θJA = Junction-to-Air Thermal Resistance (°C/W)

Figure 7 shows maximum power dissipation versus ambienttemperature with and without the use of a heat sink. Using aheat sink significantly increases the maximum power dissipa-tion at a given ambient temperature, as shown in Figure 7.

The challenge in selecting the heat sink required lies indetermining the power dissipated by the OPA549. For dcoutput, power dissipation is simply the load current times thevoltage developed across the conducting output transistor,PD = IL (VS – VO). Other loads are not as simple. Consult theSBOA022 Application Report for further insight on calculat-ing power dissipation. Once power dissipation for an applica-tion is known, the proper heat sink can be selected.

Heat Sink Selection Example—An 11-lead power ZIP pack-age is dissipating 10 Watts. The maximum expected ambienttemperature is 40°C. Find the proper heat sink to keep thejunction temperature below 125°C (150°C minus 25°C safetymargin).

Combining Equations (4) and (5) gives:

TJ = TA + PD ( θJC + θCH + θHA ) (6)

TJ, TA, and PD are given. θJC is provided in the SpecificationsTable, 1.4°C/W (dc). θCH can be obtained from the heat sinkmanufacturer. Its value depends on heat sink size, area, andmaterial used. Semiconductor package type, mounting screwtorque, insulating material used (if any), and thermal joint

compound used (if any) also affect θCH. A typical θCH for amounted 11-lead power ZIP package is 0.5°C/W. Now wecan solve for θHA:

θHA = [(TJ – TA)/PD] – θJC – θCH

θHA = [(125°C – 40°C)/10W] – 1.4°C/W – 0.5°C/WθHA = 6.6°C/W

To maintain junction temperature below 125°C, the heat sinkselected must have a θHA less than 6.6°C/W. In other words,the heat sink temperature rise above ambient must be lessthan 66°C (6.6°C/W • 10W). For example, at 10W Thermalloymodel number 6396B has a heat sink temperature rise of 56°C(θHA = 56°C/10W = 5.6°C/W), which is below the required 66°Crequired in this example. Thermalloy model number 6399B hasa sink temperature rise of 33°C (θHA = 33°C/10W = 3.3°C/W),which is also below the required 66°C required in this example.Figure 7 shows power dissipation versus ambient temperaturefor a 11-lead power ZIP package with the Thermalloy 6396Band 6399B heat sinks.

FIGURE 7. Maximum Power Dissipation vs Ambient Temperature.

Another variable to consider is natural convection versusforced convection air flow. Forced-air cooling by a small fancan lower θCA (θCH + θHA) dramatically. Some heat sinkmanufacturers provide thermal data for both of these cases.Heat sink performance is generally specified under idealizedconditions that may be difficult to achieve in an actualapplication. For additional information on determining heatsink requirements, consult Application Report SBOA021.

0 25 50 75 100 125

30

20

10

0

Pow

er D

issi

patio

n (W

)

Ambient Temperature (°C)

Thermalloy 6399B HA = 5.6°C/W assume CH = 0.5°C/WOPA549 JC = 1.4°C/W

JA = 7.5°C/W

Thermalloy 6396B HA = 3.3°C/W assume CH = 0.5°C/W

OPA549 JC = 1.4°C/W JA = 5.2°C/W

θθθθ

θθθθ

with Thermalloy 6396BHeat Sink, JA = 7.5°C/Wθ

with Thermalloy 6399BHeat Sink, JA = 5.2°C/Wθ

PD = (TJ (max) – TA)/ JA(TJ (max) – 150°C)

θ

with No Heat Sink, JA = 30°C/Wθ

OPA549SBOS093E

12www.ti.com

avoided with clamp diodes from the output terminal to thepower supplies, as shown in Figure 8. Schottky rectifierdiodes with a 8A or greater continuous rating are recom-mended.

VOLTAGE SOURCE APPLICATION

Figure 9 illustrates how to use the OPA549 to provide anaccurate voltage source with only three external resistors.First, the current limit resistor, RCL, is chosen according tothe desired output current. The resulting voltage at the ILIM

pin is constant and stable over temperature. This voltage,VCL, is connected to the noninverting input of the op amp andused as a voltage reference, thus eliminating the need for anexternal reference. The feedback resistors are selected togain VCL to the desired output voltage level.

As mentioned earlier, once a heat sink has been selected,the complete design should be tested under worst-case loadand signal conditions to ensure proper thermal protection.Any tendency to activate the thermal protection circuitry mayindicate inadequate heat sinking.

The tab of the 11-lead power ZIP package is electricallyconnected to the negative supply, V–. It may be desirable toisolate the tab of the 11-lead power ZIP package from itsmounting surface with a mica (or other film) insulator. Forlowest overall thermal resistance, it is best to isolate theentire heat sink/OPA549 structure from the mounting surfacerather than to use an insulator between the semiconductorand heat sink.

OUTPUT STAGE COMPENSATION

The complex load impedances common in power op ampapplications can cause output stage instability. For normaloperation, output compensation circuitry is typically not re-quired. However, for difficult loads or if the OPA549 is in-tended to be driven into current limit, an R/C network may berequired. Figure 8 shows an output R/C compensation (snub-ber) network which generally provides excellent stability.

FIGURE 8. Motor Drive Circuit.

FIGURE 9. Voltage Source.

G = – = –4R2

R1

10Ω(Carbon)

0.01µF

R220kΩ

R15kΩ

OPA549

V–

V+

VIN

Motor

D1

D2

D1, D2 : Schottky Diodes

7500Ω

RCL

ILIM

0.01µF(Optional, for noisy

environments)

4.75V

IO =15800 (4.75V)

7500Ω + RCL

VO = VCL (1 + R2/R1)

Ref

V+

VCL

VCL = = 1V

Desired VO = 10V,

R1 = 1kΩ and R2 = 9kΩ

G = = 1010

1

For Example:

2kΩ • 4.75V

(2kΩ + 7500Ω)

If ILIM = 7.9A, RCL = 2kΩ

V–

R2R1

Uses voltage developed at ILIM pin as a moderately accurate reference voltage.

A snubber circuit may also enhance stability when drivinglarge capacitive loads (> 1000pF) or inductive loads (motors,loads separated from the amplifier by long cables). Typically,3Ω to 10Ω resistors in series with 0.01µF to 0.1µF capacitorsis adequate. Some variations in circuit values may be requiredwith certain loads.

OUTPUT PROTECTION

Reactive and EMF-generating loads can return load currentto the amplifier, causing the output voltage to exceed thepower-supply voltage. This damaging condition can be

PROGRAMMABLE POWER SUPPLY

A programmable source/sink power supply can easily bebuilt using the OPA549. Both the output voltage and outputcurrent are user-controlled. See Figure 10 for a circuit usingpotentiometers to adjust the output voltage and current whileFigure 11 uses DACs. An LED connected to the E/S pinthrough a logic gate indicates if the OPA549 is in thermalshutdown.

OPA549SBOS093E

13www.ti.com

FIGURE 10. Resistor-Controlled Programmable Power Supply.

FIGURE 11. Digitally-Controlled Programmable Power Supply.

G = 1 + = 109kΩ1kΩ

9kΩ1kΩ

OPA549

+5V

+5V

0.12V to 2.5V

0V to 4.75V

OutputAdjust

ThermalShutdown Status

(LED)

74HCT04 R ≥ 250Ω

E/S

VO = 1V to 25VIO = 0 to 10A

96

8

4

3

RefILIM

10.5kΩ

499Ω

10kΩ

CurrentLimit

Adjust

1kΩ

20kΩ 0.01µF

V–

V+ = +30VV– = 0V

DAC B

1/2 DAC7800/1/2

1/2 DAC7800/1/2(3)

10pF

IOUT B

RFB B

AGND B0.01µF

ILIM

ThermalShutdown Status

(LED)

74HCT04 R ≥ 250Ω

9kΩ1kΩ

VO = 7V to 25V

V+ = +30VV– = 0V

IO = 0A to 10A

G = 10

Ref8

9

1, 2

E/S6

4

3

DAC A

+5V

+5V

VREF B

DGND

10pF

IOUT A

RFB A

OUTPUT ADJUST

OPA549

CURRENT LIMIT ADJUST

AGND A

VREF A

Choose DAC780X based on digital interface: DAC7800—12-bit interface, DAC7801—8-bit interface + 4 bits, DAC7802—serial interface.

1/2OPA2336

1/2OPA2336

VREF

–5V

OPA549SBOS093E

14www.ti.com

FIGURE 13. Multiple Current Limit Values.FIGURE 12. Switched Amplifier.

FIGURE 14. Parallel Output for Increased Output Current.

E/S

R2R1

VIN1

OPA549

VO

E/S

R4R3

Limit output slew rates to ≤ 3V/µs (see text).

VE/S VIN2

OPA549

OPA549

RCL2RCL1

Ref

Close for high current(could be open drainoutput of a logic gate).

ILIM

ILIM

Ref

Ref

R11kΩ

R24kΩ

OPA549

OPA549

VOG = 5

VIN

0.1Ω

0.1Ω

ILIM

Master

Slave

20A Peak

PACKAGE OPTION ADDENDUM

www.ti.com 22-Oct-2013

Addendum-Page 1

PACKAGING INFORMATION

Orderable Device Status(1)

Package Type PackageDrawing

Pins PackageQty

Eco Plan(2)

Lead/Ball Finish(6)

MSL Peak Temp(3)

Op Temp (°C) Device Marking(4/5)

Samples

OPA549S ACTIVE Power Package KVC 11 25 Green (RoHS& no Sb/Br)

CU SN N / A for Pkg Type -40 to 85 OPA549S

OPA549SG3 ACTIVE Power Package KVC 11 25 Green (RoHS& no Sb/Br)

CU SN N / A for Pkg Type -40 to 85 OPA549S

OPA549T ACTIVE TO-220 KV 11 25 Green (RoHS& no Sb/Br)

CU SN N / A for Pkg Type -40 to 85 OPA549T

OPA549TG3 ACTIVE TO-220 KV 11 25 Green (RoHS& no Sb/Br)

CU SN N / A for Pkg Type -40 to 85 OPA549T

(1) The marketing status values are defined as follows:ACTIVE: Product device recommended for new designs.LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.PREVIEW: Device has been announced but is not in production. Samples may or may not be available.OBSOLETE: TI has discontinued the production of the device.

(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availabilityinformation and additional product content details.TBD: The Pb-Free/Green conversion plan has not been defined.Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement thatlead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used betweenthe die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weightin homogeneous material)

(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.

(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuationof the previous line and the two combined represent the entire Device Marking for that device.

(6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finishvalue exceeds the maximum column width.

PACKAGE OPTION ADDENDUM

www.ti.com 22-Oct-2013

Addendum-Page 2

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