Top Banner
High Temperature Effects on Wafer Probing Page 1 of 4 03/12 Certain industries, such as the automotive industry, require extensive testing of integrated circuits at high temperatures to ensure reliable performance in applications that are particularly intolerant of failures because of product safety concerns or other considerations. Testing at high temperatures simulates the conditions of use and also helps to identify and eliminate marginal devices that would be likely to fail prematurely. High temperatures also induce thermal stresses in the tester which can affect the positioning of the test probes on the test pads. e problem is complicated by the dynamic nature of the testing process as the wafer is repeatedly repositioned under the probe array. e process is becoming even more challenging as pad sizes shrink and testing temperatures increase. Probe mark analysis allows manufacturers to evaluate and optimize the testing process by examining the marks left by probes when they contact the test pads. Physical contact between the probes of the tester and the test pads of the device leaves marks on the pads (probe marks) that carry valuable information about the probing process, such as the accuracy to the probe placement on the pad. Analysis of these marks reveals the true performance of the prober, probe card, and setup under actual test conditions. Automated probe mark analysis replaces time-consuming manual analysis, delivering statistically valid quantitative data in an easy-tointerpret format in minimal time. It enables the test engineer to rapidly assess the probing process, identify and analyze issues within the process and define solution options. NXP Semiconductors (Germany) manufacturers a range of high performance mixed signal and standard products used in various applications. Demand for testing at higher temperatures (200°C) on smaller pads prompted a thorough evaluation of the probing process with three goals: 1) review existing process settings for soak time and realignment to optimize probe to pad accuracy (PTPA), 2) evaluate external tools for probing process analysis and 3) standardize probing process analysis procedures within the company. In the work described here, we evaluate a WaferWoRx (Rudolph Technologies, USA) automated probe mark analysis system, comparing it to existing in-house techniques for analyzing the effects of soak time, stepping patterns, and prober realignments in a high temperature production testing process. THERMAL STRESS Testing at temperature introduces thermal stress into the testing apparatus, affecting performance through a number of mechanisms, including thermal gradients in the probe card, changes in probe card stiffness, thermal expansion of head plate and probe card changer and changes in clearance (the distance from the chuck to the probe card). e process is made more challenging by the dynamic nature of the thermal effects, which change continuously as the heat source, the prober chuck, moves relative to the probe card. e wafer is mounted on the prober chuck where it is heated and moved close to the probe card mounted in the tester headplate above (see Figure 1). After allowing time for the system to approach some state of thermal equilibration, the wafer is brought into contact with the probes and the test is performed. Each time the wafer is moved to test a different device the thermal gradient changes and the equilibrium is disturbed. At the beginning of this process the PCB is heated up while the head plate still remains rather uninfluenced. Over a longer period of time the head plate holding the probe card also heats up. Darren James - Rudolph Technologies, Marcel Bleyl and Jan Martens - NXP Semiconductors Germany GmbH
4

High Temperature Effects on Wafer Probing

Jan 10, 2022

Download

Documents

dariahiddleston
Welcome message from author
This document is posted to help you gain knowledge. Please leave a comment to let me know what you think about it! Share it to your friends and learn new things together.
Transcript
Page 1: High Temperature Effects on Wafer Probing

High Temperature Effects on Wafer Probing

Page 1 of 4 03/12

Certain industries, such as the automotive industry, require extensive testing of integrated circuits at high temperatures to ensure reliable performance in applications that are particularly intolerant of failures because of product safety concerns or other considerations. Testing at high temperatures simulates the conditions of use and also helps to identify and eliminate marginal devices that would be likely to fail prematurely. High temperatures also induce thermal stresses in the tester which can affect the positioning of the test probes on the test pads. The problem is complicated by the dynamic nature of the testing process as the wafer is repeatedly repositioned under the probe array. The process is becoming even morechallenging as pad sizes shrink and testing temperatures increase. Probe mark analysis allows manufacturers to evaluate and optimize the testing process by examining the marks left by probes when they contact the test pads.

Physical contact between the probes of the tester and the test pads of the device leaves marks on the pads (probe marks) that carry valuable information about the probing process, such as the accuracy to the probe placement on the pad. Analysis of these marks reveals the true performance of the prober, probe card, and setup under actual test conditions. Automated probe mark analysis replaces time-consuming manual analysis, delivering statistically valid quantitative data in an easy-tointerpret format in minimal time. It enables the test engineer to rapidly assess the probing process, identify and analyze issues within the process and define solution options.

NXP Semiconductors (Germany) manufacturers a range of high performance mixed signal and standard products used in various applications. Demand for testing at higher temperatures (200°C) on smaller pads prompted a thorough evaluation of the probing process with three goals: 1) review existing process settings for soak time and realignment to optimize probe to

pad accuracy (PTPA), 2) evaluate external tools for probing process analysis and 3) standardize probing process analysis procedures within the company. In the work described here, we evaluate a WaferWoRx (Rudolph Technologies, USA) automated probe mark analysis system, comparing it to existing in-house techniques for analyzing the effects of soak time, stepping patterns, and prober realignments in a high temperature production testing process.

THERMAL STRESSTesting at temperature introduces thermal stress into the testing apparatus, affecting performance through a number of mechanisms, including thermal gradients in the probe card, changes in probe card stiffness, thermal expansion of head plate and probe card changer and changes in clearance (the distance from the chuck to the probe card). The process is made more challenging by the dynamic nature of the thermal effects, which change continuously as the heat source, the prober chuck, moves relative to the probe card.

The wafer is mounted on the prober chuck where it is heated and moved close to the probe card mounted in the tester headplate above (see Figure 1). After allowing time for the system to approach some state of thermal equilibration, the wafer is brought into contact with the probes and the test is performed. Each time the wafer is moved to test a different device the thermal gradient changes and the equilibrium is disturbed. At the beginning of this process the PCB is heated upwhile the head plate still remains rather uninfluenced. Over a longer period of time the head plate holding the probe card also heats up.

Darren James - Rudolph Technologies, Marcel Bleyl and Jan Martens - NXP Semiconductors Germany GmbH

Page 2: High Temperature Effects on Wafer Probing

Several solutions have been proposed to prevent the effects of thermal stress, including modifications to probe card construction and materials, shielding the probe card, and heating the probe card to harmonize the temperature gradient. Our focus here is on online process solutions. These include implementing soak times, realigning the probes to the pads and finding the best stepping pattern. Soak times are brief periods during which the wafer is positioned close to the card to allow thermal equilibration. Defining the frequency and duration of soak times is part of the test process setup and can have a significant impact on the accuracy of probe placement.

Generally, longer soak times permit greater accuracy but increase the length (and cost) of the test. Thermal changes may also be addressed by periodically realigning the prober stage to the probe card. This process also adds time to the testing process, making the frequency and extent of realignment additional variables to be considered in optimizing the testprocess. Finally, the stepping pattern determines the direction and magnitude of the thermal gradient after each move. Again, it is the goal to identify the influence of each pattern on the thermal equilibrium, as well as on the probing time.

COMPARING INSPECTION TECHNIQUESBefore attempting to optimize these process variables, the WaferWoRx solution was compared to the existing inspection methodology at NXP. A set of test wafers was generated containing intentional errors typical of a production test process, including probe card pitch, roll and yaw and prober scaling, orthogonality and overtravel. The results confirmed that both methodologies were capable of detecting typical production errors, misalignments and maintenance issues.

OPTIMIZING STEPPER PATTERNThe next experiment sought to identify the optimal stepping pattern. Five wafers were probed, each with a different stepping pattern. The patterns were generated with MultiSiteOptimizer (SPA) and included a standard meander, radial, spiral, shortest path and longest path. All wafers were probed with the same hardware configuration at 125°C without realignment. A soak time of two minutes was allowed after direct heating to 125°C.

Figure 2 shows the stepping patterns and the resulting PTPA for each wafer. The results are displayed using the WaferWoRx vector view, which plots a color coded vector for each measurement point. The magnitude and direction of each vector represent the resultant X and Y displacement of the scrub mark from the center of the pad. The color of the vector is keyed to its magnitude and direction with large negative errors represented by the blue end of the spectrum and large positive errors by the red end. The different stepping patterns clearly result in distinct patterns of errors and the error patterns provide a means of estimating the relative goodness of the stepping pattern.

Page 2 of 4 03/12

Figure 1 - There are multiple sources of thermal stress in wafer probing at high temperature.

Page 3: High Temperature Effects on Wafer Probing

The plots shown in Figure 3 were generated with data exported from the WaferWoRx system into Microsoft’s Excel spreadsheet program. The figure on the left plots the X and Y scrub error for each probe mark, then defines two boxes, one enclosing the total probe area and the other the smallest box enclosing 80% of the data points. By this measure the radial pattern seems best, with 80% of its marks enclosed within a box approximately 6μm by 6μm. The right half of Figure 3shows the same data but adds time to the presentation. Blue data points were acquired first and red last. There is a clear correlation between the magnitude and direction of the errors and time, reflecting the movement of the probes as a result of thermal stress.

From this data we can see that there is significant movement for all patterns at 125°C. Given the size of the observed errors, all stepping patterns would likely benefit from at least one realignment during the measurement. The spiral and radial patterns appear to offer the least error, while the shortest way and longest way generate unexpectedly large errors.

OPTIMIZING REALIGNMENT PARAMETERSThe next experiment was designed to provide a basis for optimizing realignment parameters. There are at least three ways to approach realignment. Manual probe mark inspection and realignment by the operator is flexible and requires no automation. However it is difficult to use for large probe arrays and multiple touchdowns and it becomes slow, expensive and inaccurate if realignment frequency is too high. Automated probe mark inspection (WaferWoRx) and realignment is faster but provides only a two-dimensional analysis (no probe height information). It is not usable for second or subsequent test stages, which create multiple superimposed probemarks, or on combinations of probe and pad materials that do notleave marks. Automated probe position inspection and prober stage realignment (the existing NXP method) can be used for multiple test stages and does provide direct probe height measurements. However it is not fast enough if too many probes are inspected and it depends on accurate prober and camera alignment.

In this experiment, 17 wafers were probed at different temperature (from -60°C t o+200°C), realignment, and soak settings. Figure 4 (left) shows X/Y error data in vector view acquired at five different

Page 3 of 4 03/12

Figure 2 - Resulting probe placement errors (bottom) provide a means of estimating the relative goodness of the steppingpattern (top).

Figure 3 - Probe placement errors associated with various stepper patterns (top). The radial pattern shows the best performance (smallest total probe area and 80% probe area). The same data is presented on the bottom, color coded for time - blue first, red last.

Page 4: High Temperature Effects on Wafer Probing

temperatures. Figure 4 (right) shows the 200° C data plotted for X and Y errors and color coded for time. Three realignments were performed during the data acquisition. Their effects are apparent in the time coded data. Figure 5 demonstrates the value of realignment. When the realignment corrections are added back into the 200°C data the total probe area more than doubles, from 17 μm X 20 μm (340 μm2) to 22 μm X 37 μm (814 μm2).

All hot and cold probing temperatures showed significant probe to pad movements. Deviation from ambient temperature was the main driver and the 200°C data showed the largest movements of the temperatures evaluated. The benefit of realignment varies with the magnitude of the movements and realignment parameters (frequency and extent) should be defined with this in mind.

CONCLUSIONWe compared an external automated probe mark inspection system (WWX) to our internal (NXP’s) existing methodology and found both to be capable of identifying standard testing process errors. WaferWoRx was capable of collecting large amounts of data in a consistent way and the data could be readily exported for additional analysis. We have identified anumber of analytical functions that would be valuable in any future automated system. Using the existing automated capabilities and external analysis techniques we were able to select the stepping patterns and soaktime/realignment parameters that optimize probe to pad accuracy for our test processes. In the future we expect automated probe mark analysis to play a more central role in test process optimization throughout NXP’s manufacturing operations.

Page 4 of 4 03/12

Figure 4 - All temperatures showed significant movement in x and y direction over the total probing time of one hour (top) with the magnitude driven primarily by deviation from ambient. When analyzed over time (bottom) probe realignments are apparent in the data.

Figure 5 - Probe realignments reduced the total probe area by more than half.