UNIVERSITY of CALIFORNIA Santa Barbara High Performance Barium Strontium Titanate Varactor Technology for Low Cost Circuit Applications A dissertation submitted in partial satisfaction of the requirements for the degree of Doctor of Philosophy in Electrical and Computer Engineering by Baki Acikel
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UNIVERSITY of CALIFORNIA
Santa Barbara
High Performance Barium Strontium Titanate Varactor
This thesis presents a comprehensive research effort for development of
alternative low cost varactor technology using Barium Strontium Titanate (BST)
thin films for tunable RF and microwave circuits. The work focuses on the BST
device fabrication technology as well as the application of this technology to new
circuits including phase shifters, highly integrated passive integrated circuits and
tunable matching networks. The phase shifters, which are crucial components for
modern phased array systems, will immediately benefit from high performance low
cost BST technology and this will enable widespread application. An analog phase
shifter based on the BST varactor loaded transmission line topology demonstrates
the potential of the BST technology. The phase shifter circuit performance
provided the motivation for further studies in the tunable passive integrated and
lumped element circuits discussed in Chapter 6.
A brief outline of the contents of each chapter is as follows.
The motivations for the development of BST thin film varactor technology
are presented in Chapter 2 along with a discussion of the advantages/disadvantages
of available varactor technologies. A brief survey of potential applications that
2
benefit from the BST thin film technology is presented. The fundamental BST thin
film material properties are reviewed in this chapter.
Material and device issues of BST varactors are discussed in Chapter 3.
Different device topologies are compared with an emphasis on parallel plate
capacitor structures. The material and device integration challenges including the
bottom electrode patterning for vertical devices are discussed. Innovative device
topologies and fabrication approaches are introduced to reduce the fabrication
complexities. The details of the BST varactor layout and fabrication are provided.
Characterization and modeling of the BST varactors are summarized in
Chapter 4. Both low and high frequency measurements are presented. The
challenges in the parameter extraction at high frequencies are discussed. Equivalent
circuit models showing good agreement with measured results are developed for
BST varactors. Optimization efforts are presented for the device loss improvement.
BST varactor loaded transmission lines are presented in Chapter 5. Theory
and design equations for analog phase shifters are reviewed. Measured and
simulated results are presented for an X Band 1800 phase shifter. This circuit
demonstrated the best figure of merit reported in the literature. A different phase
shifter with the improved return loss performance designed at Hughes Research
Labs (HRL) is fabricated at UCSB using BST varactor technology. Return losses
better than 20 dB are demonstrated over the design band even the BST varactors
are tuned with the good insertion loss performance.
3
Chapter 6 highlights the efforts for highly integrated BST tunable circuits.
Very compact small size BST lumped element phase shifters are presented for
lower GHz frequencies. Promising results comparable to semiconductor
alternatives are reported. Low voltage tunable matching networks are fabricated to
improve power amplifier efficiencies in handset modules for wireless application.
In the last chapter, we provide a summary and discussion of the future work
to further improve the BST circuit performance.
4
Chapter 2
BST Thin Film Varactors for Tunable
Microwave Circuit Applications
In this chapter, motivations for using Barium Strontium Titanate (BST) thin
films in tunable high frequency circuit applications are discussed. Available
alternative varactor technologies are compared with the advantages/disadvantages
highlighted for each technology. The applications that could potentially benefit
from using BST are listed such as phase shifters. A comparison for different phase
shifter technologies will be presented along with the reasons for using BST thin
films. A brief overview of the important BST thin film material properties will
follow.
2.1 Motivations for BST Thin Films
Barium strontium titanate, Ba1-xSrxTiO3, is being widely investigated as a
suitable dielectric material for a variety of applications including tunable RF and
microwave circuits, dynamic random access memories (DRAM), bypass capacitors,
and non-volatile memories [1]. Thin-film BST has several properties that make
these applications possible. Most importantly, the BST films show a field
dependent permittivity. When bias is applied to a BST capacitor, the dielectric
5
constant changes in a non-linear fashion. (The origins of this behavior will be given
when the material properties are discussed in the following sections). The non-
linearity of the dielectric properties with respect to an applied dc voltage make BST
attractive for tunable microwave devices such as varactors, filters, voltage
controlled oscillators (VCO), delay lines and phase shifters [2]. A typical
capacitance vs. voltage curve is shown in Figure 2.1 for BST parallel plate
capacitors, which has been the focus of our research. BST films offer a low cost,
20
25
30
35
40
45
50
-20 -10 0 10 20
Cap
acita
nce
(pF)
Voltage (V)
BST Varactor
Figure 2.1: A typical capacitance vs. voltage characteristics of BST varactors.
scalable varactor technology for tunable RF and microwave circuits. BST based
devices and circuits could potentially provide an alternative to semiconductor
varactors. The BST varactors with high tunabilities, defined as the ratio of
6
maximum permittivity to its minimum value (max) (min)/ε εr r , of up to 4:1 have been
demonstrated.
BST films have very high dielectric constant typically in the range of 200-
350, making them suitable for small-area bypass capacitors and MEMS switches.
In the early 1990’s, there was a huge research effort in DRAM industry for
alternative high dielectric constant materials. Ferroelectric thin film materials,
particularly BST, have been investigated as a replacement for the silicon
oxide/nitride dielectric material. GaAs chips for wireless communication
applications use on chip BST bypass capacitors gaining a performance advantage
over external bypass capacitors. [3] Smaller device packages with reduced pin
count are possible which do not require external components and bonding. In this
thesis, small area BST bypass capacitors were fabricated in a tunable matching
network, which is discussed in Chapter 6. It is also important to note that the high
dielectric constant makes it very difficult to manufacture small size varactors used
in high frequency circuits, typically 0.2-1 pF, because of the small capacitor areas
in the range of 5-10 mµ 2 . The issues related to fabrication of small area varactors
will be discussed in Chapter 3.
BST films have very high breakdown fields typically more than 2 × 106
V/cm. This allows a large RF signal to be applied to devices and indicates good
power-handling capability [4]. Intrinsic fast polarization response of the BST films
allows continuous and rapid tuning. The fast field response combined with the non-
7
linear behavior of the dielectric permittivities enables frequency conversion devices
such as multipliers and up/down converters using BST thin films.
Figure 2.2: BST bypass capacitors to reduce chip size and improve device performance [3].
There are currently three competing technologies for discrete integrated
microwave varactors that can satisfy industry requirements. Some important
features of these technologies, namely GaAs semiconductor, BST thin film and
Micro-Electro-Mechanical-Systems (MEMS) varactors, are contrasted in Table 2.1.
Note that the entries reflect data general-purpose continuously variable varactors
8
suitable for mm-wave operation. It is apparent that there are pros and cons for each
technology, and therefore the choice depends strongly on the particular application.
Low ?? H igh C ost
N on - herm etic
Flip,C & W ,B um p H erm etic/V acu
um
??
H erm etic
Flip,C & W ,B u
m p
Packaging
G ood, needs to be
quantified
T rades w ith control
voltage
T rades w ith control
voltage
Fast
<5 - 30V (bipolar)
Thickness dep.
M oderate
(Q <100 typ)
G ood
2 - 3:1 typ
BST
Poor
Excellent
Excellent
Slow
< 60 V
(bipolar)
V ery G ood
(Q <200)
L ow
(<1.5:1)
M EM S
E xcellent R eliability
<10V
(unipolar)
D oping dep.
C ontrol
V oltage
Poor IM D
Poor Pow er
H andling
Fast T uning
Speed
M oderate
(Q <60 ty p.) R F L oss
(Q )
G ood
2 - 3:1 typ T unability
(at high Q )
G aA s
Table 2.1: The comparison of currently available varactor technologies.
Both BST and MEMS technologies have recently emerged and show
significant promise for implementation of low-cost high performance circuits. [1]
The most important feature of MEMS varactors is their very low loss
characteristics. The high performance tunable filters and very low loss phase
shifters with high quality factors can be implemented using MEMS varactors. They
are very linear devices and therefore result in low inter-modulation products.
9
However, they are relatively slow compared to BST and GaAs varactors and
require higher control voltages. The high cost of packaging for MEMS devices has
been impediment to the development of a low cost alternative varactor technology.
Reliability has been also a concern for MEMS devices due to problems with the
stiction as a result of the dielectric charge up in capacitive switches and resistance
degradation in dc switches.
On the other hand thin-film BST varactors offer several advantages over
semiconductor varactor diodes and MEMS devices. An important feature of BST
technology—in comparison to semiconductor-based alternatives—is the wide
variety of substrate materials available for thin-film deposition. Using inexpensive
substrates and demonstrated high-volume deposition technologies, very low cost
microwave circuits can be realized using thin-film BST. The fabrication and
packaging of BST varactors are easier and cheaper compared to MEMS based
devices. They have higher breakdown field strengths and higher power handling
capability than semiconductor diodes. Good power handling and IMD can be
obtained by using relatively thicker films at the expense of control voltage.
There are certain applications which appear to favor thin-film BST
varactors including: 1) those that require rapid, continuous tuning at low voltages,
such as phase-shifters or delay lines used in phased array and phase linearization
systems, and 2) frequency conversion devices, such as frequency multipliers or
mixers, that exploit the “fast” capacitive non-linearity. Inexpensive broadband or
frequency agile components such as tunable matching networks, splitter/combiners
10
can be manufactured using a low cost BST technology. The desirable features of
inexpensive BST thin film technology are summarized below:
• BST films should have low loss tangents (tan δ < 0.01). BST films are
shown to have very low losses and little dielectric dispersion into GHz
frequency range (Figure 2.3) [5]. The tunabilities better than 2:1 should
be readily available.
• Inexpensive substrates must be used for BST thin film growth.
Standard growth and processing technologies are necessary for high
volume production.
• Simple device fabrication and low cost packaging are crucial to be cost
effective.
• Reproducibility and reliability issues should be addressed.
In this thesis, BST films grown by sputtering and MOCVD were studied.
Thin films are sputtered from 3” BaxSr1-xTiO3 targets. BST films are sputtered
on inexpensive substrate, such as high resistivity (HR) silicon, glass and sapphire,
which have excellent microwave properties. Film stoichiometry has been optimized
for high tunability and low loss performance. Our work has focused on
Ba0.5Sr0.5TiO3 (50/50 target) and Ba0.25Sr0.75TiO3 (30/70 target) film
compositions.
11
2.2 BST Thin Films for Phase Shifter Applications
Modern phase array systems require a large number of expensive phase
shifters. Therefore, low loss and low cost microwave phase shifters are required to
improve performance and reduce the cost of phase arrays to ensure widespread
application. At the present time, the phased array antennas are being used for long
range (X-Band) and short range (Ka-W Band) communication and radar systems.
Anywhere from 2-10 to thousands of phase shifters are needed in different types of
phased array antenna systems. BST thin films have been investigated as a potential
low cost voltage tunable element for microwave circuit applications because of
their high tunability, relatively low loss, and fast switching speed. Several groups
[1, 6-8] have implemented phase shifters using BST thin films.
Figure 2.3: The loss tangent and the capacitance density as a function of frequency [9].
12
Semiconductor diode and ferrite phase shifters have been two principal
means of providing phase control of microwave signals. Tunable BST phase
shifters offer the advantages of broad tuning range compared to ferrites, reduced
resistive losses compared to p-n junction varactor diodes, reciprocity, and fast
switching times. Thin films of tunable ferroelectric materials offer the additional
advantages of lightweight, compactness, lower processing temperatures, lower
operating voltages, low cost and compatibility with semiconductor processing
technology [6].
2.3 Fundamentals of BST Material Properties: Bulk vs. Thin
Films
A ferroelectric material has spontaneous polarization that can be reversed
by an applied electric field. This response manifests itself as a hysteresis loop in the
response of polarization to an external electric field [10]. They have a characteristic
structural phase transition temperature, called the Curie point ( CT ) where the
material undergoes a structural change from the ferroelectric phase to a non-polar,
paraelectric phase. As can be seen from Figure 2.4a, the relative bulk permittivity
increases as the temperature approaches the Curie point. Above CT , permittivity
decreases with temperature and often exhibits Curie-Weiss behavior where C is the
Curie constant.
13
rc
Cε (T)=T-T
(2.1)
In the paraelectric regime, the spontaneous polarization is zero but the permittivity
remains high. Therefore, materials in the ferroelectric regime exhibit a memory
effect via the hysteresis behavior, which is absent in the paraelectric phase. Hence,
the ferroelectric phase is necessary for nonvolatile memory applications, whereas
paraelectric phase is preferred for DRAM applications. The material chosen should
remain in one of these two phases in the normal operating temperature range for a
particular application.
Figure 2.4a-b: Comparison of the permittivities of bulk and thin film BST as a function of
temperature [11, 12]. Figure 2.4a shows much higher permittivities for bulk materials. In Figure 2.4 b, the sharp peak in the permittivity is suppressed for thin film.
Ba1-xSrxTiO3 is a continuous solid solution between BaTiO3 and SrTiO3
over the whole concentration range. The unit cell structure for the BST material is
shown in Figure 2.5. The Curie temperature of BST decreases linearly with
14
increasing Sr concentration at a rate of 3.4º C per mole % Sr. As a result, the
transient temperature and hence the electrical and optical properties of BST can be
tailored over a broad range to meet the requirements of various electronic
applications.
Figure 2.5: The structure of (Ba,Sr)TiO3. Ba and Sr occupy the center position and with Ti
at the cube corners, surrounded by oxygen octahedra.
There was a substantial research effort in the DRAM industry to incorporate
high K, ferroelectric materials into device processes since the early nineties. The
technology for higher density memories continues to be an important issue for the
next generation memory devices as typical circuit size becomes smaller and higher
15
capacitance densities are required. Using thinner films in the process solved this
requirement for increased capacitance up to some degree. However, the dielectric
thickness has reached a lower limit set by electron tunneling through the dielectric
thus the capacitor area can no longer be scaled down using planar device structures.
For high charge storage densities, ferroelectric materials have been prime
candidates with dielectric constants ranging well in to the thousands.
Although bulk dielectric constants in BST are quite high, the dielectric
constant of thin film BST is much smaller, particularly when film thickness is
reduced below about 100 nm as seen in Figure 2.4a [11]. This is due to the
observed decrease in permittivity with decreasing film thickness [13]. For DRAM
applications the maximum possible capacitance density is required while
maintaining acceptable leakage currents and dielectric lifetime. There is a trade of
between increasing capacitance by reduced film thickness due to the thickness
dependent permittivity. The DRAM efforts have not been concerned with the
tunability or other properties important for microwave varactor circuits. Our main
focus has been to optimize sputtered BST films for high tunability and low loss to
be used in applications such as a varactor.
For the purpose of understanding the underlying dielectric behavior, one
must consider the response of the polarization as a function of the applied field as
the fundamental quantity of interest. For ferroelectric material, the nonlinear
relationship between the applied field and polarization is most simply described by
16
a power series expansion of the free energy in terms of the order parameter,
polarization as in Landau-Ginzburg-Devonshire (LGD) theory [12].
effectiveE (T )P Pα α= + 31 11 (2.2)
ii
i
PE
ε χ ∂=∂0 (2.3)
where E is the electric field across the film and P is the polarization normal to the
substrate, α1 and α11 are the appropriate dielectric stiffness. It is found that for the
BST films α11 is not temperature dependent. For the ferroelectric materials, the
film permittivity is almost equal to the susceptibility.
By integrating the small signal capacitance curve shown in Figure 2.6a,
polarization versus field is obtained shown in Figure 2.6b, which has a functional
form of Eqn. (2.2) [12]. The fit is seen to be a very good description of the non-
linearity in the polarization data. Using the LGD formula, we obtained
. X cm/Fα = 101 2 4 10 and 5 2. X cm /C Fα = 20
11 0 75 10 , which are comparable to
the values reported in the literature. Thus the general shape of our C-V data is very
well described by classical nonlinear dielectric theory. The magnitudes of the
coefficients are different from those obtained from the bulk, as they must be given
the differences in permittivity.
17
8
9
10
11
12
13
14
15
-8 -6 -4 -2 0 2 4 6 8
Cp
Cap
acita
nce
Den
sity
(fF/u
m^2
)
Bias (V)
-10
-5
0
5
10
-8 -6 -4 -2 0 2 4 6 8
MeasuredLGD Theory
Pola
rizat
ion(
uC/c
m^2
)
Bias(V) Figure 2.6 a-b: The capacitance density and polarization curve as a function of bias. The
polarization curve is obtained by integrating the measured C-V small signal data. The LGD model fits the data very well.
18
Figure 2.7: The field dependence of permittivity as a function of film thickness [14].
The variation of the apparent permittivity with applied bias as a function of
film thickness can be seen in Figure 2.7. The apparent permittivities are found to
decrease systematically with film thickness at electric fields near zero. At higher
fields, the apparent permittivities become independent of thickness [12]. For the
varactor application, it is apparent that the thicker films give a higher tunability at
the expense of increased bias voltages.
Figure 2.8a and 2.8b show the dielectric data for Ba0.49Sr0.51TiO3 (65 mT),
Ba0.24Sr0.76Ti0.96O3 (35 mT), and SrTiO3 thin films. Fig 2.8a shows that the
permittivity at zero bias field is a function of thickness. This thickness dependence
19
Figure 2.8: (a) Dielectric constant and (b) inverse capacitance density as a function of thickness
is often attributed to the presence of an interfacial layer in series with the thickness
dependent capacitance density of the bulk of the film [15]. This dead layer has a
lower permittivity, which reduces the total film permittivity as the film thickness is
decreased [16]. Expressing the apparent capacity density at zero field as the inverse
sum of two capacitors connected in series,
app i B
-A A A= +C C C ε ε ε ε
= +i i
i o B o
t t t (2.4)
where the interfacial and the bulk parameters are represented by “i” and “B”
subscripts, respectively, appC is the measured (apparent) capacitance, A is the area
and t is the total film thickness. The first term in the Eqn. (2.4) indicates the
presence of a constant valued interfacial capacitance density and its value is given
by the non zero intercepts in the inverse of the capacitance density plots shown in
Figure 2.8b. The interfacial capacitance is between 40-80 fF/µm2 for the plotted
100
200
300
400
500
600
700
800
900
0 1000 2000 3000 4000 5000
Die
lect
ric c
onst
ant
Thickness [Angstroms]
Ba0.49
Sr0.51
TiO3
Ba0.24
Sr0.76
Ti0.96
O3
STO
0
0.02
0.04
0.06
0.08
0.1
0 1000 2000 3000 4000 5000Inve
rse
capa
cita
nce
dens
ity [ mm mm
m2 /fF
]
Thickness [Angstroms]
STO
Ba0.49
Sr0.51
TiO3
Ba0.24
Sr0.76
Ti0.96
O3
20
films. As the film thickness increases the thin interfacial capacitance layer has a
smaller effect. The data on Figure 2.8b implies that the total film thickness t is
large compared to the interfacial layer thickness, it since the data lies on a straight
line. The constant capacitance is usually thought to represent some type of
interfacial layer between the dielectric and one or both of the electrodes, and might
arise from surface contamination of the BST, nucleation or reaction layers at the
film/electrode interfaces, or changes in the defect chemistry at the dielectric-
electrode interfaces.
The field and thickness dependence of the permittivity in ferroelectric and
paraelectric thin films have been mostly explained by Schottky barrier model. In
this model, the variation in apparent capacitance with bias explained via a voltage
dependent interfacial depletion layer capacitance in series with the capacitance of
the bulk of the film, whose permittivity is taken to be bias-independent.
Temperature dependence of the dielectric constant for the BST thin films is
shown in Figure 2.4b [12]. The zero field permittivity starts to decrease linearly
around 300 K while the apparent the permittivity stay almost constant at higher
electric fields regardless of temperature. However, a sharp peak in the permittivity
at the bulk transition is not found in these films, contrary to what would be
observed for a stress-free and homogeneous macroscopic ferroelectric shown in
Figure 2.4a. The possible reasons for this include finite size effects, an
inhomogeneous depression of the transition temperature, or the external constraint
imposed by biaxial strain on the film from the substrate.
21
The theories of the bulk dielectric and ferroelectric properties of perovskites
such as BST are well understood [10]. However, the thin films of these compounds
exhibit variations in their polarization behavior with the changes in applied voltage,
operating temperature, particle size, and film thickness that are not well understood
[13]. Much of the research was targeted towards optimization of material properties
and finding appropriate solutions to DRAM integration issues. A good
understanding of material properties in such thin films is essential before they may
be successfully integrated into commercial devices in near future.
Since BST films are ferroelectric, they show a non-linear relationship
between electric displacement (or polarization) and electric field, even if when they
are in paraelectric phase above the Curie temperature. Polarization charging
currents flow in to such materials with a power-law time dependence of
approximately t-n where n< 1 [17]. A time dependent polarization manifests itself in
the frequency domain as a dispersion of the permittivity as a function of frequency.
Permittivity values are often reported at only a single frequency, neglecting the
decrease in permittivity with frequency from dispersion. It has been demonstrated
for high quality BST films with low leakage that the dielectric loss given by the
loss tangent can be derived form the frequency dispersion of the permittivity [18].
This is true since both quantities are related to the Fourier Transform of the time
dependent polarization mechanism, which is described by Curie von–Schweidler
behavior.
22
Investigation of field, temperature, and electrode work function dependence
of the leakage, with proper consideration of leakage versus relaxation, has provided
strong evidence that leakages are controlled by the reverse characteristics of back to
back Schottky barriers at each film-electrode interface [19]. Because of this there is
not a strong dependence of leakage on film thickness at a given electric field,
except due to the change in the field induced barrier height lowering.
Lifetime and reliability are also other extremely important issues in the
practical use of the capacitors. Therefore, determining failure mechanisms and
estimating lifetimes are crucial in the BST technology. The most important failure
mechanism in perovskite titanate thin films is resistance degradation, which is
defined as a slow increase of leakage current under a constant applied electrical
field after prolonged times. It has been proposed that deterioration at the grain
boundaries contributes to resistance degradation such as reduction of the grain
boundary potential barrier height due to space-charge accumulation, demixing
reactions of oxygen vacancies, and oxygen vacancy pile up at the electrodes. The
majority of the degradation theories are based on electromigration of oxygen
vacancies in a given dc electric field. Oxygen vacancies are present in significant
numbers in undoped and acceptor doped alkaline earth titanates. They are
positively charged with respect to the host lattice and in a dc electrical field they
can migrate toward the cathode. While the oxygen vacancies pile up in front of the
cathode and are compensated by the electrons injected from the cathode, a chemical
reaction can occur at the anode producing additional mobile oxygen vacancies.
23
References
[1] R. York, A. Nagra, E. Erker, T. Taylor, P. Periaswamy, J. Speck, S.
Streiffer, and O. Auciello, "Microwave integrated circuits using thin-film
BST," 2001.
[2] P. C. Joshi and M. W. Cole, "Mg-doped Ba/sub 0.6/Sr/sub 0.4/TiO/sub 3/
thin films for tunable microwave applications," Applied Physics Letters,
vol. 77, pp. 289-91, 2000.
[3] D. Ueda, "Implementation of GaAs monolithic microwave integrated
circuits with on-chip BST capacitors," Journal of Electroceramics, vol. 3,
pp. 105-13, 1999.
[4] B. Acikel, L. Yu, A. S. Nagra, T. R. Taylor, P. J. Hansen, J. S. Speck, and
R. A. York, "Phase shifters using (Ba,Sr)TiO/sub 3/ thin films on sapphire
and glass substrates," presented at IEEE MTT-S International Microwave
Sympsoium, 2001.
[5] J. D. Baniecki, R. B. Laibowitz, T. M. Shaw, P. R. Duncombe, D. A.
Neumayer, D. E. Kotecki, H. Shen, and Q. Y. Ma, "Dielectric relaxation
of Ba/sub 0.7/Sr/sub 0.3/TiO/sub 3/ thin films from 1 MHz to 20 GHz,"
Applied Physics Letters, vol. 72, pp. 498-500, 1998.
[6] A. Kozyrev, V. Osadchy, A. Pavlov, and L. Sengupta, "Application of
ferroelectrics in phase shifter design," 2000.
24
[7] F. De Flaviis and N. G. Alexopoulos, "Low loss ferroelectric based phase
shifter for high power antenna scan beam system," 1997.
[8] V. K. Varadan, K. A. Jose, V. V. Varadan, R. Hughes, and J. F. Kelly, "A
novel microwave planar phase shifter," Microwave Journal, vol. 38, pp.
244, 248, 250, 253-4, 1995.
[9] D. E. Kotecki, J. D. Baniecki, H. Shen, R. B. Laibowitz, K. L. Saenger, J.
J. Lian, T. M. Shaw, S. D. Athavale, C. Cabral, Jr., P. R. Duncombe, M.
Gutsche, G. Kunkel, Y. J. Park, Y. Y. Wang, and R. Wise,
"(Ba,Sr)TiO/sub 3/ dielectrics for future stacked capacitor DRAM," IBM
Journal of Research and Development, vol. 43, pp. 367-82, 1999.
[10] C. Basceri, "Electrical and dielectric properties of (barium, strontium)
titanium trioxide thin film capacitors for ultra-high density dynamic
random access memories," NORTH CAROLINA STATE UNIVERSITY,
1997.
[11] T. M. Shaw, Z. Suo, M. Huang, E. Liniger, R. B. Laibowitz, and J. D.
Baniecki, "The effect of stress on the dielectric properties of barium
Figure 3.3: Schematic of stacked BST capacitor and relevant device integration issues.
The need to deposit the BST films in an oxygen environment at very high
temperatures, typically in the range of 450-700 ºC, makes the bottom electrode
choice crucial. Most integration schemes for perovskite dielectrics use noble metal
or metal-oxide electrodes in combination with a deposited diffusion barrier material
at the electrode/plug interface for DRAM applications [4]. The formation of an
insulating oxide at the BST-electrode interface during the growth will lower the
capacitance density and lower tunability. Pt, Ru, Ir or their conducting oxides have
been investigated by many groups as the bottom electrode [6]. From these metals,
reactive ion etching of Ru and RuO2 has been relatively easy due to their volatile
Ru oxides and halides. Patterning of Pt (and Ir) electrode material is complicated
by the absence of any low temperature readily formable volatile etch products. Pt is
typically patterned by reactive ion etching (RIE) using Cl2-based chemistry and a
patterned hard mask, which limits the bottom electrode thickness and fine scale
33
features with high aspect ratios. Physical sputtering is believed to be the dominant
etch mechanism when conventional dry-etching techniques are used.
Platinum base electrodes are still most commonly used for its oxidation
resistance, its high conductivity compared to oxide electrodes and its compatibility
with high temperature growth. BST capacitors with Pt electrodes have yielded the
best leakage characteristics because of the high work function of Pt (5.65 eV).
However, special care must be taken to avoid excessive compressive stress in the
Pt, which can lead to hillock formation and shorted devices. Another difficulty
involves adhesion of the Pt electrode to the substrate, sometimes leading to
process-induced delamination. Special care must be taken for the development of
the diffusion barriers and adhesion layers to solve these problems.
In our early studies, BST films were sputtered from a stoichiometry
0.5 0.5 3( )Ba Sr TiO target on to Pt (100nm)/ 2TiO (100nm)/ 2SiO (100nm)/ Si
substrates. Substrate templates were purchased from an outside vendor (Silicon
Quest, Santa Clara, California). 2TiO was sputter deposited at 400 C° . The
substrates were ultrasonically cleaned with acetone and isopropanol prior to BST
deposition. SiO2 and TiO2 were grown under the Pt as oxygen diffusion and
adhesion layers, respectively. The Pt metal must be deposited at elevated
temperatures to avoid hillocking upon cooling after BST film deposition due to the
thermal expansion mismatch between the Pt film (8.8×10-6 °C @ 25°C) and Si
substrate (2.618×10-6 °C @ 25°C). During the fabrication process, severe
34
delamination problems were observed because of poor bottom electrode adhesion
to the silicon substrate, making the production of large area circuits hard and
lowering the yield.
We also investigated BST parallel plate varactors on both glass and
sapphire substrates as alternative candidates because of their excellent microwave
properties [2]. Both substrates have low loss tangents in the orders of 410− and are
relatively low cost compared to other oxide substrates, such as MgO or LaAlO3.
The resistivity of sapphire (~1012 Ω cm) is higher than that of silicon (~0.01-10 Ω
cm) and HR silicon (~102-104 Ω cm). Glass also has the advantage of a lower
dielectric constant than silicon reducing the transmission line losses in the circuits.
Suitable bottom electrodes and adhesion layers have been investigated for both
substrates. Platinum has been grown epitaxially on sapphire substrate (C&A plane)
at 600 ºC without an adhesion layer enabling very smooth BST films to be grown.
BST films were also grown on prepatterned glass and sapphire samples that had
Ti/Au/Pt e-beam evaporated metals as bottom electrodes. The device processing
issues related to each substrate system will be discussed in the following sections.
35
100
200
300
400
500
600
700
800
900
20
40
60
80
100
120
140
160
180
0 1000 2000 3000 4000 5000
Die
lect
ric c
onst
ant
Quality factor
Thickness [Angstroms]
Q sapphire
K sapphire
K silicon
Q silicon
Figure 3.4: Permittivity and quality factor for Ba0.49Sr0.51TiO3 thin films grown on sapphire and silicon substrates at UCSB.
Noticeable differences were observed in the dielectric constants and quality
factors of the 100 nm BST films developed on sapphire and silicon substrates.
Higher dielectric constants and better quality factors were found on the films
deposited on sapphire as shown in Figure 3.4. The larger quality factor was
attributed to a better Pt bottom electrode and increased growth rates. The Pt bottom
electrode and subsequent oxide growth surface deposited on sapphire was a smooth
epitaxial film (~3 Å rms roughness) opposed to the platinized silicon with a 30-40
Å rms roughness. The effect of bottom electrode surface roughness on the film has
not been completely investigated. Decrease in quality factor as film thickness
increases has been attributed to increased resistive losses as the overall volume of
the dielectric increases. It is found that the growth rate also impacts quality factor
[7]. Possible explanations for the dependence of loss tangents on growth rate
36
include: less film contamination from residual gases, reduced growth surface
exposure to energetic particles and bombardment, and increased scattering of
energetic particles by a faster growth rate.
100
150
200
250
300
350
400
450
-0.6 -0.4 -0.2 0 0.2 0.4 0.6
Perm
ittiv
ity
Electric Field [MV/cm]
Ba/Sr =50/50
Ba/Sr Target=30/70
Figure 3.5: The tunability is shown for BST films grown at UCSB with two different compositions.
The different film composition profoundly affects the film dielectric
properties. Researches have found that the maximum dielectric constant is
produced when the (Ba + Sr)/Ti ratio is equal to one. The dielectric constant
decreases when films are either titanium rich or titanium poor. The Ba/Sr ratio also
impacts film properties as higher dielectric constants and higher loss tangents are
associated with higher barium content. Figure 3.5 shows the tunability for two
37
different Ba/Sr targets used. 50/50 target has given 4:1 tunability whereas 30/70
film tunability was 2:1.
3.3 High Frequency BST Varactor Design -Early Device
Most high frequency circuit applications require small size capacitors in the
monolithic circuits. As discussed previously, BST films have very high dielectric
permittivities; typically in the range of 200-350. The value of a parallel plate
capacitor is given by
0ε ε= r
d
ACt
(3.1)
where rε is relative dielectric constant, 0ε is vacuum dielectric permittivity, A is
the area of the device and dt is the film thickness. Given the high dielectric
constants of the BST films, the small value capacitors can only be achieved by
small contact areas typically in the 2mµ range, requiring tight lithographic
tolerances. Figure 3.6 shows this relationship in a graphical format for different
capacitor sizes. In a phase shifter designed for K band, for example, the required
BST capacitors have values in 0.1-0.3 pF range. The early BST thin films grown on
silicon substrate typically had a thickness of 100 nm. As it is seen from Figure 3.6
this required capacitor areas of 4-8 2mµ . A device utilizing two capacitors in series
was developed at UCSB, increasing active contact area, which makes the
fabrication easier. The device cross-section and top view schematics are shown in
Figure 3.7a-b [8]. Capacitors connected in series result in reduced capacitance,
38
which enabled doubling the actual capacitor areas. The two capacitors share the
base electrode, which has a floating voltage value. Since the bottom electrodes are
common, there is no need to make contact to it. The tuning voltage is applied
between the top electrodes to change the permittivity.
0
5
10
15
20
25
30
0 500 1000 1500 2000
Cap
acito
r Are
a(um
2 )
Thickness(A)
0.1pF
0.2pF
0.3pF0.4pF
Figure 3.6 The BST parallel plate capacitor areas. as a function of thickness
The connection of small area capacitors to the rest of the circuit is also
crucially important. Normally, this would be done by having contact metals that are
physically in contact with the top electrodes. However, any metal contacting the
BST film, which is on the bottom electrode, would form a capacitor. Since BST has
very large permittivities, even small “active areas” resulting from this extra contact
would change the designed capacitor values tremendously. As a solution to this
problem, a lower permittivity (ε) material was utilized to define the active capacitor
39
areas on BST. By using this layer, the direct contact area of the top electrode is
limited to the opening in the low ε material. The suggested device layout is shown
in the Figure 3.3a. First, the low ε material needs to be patterned creating openings
in it and then, the top electrode is deposited on the hole areas defining the BST
capacitors. SiN and SiO2 dielectric films with low dielectric constant compared to
BST are suitable for defining small active areas in monolithic device fabrication.
The key dimensions of the BST varactor device layout are shown in the
Figure 3.7b. The minimum feature, indicated by w , is chosen for the capacitor
width while the length of the capacitor is denoted by l . The resistance due to the
base electrode is given by
3ρ ρ= ≈sPt
L wRA t l
(3.2)
where ρ is the platinum resistivity, L is the distance between two capacitors, and
Ptt is the bottom electrode thickness. It is assumed that the spreading resistance
under the capacitor is negligible and that the order of magnitude of series resistance
is not affected by this assumption. It is important to recognize that the conductor
contribution is highly dependent on the geometry of the capacitor layout. Equation
(3.2) indicates that the base resistance is minimum when the distance between the
two capacitors is minimized and capacitor length is maximized. This is achieved by
using long narrow stripes in the layout for a given capacitor area. In other words,
maximizing the periphery of the capacitor area optimizes the device performance in
40
this device geometry. The Figure 3.8 shows a comparison of the device quality
factors for the capacitors with different physical layout.
Substrate
BSTBottom Electrode
Top ElectrodesLow dielectricmaterial
BST capacitor
Side View
Top View
w
3w
w w w
l
Contact metals
w=lithography limit
Figure 3.7a-b: Layout schematic for two capacitors in series configuration. The base electrode is shared and tuning voltage is applied between two top contacts.
The bottom electrode thickness has to be increased to reduce the series
resistance contribution due to the base electrode as seen in Eqn. (3.2). Etching of
the bottom electrode is required to isolate the individual devices since the BST
41
films are grown on substrates with blanket Pt bottom electrode. The Pt etch also
proved to be a challenge in the BST fabrication process. Platinum is a noble metal
and ion milling is required to pattern the bottom electrode. Reactive ion etching
(RIE) with high power levels is typically required to etch Pt. The photoresist is not
suitable for such high power levels and long etch times. A harder SiN/SiO2 mask
was used for RIE etching [8]. It is important to remember that, the oxide/nitride
materials are also needed to define the active areas on the BST.
0
10
20
30
40
50
0 5 10 15 20
Mea
sure
d Q
Frequency, GHz
Dev
ice
Q
w=2 um Narrow stripe
w=5 um Square
Figure 3.8: The device Q factor for different physical device layout.
In early process developed at UCSB, SiN was used to etch the bottom
electrode and also as the low ε material. SiN was deposited directly on BST films
using plasma enhanced chemical vapor deposition (PECVD). Then using a
42
photoresist mask it was etched in a RIE system using SF6 /Ar gases to define holes
(the active areas on BST) in the nitride layer. After depositing the top electrodes,
the bottom electrode was etched with another high power RIE step. Later, it was
found that the device loss tangent is significantly affected during the fabrication
process particularly during the etching steps. Figure 3.9a-b show the C-V data
taken for two different devices and the affect of processing on the device quality
factor. One set of data is for devices fabricated on as grown film and the other set
of data is for the films that have gone through the RF process. The Figure 3.9a–c
show that even though RF process doesn’t affect the tunability, the loss tangent is
degraded after processing. Since both samples originally came from the same BST
film growth, the difference in loss tangent can only be explained by process
induced damage. The study that shows particular process steps that cause the
damage is shown in Figure 3.9c. It is clearly seen that the steps involving a RIE
etch of the platinum and silicon nitride windows are responsible for the degradation
in the BST loss tangent [1]. Both PECVD and RIE systems use highly energetic
ions that can potentially damage the film. It has been observed that the SiN etch
step results in more damage because the plasma comes into direct contact with BST
films during the etch when opening holes in the nitride layer. During the bottom
electrode etch the BST film is covered by both top electrode and SiN layers. It is
important to avoid any direct contact between the BST film and the plasma in RIE
steps.
43
40 10-12
60 10-12
80 10-12
100 10-12
120 10-12
140 10-12
160 10-12
180 10-12
-20 -15 -10 -5 0 5 10 15 20
ANL 90901a
Cap
acita
nce
(Far
ads)
Bias Voltage (V)
Unprocessed
Processed
0
0.02
0.04
0.06
0.08
0.1
-20 -15 -10 -5 0 5 10 15 20
ANL 90901a
Loss
Tan
gent
Bias Voltage (V)
Unprocessed
Processed
(a) (b)
0
0.01
0.02
0.03
0.04
0.05
-10.0 -5.0 0.0 5.0 10.0
Loss
Tan
gent
Bias Voltage (V)
As Grown
Pt etch using Cl2 RIE
Window etch using SF6 RIE
ANL 90313
0
0.01
0.02
0.03
0.04
0.05
-10.0 -5.0 0.0 5.0 10.0
Loss
Tan
gent
Bias Voltage (V)
As Grown
Pt etch using Cl2 RIE
Window etch using SF6 RIE
ANL 90313
(c)
Figure 3.9a-c: The affect of the processing steps on film tunability and loss tangent.
Figure 3.10 shows the modified process flow that addresses the problems
described above in the fabrication of the two capacitors in series configuration. The
fabrication details are given in Appendix D. The first step in the fabrication is to
etch the BST films on the bottom electrode and leave BST islands where varactors
will be defined. Next a SiO2 layer is evaporated and patterned by liftoff on these
islands. The SiO2 layer is used instead of SiN because it can be evaporated in the e-
44
beam system at UCSB and patterned by liftoff. E-beam evaporation and liftoff
allow defining the contact areas for the capacitors without the need of etching holes
in the dielectric layer. As a result, the damage introduced by dielectric deposition
and RIE etch has been eliminated. Another advantage of the SiO2 layer is that the
etch rate for the oxide in the RIE system using Cl2 gas is slower than that of the
SiN by almost a factor of two enabling thicker electrodes to be patterned. This SiO2
layer is used as a mask to etch the bottom electrode metal isolating individual
varactors. The SiO2 layer should be thick enough to withstand during Pt etch.
Depending on the bottom electrode thickness the top oxide layer thickness can be
adjusted. After defining active areas with the oxide layer Ti/Pt/Au/Pt top electrodes
are deposited and encapsulated by SiO2. First, the metals were evaporated in an e-
beam system and the sample was transferred without removing the photoresist to
another e-beam system that allows the dielectric evaporation. The titanium layer is
used to promote the adhesion of the top electrodes to the BST film. The first Pt is
used to have a symmetrical electrode structure in the top and bottom electrodes. Au
layer is included to increase the conductivity of the top electrodes reducing
conductor losses. Second Pt layer is included to act as a mask allowing a slower
metal etch. The top SiO2 acts as an encapsulation layer for the top electrode metals.
The metal and oxide thicknesses are determined by photoresist thickness used in
this step. The minimum series resistance contribution is achieved by increasing Pt
and Au thicknesses. The top SiO2 layer thickness is chosen such that the oxide
thickness will be reduced to 200-300Å after the bottom electrode etch is completed.
45
(a )
S u b s tra te
B S TP tS ta rt in g M a te ria l
(b )
S iO 2 S iO 2
B S T
S iO 2 S iO 2
(c )
BST
(d )
SiO2 SiO2S iN
(e )
SiO2 SiO2uBST
Pt
( f)
S iN
S u b s tra te
B S T E tc ha n d S iO 2e va p o ra t io n
T o p E le c tro d e(T i/P t/A u ) a n dS iO 2e va p o ra t io n
B S T a re a s u n d e r th e c a p a c ito r re g io n sa re n e v e r e xp o s e d to R IE d ire c tly a n dp ro te c te d b y m e ta l/o x id e la y e rs .
B o tto m P t E le c tro d eE tch u s in g C l2
S iN S te p C o ve ra g e
S iN e tc h (S F 6 /A r/O 2 )a n d th ic k c o n ta c t m e t-a lliza t io n (T i/A u )
P t/A uP t/A u
P t/A uP t/A uS iO 2
P t/A uP t/A u
Figure 3.10: The process details for the BST varactors with two capacitors in series configuration.
46
Next, the sample is etched in a RIE system using Cl2 gas (5 mT) at high
power (400W). The oxide layer defines the bottom electrode boundaries. A
crossover layer is needed after the bottom electrode etch to allow thick metal
contacts to be brought close to the top electrodes. A thick SiN layer has been
deposited on the sample by plasma enhanced chemical vapor deposition (PECVD).
This is followed by etching holes in the SiN layer using SF6/Ar gases at moderate
power levels. The actual etch time is determined by a control sample using laser
reflection. SiN layer rather than SiO2 is used as the crossover dielectric since the
etch rate for SiN is higher and high quality films can be deposited by PECVD.
Ti/Au (100 Å/ 1.2 um) metallization has been done for CPW layers simultaneously
contacting the top electrodes. The photograph of the completed varactor device is
shown in Figure 3.11b. A typical device measurement is shown in Figure 3.12 as a
function of frequency at different bias voltages. The details of the characterization
efforts will be given in Chapter 4.
The layout for two capacitors in series required a very detailed fabrication
process and had serious processing drawbacks. An oxide/nitride layer was needed
to etch the bottom electrode and to define the active areas on BST films. The e-
beam evaporated oxide limits the maximum base electrode thickness. This in turn
will set the device quality factor. It was also found that the adhesion of Pt to the
47
Top View
w
3w
w w w
w = lithographic design rule
l
Side View
Pt base
SiO2 SiO2
Substrate
SiNSiN
Ti/Au Ti/Au
Ti/Pt/AuTi/Pt/AuBST
BST Device
(a) (b)
Figure 3.11a-b: Device schematic and completed picture of initial parallel plate capacitors that had two capacitors in series configuration.
0
10
20
30
40
50
0 1 1010 2 1010 3 1010 4 1010
Qua
lity
Fact
or
Frequency(Hz)
Device
BST 30/70
6 10-14
8 10-14
1 10-13
1.2 10-13
1.4 10-13
1.6 10-13
0 1 1010 2 1010 3 1010 4 1010
Cap
acita
nce(
F)
Frequency(Hz)
0V
10V
20V
Figure 3.12: Typical device measurement for BST varactors with two capacitors in series configuration.
48
oxide layer was poor and Ti layer was required as an adhesion promoter. During
the Pt patterning, the top electrodes were found to peel off as a result of physical
sputtering. It has been reported that annealing after the processing is completed will
normally recover the thin film properties and processing induced damages. The Ti
layer made such an annealing step impossible since the films were shorted when
annealed as a result of titanium diffusion into the film. Also the parasitic capacitors
due to oxide/nitride layers had also high loss tangents degrading the device
performance. It was hard to extract the loss contributions from each material layer.
The fabrication process involved many steps, increasing the device cost and
lowering the yield. Moreover, having two series capacitor effectively doubled the
bias voltage for the same film thickness. A new device topology has been studied to
implement parallel plate capacitors that will potentially solve these problems [2].
3.4 New BST Varactor Layout for Optimized Performance
The most serious problems with two capacitors in series configuration were
the fabrication complexity and the bottom electron patterning. We proposed a new
process method where BST films were grown directly on pre-patterned bottom
electrode. Since the films are grown on pre-patterned templates, this eliminated the
need to etch Pt after BST growth. We also implemented a single device
configuration instead of two in series to reduce the fabrication complexity. A
suggested device schematic is shown in Figure 3.13a-b. It looks similar to Schottky
diodes and oxide/nitride layer on the BST varactors is eliminated for simple
49
fabrication. The device layout utilizes a single parallel plate capacitor and
minimizes conductor losses in the base electrode. A metal layer crossing over the
BST film creates the top electrode defining the BST varactor area.
Top Electrode
BST
Bottom Electrode
BST
Top Electrode
Bottom Electrode Substrate
Side View
Thick Metal
Figure 3.13a-b The device schematics for the new single device BST varactors suitable
There are two different methods how the bottom electrode can be patterned
prior to BST film: etching the bottom electrode and e-beam evaporation followed
by lift-off patterning. A thick layer of oxide/nitride can be used to etch relatively
50
thick bottom electrodes. One advantage the etching method offers is the possibility
of processing the bottom electrodes grown epitaxially by sputtering at high
temperatures. However, etching the bottom electrode has the same drawbacks
mentioned in the earlier section. Another problem is that the oxide and nitride need
to be deposited on the bottom electrode prior to the BST film growth, possibly
contaminating or damaging the metal-BST interface. On the other hand, the e-beam
evaporation doesn’t have these complications. The simple liftoff technique enables
the base electrode thickness be increased as needed. The different materials that are
investigated as adhesion layer for the platinum bottom electrodes are titanium and
ZrO2. Titanium is chosen because it can be evaporated in an e-beam system at
UCSB and smooth BST films have been shown on it. The studies resulted in robust
electrode stacks on both glass and sapphire. The BST films grown on sapphire
demonstrated better film properties. That’s why our research efforts focused on pre-
patterned sapphire substrates for the BST film varactors.
The fabrication process is summarized in Figure 3.14 and the details are
given in Appendix A. The fabrication of BST varactors starts with e-beam
evaporation of the bottom electrodes followed by lift-off on sapphire substrate.
Ti/Au/Pt metals were used as the bottom electrode metals. Au metal was
incorporated into the base electrode to increase the conductivity and reduce the
ohmic losses. Typically the metal thicknesses were 50Å/1000Å/1000 Å, for the
Ti/Pt/Au, respectively. The BST films were grown on pre-patterned templates. In
our studies, the BST films were grown using rf magnetron sputtering at UCSB. The
Figure 3.14: The fabrication of Schottky-like BST ‘finger’ varactors
52
film stoichiometry was optimized for tunability and microwave loss performance.
Pt/Au top electrodes (100nm/500nm) were evaporated on the BST film and
patterned by lift-off. It is important to note that the top electrode process
immediately follows the BST film growth reducing process damage or
contamination. This is followed by BST etch in buffered HF. The HF removes the
field BST and opens the areas on the bottom electrode for the contact metal.
Thick Metal
Bottom Electrode
BST capacitor
Figure 3.15: Completed device picture of BST capacitor that uses prepatterned bottom electrode. Thick metal contacts to the bottom electrode allow reduced resistance in the
base.
A thick layer of Ti/Au (100/1.2 um) metals were evaporated for contacting the top
and bottom electrodes. The thick contact metal is brought to the top electrodes as
close as possible to lower the base resistance. A picture of a completed parallel
53
plate capacitor is provided in Figure 3.15. As can be seen from the device picture,
the series resistance associated with the BST capacitor has contributions from both
the base and top electrodes. The characterization and device modeling efforts will
be discussed in length in Chapter 4.
54
References
[1] R. York, A. Nagra, E. Erker, T. Taylor, P. Periaswamy, J. Speck, S.
Streiffer, and O. Auciello, "Microwave integrated circuits using thin-film
BST," 2001.
[2] B. Acikel, T. R. Taylor, P. J. Hansen, J. S. Speck, and R. A. York, "A new
high performance phase shifter using Ba/sub x/Sr/sub 1-x/TiO/sub 3/ thin
films," IEEE Microwave and Wireless Components Letters, vol. 12, pp. 237-9,
2002.
[3] B. Acikel, L. Yu, A. S. Nagra, T. R. Taylor, P. J. Hansen, J. S. Speck, and
R. A. York, "Phase shifters using (Ba,Sr)TiO/sub 3/ thin films on sapphire and
glass substrates," 2001.
[4] B. E. Gnade, S. R. Summerfelt, and D. Crenshaw, "Processing and device
issues of high permittivity materials for DRAMs," 1995.
[5] P. C. Fazan, "Trends in the development of ULSI DRAM capacitors,"
1994.
[6] D. E. Kotecki, J. D. Baniecki, H. Shen, R. B. Laibowitz, K. L. Saenger, J.
J. Lian, T. M. Shaw, S. D. Athavale, C. Cabral, Jr., P. R. Duncombe, M.
Gutsche, G. Kunkel, Y. J. Park, Y. Y. Wang, and R. Wise, "(Ba,Sr)TiO/sub 3/
dielectrics for future stacked capacitor DRAM," IBM Journal of Research and
Development, vol. 43, pp. 367-82, 1999.
[7] T. Taylor. (Personal Communication)
55
[8] E. G. Erker, A. S. Nagra, L. Yu, P. Periaswamy, T. R. Taylor, J. Speck,
and R. A. York, "Monolithic Ka-band phase shifter using voltage tunable
BaSrTiO/sub 3/ parallel plate capacitors," IEEE Microwave and Guided Wave
Letters, vol. 10, pp. 10-12, 2000.
56
Chapter 4
BST Varactors: Characterization & Modeling
This chapter deals with characterization and modeling of BST varactors.
BST varactors with varying sizes were to measure device properties from 100 Hz to
40 GHz. The low frequency measurements enable the characterization of the thin
film material properties without detailed fabrication process. The high frequency
measurements are important for accurate estimation of the circuit performance.
The challenges involving parameter extraction at microwave frequencies are
discussed. The frequency measurements and the device modeling are presented.
4.1 Device Characterization
Large value capacitors are fabricated to characterize dielectric properties of
BST films at low frequencies. Two different instruments have been utilized to do
low frequency measurements: Keithley 590 C-V Analyzer and Agilent 4294
Impedance Analyzer. The Keithley 590 measures capacitance versus voltage or
capacitance versus time characteristics of the devices. 100 kHz or 1 MHz test
frequencies are available. It provides very fast characterization of capacitor
properties and internal source voltage source enables 20± V bias. The setup has
been calibrated before each measurement and the stray capacitance in the cables
has been subtracted from the measurement results automatically after the
57
calibration. A computer controlling the instrument with GPIB interface has been
used to store the conductance, capacitance and voltage values. Stair and dual stair
measurements were done to see if the BST capacitors have shown any hysteresis.
The measurements were done on two large capacitors connected in series by
applying bias between the top electrodes or on a single capacitor between the top
and bottom electrode. 1 MHz standard C-V measurements are fitted in to an
equivalent parallel circuit and the device capacitor and quality factor are extracted.
between 40 Hz to 110 MHz. A wide range of impedances can be measured, from
3m Ohm to 500M Ohm. Impedance measurements can be done as a function of
frequency at different bias points or as a function of bias at a single frequency.
High DC internal bias range ( 40± V) is useful for the characterization of thicker
films with high breakdown voltages. BST varactors that had coplanar waveguide
(CPW) electrode structures are fabricated to measure frequency dependent
dielectric properties. The schematic of the electrode structures is shown in Figure
4.1. The signal electrode of CPW line sits on the BST film and ground electrodes
are deposited directly on the bottom electrode. BST varactors with differing lengths
and ground-signal distances were characterized. The fabrication process involves
two steps. The BST film is grown on blanket (or prepatterned) platinum electrode
followed by BST etch using buffered HF. Finally, Pt/Au electrodes in the shape of
coplanar waveguides are evaporated. CPW structures can be used at high frequency
measurements and the distributed nature of the circuits
58
Substrate
BST
Contact electrodes Pt bottom electrode
Figure 4.1: The BST varactors used for the capacitance measurements as a function of frequency. The BST varactor is formed under the signal port of the coplanar waveguide
is accounted accurately. The details of the circuit model for the devices will be
discussed in the next chapter. A typical capacitance-frequency curve is shown in
45
50
55
60
65
0
50
100
150
200
1000 104 105 106 107 108
Capacitance (pF)
Q
Cap
acita
nce
(pF)
Q-factor
Frequency (Hz)
Figure 4.2: The capacitance and the quality factor characteristics of a typical BST varactor.
Figure 4.2. As seen, there is small dispersion in the capacitance characteristic as
described in Chapter 2. Some noise in the low frequency data is observed. The
59
quality factor of the device, at the beginning, increases with the frequency and
peaks between 1-10 MHz. Then, the Q factor decreases sharply as the frequency is
increased beyond 10 MHz. The high frequency loss is dominated by the conductor
losses due to base electrode.
50
60
70
80
90
100
110
120
1 10 3 10 10 3 100 10 3 1 10 6 10 10 6 100 10 6
Qua
lity
Fact
or
Frequency (Hz)
100 nm Pt
200 nm Pt Total Device Q
Figure 4.3: Q factors for two samples with different bottom electrode thicknesses that had the same BST film growth. The quality factor decreases sharply for the sample with the
thinner bottom electrode.
The quality factor (Q-factor) is used to characterize the losses in lumped
circuit elements. Quality factor can be defined as the ratio of stored energy to the
average energy dissipated in the system per cycle. For any type of passive circuits
represented by admittance or impedance this relation can be defined accordingly.
60
For an admittance (impedance) circuit, the quality factor is defined by Im Re
YQY
=
(or similarly Im Re
ZQZ
= for an impedance circuit)
To characterize different components of the losses, the following
experiment was carried out. BST films were simultaneously grown on two samples
that had different bottom electrode metal thicknesses. First, 1000 Å Pt was grown
on a sapphire substrate in the sputtering chamber. Then, the growth was interrupted
and a second sample was put into the system and an extra 1000 Å Pt was grown on
both samples simultaneously followed by 1000 Å 0.5 0.5 3Ba Sr TiO BST film growth.
At the end, the first sample had an electrode thickness twice the thickness of the
second sample. It was assumed that since the BST films were grown at the same
time, the difference in the device properties is directly due to the difference in the
base electrode thickness. The results from low frequency device measurements are
shown in Figure 4.3. As can be seen, the total device quality decreases faster for
thinner Pt electrode at higher frequencies. Intrinsic BST film losses can be
extracted from the previous measurement results. The total device quality factor for
the samples can be approximated as
1 1
2 2
1 1 1
1 1 1tot BST pt
tot BST pt
Q Q Q
Q Q Q
= +
= + (4.1)
61
where 1totQ is the total device quality factor, BSTQ is the intrinsic quality factor of
the BST film excluding conductor losses due electrodes and 1ptQ indicates ohmic
losses due the base electrode. The similar expressions follow also for the second
sample. We note that ptQ can be written as
1Pt
s
QR Cω
= (4.2)
where ω indicates the frequency, sR is the series resistance component due to the
base electrode and C is the BST capacitance value. sR is inversely proportional to
the base electrode thickness as a first approximation. It is clear from equation (4.2)
that the quality factor is proportional to the base electrode thickness and the higher
quality factors obtained by using thicker base electrode. Rewriting the results in to
(4.1), and subtracting two equations,
1 2 1 1
1 1 1 1
tot tot Pt PtQ Q Q nQ− = − (4.3)
where n is the ratio of Pt base electrode thickness. Intrinsic BST film quality factor
can be found using (4.1) and (4.3). The Figure 4.4 shows the extracted BST film
quality. The BST film shows a relatively constant quality factor up to 100 MHz
even though there is some dispersion at the high frequencies because of the
measurement and calibration limitations.
62
50
60
70
80
90
100
110
120
1 106 10 106 100 106
BST/ Pt/ Sapphire
Qua
lity
Fact
or
Frequency (Hz)
Intrinsic BST film Quality factor
Total Device Quality factor
Figure 4.4: The extracted quality factor for the BST film and the device.
4.2. Low Frequency Device Modeling
The different loss contributions are modeled in an equivalent circuit shown
in Figure 4.5. In this model Rs indicates the ohmic losses caused due to contact
electrodes –top and bottom. The leakage due to free and mobile charges is indicated
by GDC while Gac indicates dielectric losses in the film. C represents the intrinsic
BST capacitor associated with this dielectric loss. The total device quality factor
can be approximated by
1 1 1 1
total leakage BST PtQ Q Q Q= + + (4.4)
Each loss contribution becomes dominant in different frequency bands and
as a result simpler circuits can be used to approximate the complete circuit behavior
63
at different frequency intervals. These circuits are shown in Figure 4.6 for
corresponding bands and their quality factors are given by
1; ; ω ωω
= = =leakage BST PtDC AC
C CQ Q QG G RC
(4.5)
C
Rs
GacGDC
BST Film
Figure 4.5: The equivalent circuit loss model for the BST varactors.
The BST varactors with coplanar waveguide electrodes shown in Figure 1
can be described as a distributed circuit. A good model for the device can be
extracted using the device schematic shown in Figure 4.7a with the equivalent
circuit elements. topr is the resistance due to top Pt/Au signal electrode where
br represents the contribution from the base electrode. The contribution due to CPW
ground electrodes on the bottom electrode is represented by sider where BSTc is the
capacitance of BST film per unit length. The model can be further simplified as in
64
CGac
Rs
C
GDC C
Low Frequency Intermediate Frequency
High Frequency
Figure 4.6: The simplified equivalent circuits that dominates the behavior in the corresponding frequency range.
Figure 4.7b where sr is the series impedance associated with a transmission line
and BSTc and pr indicate the parallel conductance per unit length. From Figure
4.7a-b
/ 2
/ 2= +
=s top side
p b
r r rr r
(4.6)
The factor of 12 arises because there are two components connected in
parallel. To find the characteristic impedance and propagation constant of test
structure, the general transmission line formulas are used. For a transmission line,
the propagation constant and the characteristic impedance are given by
0
γ =
=
zy
zZy
(4.7)
where z is the series impedance and y is the parallel admittance per unit length.
Putting equation (4.6) into (4.7)
65
1
s BST
p BST
jwr cjwr c
γ =+
(4.8)
0
1 p BSTs
BST
jwr cZ r
jwc+
= (4.9)
topr
sider br brsider
BSTc
Figure 4.7a: The distributed circuit model for the BST varactors with CPW electrodes.
pr
BSTcsr
L
Figure 4.7b: The simplified equivalent version of the distributed circuit.
66
For a transmission line with a load LZ , the input impedance at a distance L
from the load is given by
00
0
tanhtanh
Lin
L
Z Z LZ ZZ Z L
γγ
+=+
(4.10)
For an open circuited transmission line, ( LZ → ∞ ) the input impedance is
approximated by Eqn. (4.11)
0 01coth ( ) 1
3inLZ Z L Z L
Lγγ γ
γ= ≈ + (4.11)
Putting Eqn. (4.8) and (4.9) into (4.11), the result becomes
13
p st
BST
r r LZL jwc L
≈ + + (4.12)
In this expression, the first term represents the loss due to the base electrode
and it is inversely proportional with L and the second term signifies the loss due to
the top electrode and increases with L, which are intuitively expected.
The base electrode resistance can be found using the device physical layout.
A device cross section is shown in Figure 4.8. Schottky diodes have very similar
device geometry except the capacitor is formed by N − semiconductor region
whereas here BST film forms the capacitor area. The spreading resistance under the
BST capacitor is also modeled as a distributed circuit. The base resistance is given
213 6
b gap spreading
b b bb
b b b
r r r
g w wr gt t t
ρ ρ ρ= +
= + = +
(4.13)
67
where bρ is the base electrode conductivity, bt is the base electrode thickness, g is
the distance between the top and side contact, w is the top contact width. 13
term
arises because of the spreading nature of the current under BST film.
Similarly resistance due to top and side contacts can be calculated.
Assuming the same width for both contacts
toptop
top
sideside
side
rt W
rt W
ρ
ρ
=
= (4.14)
where subscript indicates the contact name. If more than one metal layer has been
utilized for contacts the effective sheet resistance and thicknesses can be found in a
similar way.
/ 2w
g
Spreading resistance under top contact
spreadingrgapr
Figure 4.8: The series resistance due to base electrode in the BST varactor.
68
Putting the expressions for sr and pr back in to the equation (4.11) we obtain
1 2
1 2 2 1
12 6 2
bs
b
W LR gt L W t tρ ρ ρ
ρ ρ = + + +
(4.15)
We note that
0 r
d
dAC
WLCt
tGWL
ε ε
σ
=
= (4.16)
where σ indicates the film conductance, and dt is the film thickness. The shorted
device measurements are made in a similar way to characterize the losses in the
base electrodes. CPW contact pads are put directly on base electrode after etching
BST films.
0.001 0.01 0.1 1 10 100Frequency , MHz
30
50
70
100
150
200
totQ
Figure 4.9: The comparison of the measurement with the BST model
69
Figure 4.9 shows the comparison between the measurements and the model
for the low frequency structures. It was assumed that the BST varactors had a
constant quality factor in the measurement range. The model correctly predicts the
device behavior in the whole frequency range. There is some discrepancy in the
high frequency end of the measurement, which is caused by either calibration errors
or some intrinsic losses in the film or contact resistance, which were not included in
the model.
4.3 Characterization of BST Varactors in Microwave Regime
In this section, the high frequency measurement results are presented for
both type of BST varactors implemented at UCSB that are covered in detail in
Chapter 2, but the modeling details will be given only for the Schottky-like BST
varactors. The high frequency characterization was done by recording 1-port s-
parameters for different integrated BST varactors at different applied bias levels.
The measurements were done on a Cascade Microtech probe station using ACP-40
CPW probes by Cascade and 40A GSG Picoprobes by GGB Industries. A HP
8722D network analyzer was used for s-parameter measurements between 50 MHz
to 40 GHz.
There were two critical steps required to accurately extract values for the
series resistance and BST capacitance. Because the series resistance was so small,
the measured s-parameters were very near the edge of the Smith Chart, so a very
accurate calibration is required otherwise even very small ripples in the
70
measurements would result in the s parameters outside the Smith Chart which
means the devices show a flawed gain. The second critical step is the accurate
estimation of the large pad parasitics that are used to contact BST varactors. The
capacitance due to large pads can be comparable to small value BST capacitors that
are typically employed in microwave frequencies and must be correctly embedded
from the real device measurements.
The calibration technique that was used for this work was the line-reflect-
match (LRM) method that was developed by Cascade Microtech [1]. This method
is a hybrid of two measurements developed earlier, namely short-open-load-
through (SOLT) and through-reflect-line (TRL). In SOLT method, three defined
standards are measured on two ports separately. A 50 Ω load and a short circuit are
measured and raised probes are used as open standards. Measuring the open probes
in the air, which has a dielectric constant lower than the calibration substrate,
results in a negative capacitance, which is defined to account for the difference.
SOLT calibration technique works comparatively well for low Q devices up to 20
GHz, but measured 1-port s-parameters go outside the chart between 30-40 GHz.
TRL method doesn’t suffer from the drawbacks of SOLT method. In this
calibration method, two different transmission lines of lengths differing by a
quarter wavelength are measured followed by the measurement of a high reflection
standard. One drawback of the TRL method is the requirement of having exactly 50
Ω line, which means the calibration degrades at high frequencies. Another problem
is the fact that the lowest frequency range is set by the longest through line length.
71
As a result to have calibration over wide frequencies, it is necessary to have
through lines with different lengths each one covering a certain bandwidth.
Calibrations below 1 GHz require very long transmission lines, which may become
impractical. LRM method uses a very short through line, typically 1 ps, is
measured thus eliminating dispersion problems. The reflection standard must be a
high reflection standard but doesn’t need to be precisely defined. 50 Ω load is used
as a calibration standard, which is treated as an infinitely long delay line. This
overcomes the issues related to dispersion problem and long through lines.
The equivalent circuit for microwave measurement setup is shown in Figure
4.10. PC , PL , and PR represent the parasitic capacitance, inductance and resistance
due to contact pads, respectively. It is important to accurately account for the
parasitics due to the pads in the measurements after calibration is performed. This
Lp
CPW Pad Capacitance
Cp
CPW Pad Inductance
CPW PadResistance
Rp
DUT
CPW parasiticsRF Device Model
Figure 4.10: Equivalent circuit for microwave frequency measurements with pad parasitics
72
is usually done by having some calibration pads such as open and shorted
structures on the wafer [2, 3]. Open structures omit the device under test on the
mask layout and leave the pads open. Shorted pads are fabricated by connecting
signal and ground planes at where the device would be located.
The equivalent lumped element circuit for open and shorted cases area also
shown in Figure 4.1. In the open circuited pads, measured admittance is given by
ω=padop PY j C (4.17)
which shows that the imaginary part of the input admittance increases linearly with
frequency. The data for an open pad is shown in Figure 4.12a. A value of 32 fF for
PC fits the data perfectly in the frequency range. The shorted pads will have an
admittance given by
1ωω
= ++padsh P
P P
Y j CR j L
(4.18)
The inductance of the pads is determined by subtracting open circuit
capacitance PC value from short-circuited measurement. The resistance due to pads
is very small. The data for the short-circuited pads is shown in Figure 4.12b after
PC has been removed from the expression. PL inductance value is modeled to be
82 pH and in good agreement with the data.
73
CPW “short”CPW “Open”
Cp Cp
Lp Rp
Figure 4.11: Open and short-circuited pad measurements yield the relevant parasitics
It is more advantageous to use admittance parameters than impedance to
extract the BST varactor properties. Using the series RC model shown in Figure
4.6,
BST S
BST
SBST
S S
jwCw C R jwCw C R w C R
Z R
Y ++ +
= +
=2 2
2 2 2 2 2 2
1
1 1
(4.19)
At frequencies whereS
w CR1 the expression reduces to
BST S jwCY w C R= +2 2 (4.20)
The varactor capacitance is extracted by taking the imaginary part of the
admittance expression, which is linear with the frequency with a slope of C . Eqn.
(4.20) shows that the conductance expression varies as the square of the frequency.
The measured data together with extracted device parameters are shown in Figure
4.12 a-c.
Near the edge of Smith Chart, the constant resistance circles are very
closely spaced and it is difficult to extract the series SR resistance value. That’s why
74
it is common practice to measure the devices with higher resistances and extract the
losses for small devices using scaling rules. BST varactors with typical values of
0.15-2 pF were fabricated at the same time and measured for characterization.
0
1
2
3
4
5
0 5 10 15 20
Y11measuredY11modeled
ImY
11(
mS)
Frequency (GHz)
Open Pad
0
2
4
6
8
10
0 5 10 15 20
Z11 measuredZ11modeled
ImZ
11(
Ohm
)Frequency(GHz)
Shorted Pad
(a) (b)
0
2
4
6
8
10
0 5 10 15 20
MeasuredModeled
Real
Y11
(mS)
Frequency(GHz)
DUT
(c)
Figure 4.12a-c: The comparison of the high frequency measurements and the models.
Figure 4.13 shows the extracted capacitance and the device Q factors for
some discrete BST varactors with two capacitors in series configuration as a
function of frequency. There is some dispersion at the low frequencies but the
75
capacitance is almost constant at frequencies up to 40 GHz. The device Q factor is
relatively low at the low end of the spectrum possible indication of losses in the
BST film or oxide/nitride combinations.
0
10
20
30
40
50
0 1 1010 2 1010 3 1010 4 1010
Qua
lity
Fact
or
Frequency(Hz)
Device
BST 30/70
6 10-14
8 10-14
1 10-13
1.2 10-13
1.4 10-13
1.6 10-13
0 1 1010 2 1010 3 1010 4 1010
Cap
acita
nce(
F)
Frequency(Hz)
0V
10V
20V
Figure 4.13: Device measurements for typical BST varactors with two capacitors in series configuration.
4.4 Device Modeling for New Schottky type BST Varactors
In this section, the characterization, modeling and optimization of the new
Schottky type BST varactors will be considered. This structure makes use of BST
films grown on a prepatterned base electrode, with a top contact defining the active
capacitance area. Thin-film BST has a high intrinsic capacitance density, which
leads to small electrode areas for the realization of typical capacitance values for
RF circuit design. This in turn can lead to high ohmic losses and high current
76
densities, hence the choice of materials and geometrical design can have a strong
influence over the device Q-factor and power handling.
Figure 4.14 shows the capacitance and the device quality factor
measurements from some discrete Schottky-like BST varactors. The devices had
1.5 um wide varactor fingers in the mask layout. As seen from Figure 4.14, the
capacitance nicely scales with the different device lengths and doesn’t show
noticeable dispersion up to 10 GHz. Compared to Figure 4.13, the varactors have
higher Q factors especially at lower frequencies. The quality factor shows 1/f type
of frequency dependency, which is indicative of conductor loss mechanisms at the
high frequencies. It is important to note that all the capacitors have the same BST
film growth.
If the device performance were limited by the intrinsic BST thin film losses
at microwave frequencies, one would expect that the total device Q factor would
not change for the devices with different physical layouts. Figure 4.14 indicates
that that the film Q values are high enough that layout dependency is observed.
In Figure 4.15, this dependency is shown in a different format as a function
of capacitance for some BST varactors with the different finger widths and lengths.
The devices are initially characterized as a function of frequency and the quality
factor and capacitance values are extracted from the measurements. The figure is
obtained by plotting the total device quality factors as a function of capacitors at 10
GHz. It is clear from Figure 4.15 that for a given capacitor value there is an
77
optimum design that will give the maximum device Q factor at the operating
frequency.
0
0.1
0.2
0.3
0.4
0.5
0.6
0 2 4 6 8 10
1.5umx5um1.5umx10um1.5umx15um1.5umx20um
Cap
(pF)
Frequency(GHz)
0
50
100
150
200
0 2 4 6 8 10
1.5umx5um1.5umx10um1.5umx15um1.5umx20um
Qde
vice
Frequency(GHz)
Figure 4.14: The capacitance and quality factor measurements for BST finger devices as a function of frequency.