© 2011 ANSYS, Inc. September 21, 2011 1 HFSS 14 Update for SI and RF Applications Markus Kopp Product Manager, Electronics ANSYS, Inc.
© 2011 ANSYS, Inc. September 21, 2011
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HFSS 14 Update for SI and RF Applications
Markus Kopp
Product Manager, Electronics
ANSYS, Inc.
© 2011 ANSYS, Inc. September 21, 2011
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Advanced Solvers:Finite Arrays with DDM
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Finite Arrays with Domain DecompositionEfficient solution for repeating geometries (array) with domain decomposition technique (DDM)
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Finite ArraysSolve large finite array designs
Efficient setup and solution
Define unit cell and array dimensions• Efficient geometry creation and
representation
Efficient Domain Decomposition solution
• Leverages repeating nature of array geometries
• Only mesh unit cell• Virtually repeat mesh throughout
array
Post-process full S-parameter• Couplings included• Edge effects included
3D field visualization
Far field patterns for full array
Memory efficient Enabled with the HFSS HPC product
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Finite Arrays by Domain Decomposition
• Each element in array treated as solution domain
• One compute engine can solve multiple element/domain in series
Distributes element sub-domainsto networked processors and memory
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Example: Skewed Waveguide Array
• 16X16 (256 elements and excitations)
• Skewed Rectangular Waveguide (WR90) Array– 1.3M Matrix Size
• Using 8 cores– 3 hrs. solution time– 0.4GB Memory total
• Using 16 cores– 2 hrs. solution time– 0.8GB Memory total
• Additional Cores– Faster solution time– More memory.
Unit cell shown with wireframe view of virtual array
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Skewed Waveguide Array
• Patterns from 8X8 Array– Dashed is
idealized infinite array analysis
– Solid from finite array analysis
• Two simulations use identical mesh
• Note edge effects due to finite array size
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HPC: Faster with additional coresLinux cluster• 16X Dell PowerEdge R610
– Dual six-core Xeon X5760, 8GB per core
Same 8X8 array of probe feed patch antennas
3M+ Matrix size, 64 excitations
Study performed using 101, 51 ,26, 11, 6 and 3 engines.*• 101 simulation time = 17 min., 20X faster than direct solver• *Three engines used as baseline
1
2
3
4
5
6
7
0 50 100 150
speed factor
speed factor
Number of cores
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Hybrid Solving: Finite Element-Boundary Integral
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• Antenna Placement Study: UHF Antenna on Apache UH64 airframe
– Finite Elements with DDM
– Boundary Integral (3D Method of Moments)
– Hybrid Finite Element-Boundary Integral (FE-BI)
Finite Element-Boundary IntegralSolving Larger Problems with Rigor
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Hybrid Solving: Finite Element- Boundary Integral
Apache helicopter• UHF antenna placement
study @ 900 MHz
Solution volume• 1,250 m3
• 33,750 λ3
Solution Specs• 72 engines
• Matrix size = 47M
• 6 adaptive passes
• 300 GB RAM
• 5 hr 30 min
Finite Elements with DDM
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Hybrid Solving: Finite Element- Boundary Integral
Apache helicopter• UHF antenna placement
study @ 900 MHz
Solution surface• 173 m2
• 1557 λ2
Solution Specs• 12 core MP
• 680k unknowns
• 9 adaptive passes
• 83 GB RAM
• 5 hr 28 min
Boundary Integral, 3D MoM with HFSS-IE
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Hybrid Solving: Finite Element- Boundary Integral
Apache helicopter• UHF antenna placement study @
900 MHz
FEM solution volume• 69 m3
• 1863 λ3
IE solution surface• 236 m2
• 2124 λ2
Solution Specs• 12 cores total using DDM with
MP• Matrix Size = 2.9M• 6 adaptive passes• 21 GB RAM• 1 hr 3 min
Hybrid Finite Element – Boundary Integral
Compared to 72 core FEM solution14X less memory5.5 times faster
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Hybrid Solving: IE Regions
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FEBI and Physically Separate “Domains”
1meter10λ
1meter20λ
1meter30λ
Frequency Memory Required
3 GHz 2GB
Frequency Memory Required
6 GHz 10GB
Frequency Memory Required
9GHz 30GB
Reflector with multiple FE-BI domains• Conducting reflector and feed horn each surrounded
by air with FEBI applied to surface of air volumes
– Provides integral equation “link” between FEM domains
• But 3D MoM solution from integral equations could be applied directly to conducting surface only
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HFSS Hybrid Solving – IE Regions
• Parallelized
– IE regions solved in parallel.
– Analogous to FEM domains
• Rigorous
– Multiple reflection
• Automated
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IE Dielectric Regions• Solve “large homogeneous blocks of dielectric” with a “boundary
condition”– Replace enclosed arbitrary dielectrics– Solve with multiple open or enclosed IE regions– Conducting IE regions may be inside dielectric IE regions
FEM
Conducting IE
Enclosed IE
Ground Penetrating RadarAntenna
Air
Surface
Soil
Mine
Different solution domains may be solved in parallel with DDM
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Physical Optics
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HFSS-IE PO
Asymptotic solver for extremely large problems• In HFSS-IE• Solves electrically huge problems
– And provides first pass “quick solution” for IE• Currents are approximated in illuminated regions
– Set to zero in shadow regions• No ray tracing or multiple “bounces”
Target applications:• Large reflector antennas• RCS of large objects such as a windmill
Option in solution setup for HFSS-IE.
Sourced by incident wave excitations• Plane waves or linked HFSS designs as a source
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Solver on Demand
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Solver on Demand: An ECAD Interface for HFSS
Problem Description:
1. Converting package and printed circuit board layout data to 3D mechanical CAD models creates a large amount of unnecessary overhead in the geometry database
2. A key capability needed for wide-spread use of HFSS as an extraction tool is to make it accessible to non experts
Solution:
1. When HFSS is used for package and PCB extraction a 2D Electrical CAD layout editor is better suited for model creation and setup
2. The Designer Layout editor with Solver on Demand improves HFSS accessibility for non-expert engineers who need to use HFSS for package and PCB extraction
– It provides an EMI solution for 2 layer pkg and board design with HFSS and PlanarEM
3. The Designer Layout editor with Solver on Demand significantly reduces the engineering time required to set up package and pcb models for extraction with HFSS
4. Cadence design flows allows a user to solve with HFSS from within the Cadence environment using Cadence Extracta and an IPC link
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Designer RF with HFSS - Solver on Demand
HFSS - Solver on Demand• Intuitive PCB design entry for HFSS
• Chips, packages, channels, modules, …
• Designer layouts simulated with HFSS– Automated boundary and port setups
– Finite dielectrics and ground supported
• Wave and Lumped Gap Port– Single ended and Differential
– Vertical and Horizontal
– Coaxial, CPW and Grounded CPW
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“HFSS for ECAD”
Two Design Flows for Electrical Design• Mechanical CAD
– Connectors, Waveguides
– HFSS
• Electric CAD (layout)
– PCBs, Packages, On-chip Passives
– HFSS - Solver on Demand
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Highly automated for in layout design environment– Primitives = traces, pads, bondwires, vias
– Net name definition
Significantly reduce engineering time interacting with software
Lightweight interface for geometrically complex structures
Direct import of Cadence products using Cadence Extracta– Allegro, APD, and SiP
Direct HFSS solve from within the Cadence environment – Virtuoso, Allegro, APD, and SiP
“HFSS for ECAD”
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Cadence SPB Integration
Cadence integration enables engineers to create an HFSS model that is ready to simulate directly from the Cadence user interface.
Advanced settings can be pre-defined in an XML-based control file to simplify setup for non-expert users.
Other features:• Critical net selection for extraction.
• Cut out and select critical geometry
• Manual or automatic extent definition.
• Port definition based on component pins or cutout edges. Definine wave ports at cutout extends
• Uses 3D information such as bondwire, ball and bump information from SiP to HFSS.
• Support for package, PCB and SiP flows.
• IPC interface enables real time feedback from HFSS to Cadence
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HFSS within Cadence SPB & Virtuoso
• Dynamic ECAD Flow
• Create and Solve models with HFSS from within Cadence SPB & Virtuoso
HFSS Solution Progress
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HFSS ECAD Layout Editor
• HFSS Solver Technology is embedded in Designer as “Solver on Demand”
Export 3D HFSS Model
Solve in Designer using HFSS
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HFSS Solve for PKG merged to PCB
Lumped ports on package bumps
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HFSS ECAD Layout Editor
Adapt HFSS mesh at multiple frequencies:
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HFSS ECAD Layout Editor
Surface roughness and etch factor can be defined in the stackup editor:
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Parameterized Padstacks
Enables parametric investigation of via geometry, or optimization.
Applied to global padstack definition. Therefore, project variables are used:
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Parameterized Differential Vias
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HFSS ECAD Layout Editor
ParameterizableEtch Factor
Parameterizable Surface Roughness
Automatic Causal Djordjevic Sarkar Dielectric Models
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Show Nets in HFSS for MCAD
“Show Nets” identifies 3D conducting paths between terminals
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Usability Enhancements
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General Enhancements• Save Radiated field data only
– Reduced the amount of stored data
• Import list for Edit Sources– Can include parametric variables
• Network Installation for clusters– Improved reliability on Linux
• Non-graphical solves without product-links• Solves are independent of Mainwin registry
– Installations on Windows• Non-graphical solves without product-links
• New Registry Configurations– Installation: Lowest precedence
– Defaults applicable to all users– Machine:
• Defaults applicable to all users on a machine.– User :
• Machine independent user specific default– User and machine: Highest precedence
• Defaults specific to user + machine
~10X Reduction
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3D Modeler Enhancements
View customization.
• 64-bit user interface
• Post process larger simulations
• Z-stretch
• Speed Improvements
• Faster geometry loading
• Improved solid modeler speed.
• Improvements for selecting complex objects.
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CAD Integration on WB Improvements
• CAD integration in ANSYS Workbench provides direct link to 3rd party CAD tools
• Such as ProEngineer, Catia, SpaceClaim
• Added support for parametric analysis and distributed solving of CAD parameter
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Ansoft to ANSYS Geometry Transfer• Geometry and material assignment transfer from Ansoft to ANSYS • Consume geometry from multiple upstream CAD sources
– Source can be any of CAD, DesignModeler or Ansoft products– Further geometry edits are possible in ANSYS Design Modeler
• Creates User Defined Model (UDM) for each geometry input.