Go Php45nq15t

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1. Product profile

1.1 General description

Standard level N-channel enhancement mode field effect transistor in a plastic package

using TrenchMOS technology.

1.2 Features

1.3 Applications

1.4 Quick reference data

2. Pinning information

[1] It is not possible to make a connection to pin 2 of the SOT404 package.

PHP/PHB45NQ15TN-channel TrenchMOS standard level FET

Rev. 01 8 November 2004 Product data sheet

Low on-state resistance Fast switching

Low thermal resistance Low gate charge.

DC-to-DC primary side switching AC-to-DC secondary side

rectification.

VDS 150 V ID 45.1 A

RDSon 42 m Qgd = 10.3 nC (typ).

Table 1: Discrete pinning

Pin Description Simplified outline Symbol

1 gate

SOT78 (TO-220AB) SOT404 (D2-PAK)

2 drain [1]

3 source

mb mounting base;

connected to drain

1 2

mb

3

1 3

2

mb

S

D

G

mbb076

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9397 750 14012 Koninklijke Philips Electronics N.V. 2004. All rights reserved.

Product data sheet Rev. 01 8 November 2004 2 of 13

Philips Semiconductors PHP/PHB45NQ15TN-channel TrenchMOS standard level FET

3. Ordering information

4. Limiting values

Table 2: Ordering information

Type number Package

Name Description Version

PHP45NQ15T TO-220AB Plastic single-ended package; heatsink mounted; 1 mounting hole; 3 lead

TO-220AB

SOT78

PHB45NQ15T D2-PAK Plastic single-ended surfacemounted package (D2-PAK); 3 leads (one lead

cropped)

SOT404

Table 3: Limiting valuesIn accordance with the Absolute Maximum Rating System (IEC 60134).

Symbol Parameter Conditions Min Max Unit

VDS drain-source voltage (DC) 25C Tj 175C - 150 V

VDGR drain-gate voltage (DC) 25C Tj 175C; RGS = 2 0 k - 150 V

VGS gate-source voltage (DC) - 20 V

ID drain current (DC) Tmb = 25C; VGS = 10 V; Figure 2 and 3 - 45.1 A

Tmb = 100C; VGS = 10 V; Figure 2 - 31.9 A

IDM peak drain current Tmb = 25C; pulsed; tp 10s; Figure 3 - 90.2 A

Ptot total power dissipation Tmb = 25C; Figure 1 - 230 W

Tstg storage temperature 55 +175 C

Tj junction temperature 55 +175 C

Source-drain diode

IS source (diode forward) current (DC) Tmb = 25C - 45.1 A

ISM peak source (diode forward) current Tmb = 25C; pulsed; tp 10s - 90.2 A

Avalanche ruggedness

EDS(AL)S non-repetitive drain-source

avalanche energy

unclamped inductive load; ID = 19.1 A;

tp = 0.1 ms; VDD 150 V; RGS = 50;

VGS = 10 V; starting at Tj = 25C

- 180 mJ

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Fig 1. Normalized total power dissipation as a

function of mounting base temperature.

Fig 2. Normalized continuous drain current as a

function of mounting base temperature.

Tmb = 25C; IDMis single pulse; VGS = 1 0 V

Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage.

03aa16

0

40

80

120

0 50 100 150 200Tmb(C)

Pder(%)

03aa24

0

40

80

120

0 50 100 150 200

Tmb(C)

Ider

(%)

Pde r

Pto t

Pt o t 2 5 C ( )

----------------------- 100%= Ide r

ID

ID 25 C( )

------------------- 100%=

03ao18

1

10

102

1 10 102 103

VDS(V)

ID(A)

DC

100 s

10 ms

Limit RDSon= VDS / ID

1 ms

tp= 10 s

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5. Thermal characteristics

5.1 Transient thermal impedance

Table 4: Thermal characteristics

Symbol Parameter Conditions Min Typ Max Unit

Rth(j-mb) thermal resistance from junction to mounting base Figure 4 - - 0.65 K/W

Rth(j-a) thermal resistance from junction to ambient

SOT78 vertical in free air - 60 - K/W

SOT404 mounted on a printed-circuit

board; minimum footprint;

vertical in still air

- 50 - K/W

Fig 4. Transient thermal impedance from junction to mounting base as a function of pulse duration.

03ao17

10-3

10-2

10-1

1

10

10-5 10-4 10-3 10-2 10-1 1tp(s)

Zth(j-mb)(K/W)

single pulse

= 0.5

0.2

0.1

0.05

0.02

tpT

P

t

tp

T =

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6. Characteristics

Table 5: Characteristics

Tj= 25C unless otherwise specified.

Symbol Parameter Conditions Min Typ Max Unit

Static characteristics

V(BR)DSS drain-source breakdown voltage ID = 250A; VGS = 0 V

Tj = 25C 150 - - V

Tj =55C 135 - - V

VGS(th) gate-source threshold voltage ID = 1 mA; VDS = VGS; Figure 9 and 10

Tj = 25C 2 3 4 V

Tj = 175C 1 - - V

Tj =55C - - 4.4 V

IDSS drain-source leakage current VDS = 120 V; VGS = 0 V

Tj = 25C - - 1 A

Tj = 175C - - 100 A

IGSS gate-source leakage current VGS =20 V; VDS = 0 V - 10 100 nA

RDSon drain-source on-state resistance VGS = 10 V; ID = 20 A; Figure 6 and 8

Tj = 25C - 34 42 m

Tj = 175C - 91.8 113.4 m

Dynamic characteristics

Qg(tot) total gate charge ID = 25 A; VDS = 75 V; VGS = 10 V;

Figure 11

- 32 - nC

Qgs gate-source charge - 5.6 - nC

Qgd gate-drain (Miller) charge - 10.3 - nC

Ciss input capacitance VGS = 0 V; VDS = 25 V; f = 1 MHz;

Figure 13

- 1770 - pF

Coss output capacitance - 290 - pF

Crss reverse transfer capacitance - 90 - pF

td(on) turn-on delay time VDS = 75 V; RL = 3;

VGS = 10 V; RG = 5.6

- 11.5 - ns

tr rise time - 22 - ns

td(off) turn-off delay time - 42 - ns

tf fall time - 31 - ns

Source-drain diode

VSD source-drain (diode forward) voltage IS = 25 A; VGS = 0 V; Figure 12 - 0.88 1.2 V

trr reverse recovery time IS = 20 A; dIS/dt =100 A/s; VGS = 0 V - 115 - ns

Qr recovered charge - 360 - nC

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Tj = 25C Tj = 25C

Fig 5. Output characteristics: drain current as a

function of drain-source voltage; typical values.

Fig 6. Drain-source on-state resistance as a function

of drain current; typical values.

Tj = 25C and 175C; VDS > ID RDSon

Fig 7. Transfer characteristics: drain current as a

function of gate-source voltage; typical values.

Fig 8. Normalized drain-source on-state resistance

factor as a function of junction temperature.

03ao19

0

10

20

30

40

50

0 1 2 3 4VDS(V)

ID(A)

Tj= 25 C

VGS= 3.6 V

10 V

3.8 V

4 V

4.2 V

4.4 V

5 V

4.6 V

4.8 V

03ao20

0

20

40

60

80

0 10 20 30 40 50ID(A)

RDSon(m) 4.6 VVGS= 4.4 V

Tj= 25 C

10 V

5 V

4.8 V

03ao21

0

10

20

30

40

50

0 2 4 6VGS(V)

ID(A)

VDS> IDx RDSon

Tj= 25 C175 C

03al51

0

0.5

1

1.5

2

2.5

3

-75 -25 25 75 125 175Tj(C)

a

aRDS on

RDS on 25 C( )

-----------------------------=

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ID = 1 mA; VDS = VGS Tj = 25C; VDS = 5 V

Fig 9. Gate-source threshold voltage as a function of

junction temperature.

Fig 10. Sub-threshold drain current as a function of

gate-source voltage.

ID = 25 A; VDS = 30 V, 75 Vand 120 V

Fig 11. Gate-source voltage as a function of gate charge; typical values.

03aa32

0

1

2

3

4

5

-60 0 60 120 180Tj(C)

VGS(th)(V)

max

min

typ

03aa35

10-6

10-5

10-4

10-3

10-2

10-1

0 2 4 6VGS(V)

ID(A)

maxtypmin

03ao24

0

2

4

6

8

10

0 10 20 30 40QG(nC)

VGS(V)

ID= 25 A

Tj = 25 C

VDS= 30 V 75 V

120 V

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Tj = 25C and 175C; VGS = 0 V VGS = 0 V; f = 1 MHz

Fig 12. Source (diode forward) current as a function of

source-drain (diode forward) voltage; typical

values.

Fig 13. Input, output and reverse transfer capacitances

as a function of drain-source voltage; typical

values.

03ao22

0

10

20

30

40

50

0 0.3 0.6 0.9 1.2VSD(V)

IS(A)

Tj= 25 C175 C

VGS= 0 V

03ao23

10

102

103

104

10-1 1 10 102VDS(V)

C

(pF)

Ciss

Coss

Crss

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7. Package outline

Fig 14. SOT78 (TO-220AB) package outline.

REFERENCESOUTLINE

VERSION

EUROPEAN

PROJECTIONISSUE DATE

IEC JEDEC JEITA

SOT78 SC-463-lead TO-220AB

D

D1

q

p

L

1 2 3

L1(1)

b1

e e

b

0 5 10 mm

scale

Plastic single-ended package; heatsink mounted; 1 mounting hole; 3-lead TO-220AB SOT78

DIMENSIONS (mm are the original dimensions)

AE

A1

c

Note

1. Terminals in this zone are not tinned.

Q

L2

UNIT A1 b1 D1 e p

mm 2.54

q QA b DcL2

max.

3.03.8

3.6

15.0

13.5

3.30

2.79

3.0

2.7

2.6

2.2

0.7

0.4

15.8

15.2

0.9

0.6

1.3

1.0

4.5

4.1

1.39

1.27

6.4

5.9

10.3

9.7

L1(1)E L

01-02-16

03-01-22

mounting

base

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Fig 15. SOT404 (D2-PAK) package outline.

UNIT A

REFERENCESOUTLINE

VERSION

EUROPEAN

PROJECTIONISSUE DATE

IEC JEDEC JEITA

mm

A1 D1D

max.E e Lp HD Qc

2.54 2.60

2.20

15.80

14.80

2.90

2.1011 1.60

1.20

10.30

9.70

4.50

4.10

1.40

1.27

0.85

0.60

0.64

0.46

b

DIMENSIONS (mm are the original dimensions)

SOT404

0 2.5 5 mm

scale

Plastic single-ended surface mounted package (D2-PAK); 3 leads (one lead cropped) SOT404

e e

E

b

D1

HD

D

Q

Lp

c

A1

A

1 3

2

mounting

base

01-02-12

04-10-13

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8. Revision history

Table 6: Revision history

Document ID Release

date

Data sheet

status

Change

notice

Doc. number Supersedes

PHP_PHB45NQ15T_1 20041108 Product

data sheet

- 9397 750 14012 -

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9. Data sheet status

[1] Please consult the most recently issued data sheet before initiating or completing a design.

[2] The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet atURL http://www.semiconductors.philips.com.

[3] For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.

10. Definitions

Short-form specification The data in a short-form specification is

extracted from a full data sheet with the same type number and title. For

detailed information see the relevant data sheet or data handbook.

Limiting values definition Limiting values given are in accordance with

the Absolute Maximum Rating System (IEC 60134). Stress above one or

more of the limiting values may cause permanent damage to the device.

These are stress ratings only and operation of the device at these or at any

other conditions above those given in the Characteristics sections of the

specification is not implied. Exposure to limiting values for extended periods

may affect device reliability.

Application information Applications that are described herein for any

of these products are for illustrative purposes only. Philips Semiconductorsmake no representation or warranty that such applications will be suitable for

the specified use without further testing or modification.

11. Disclaimers

Life support These products are not designed for use in life support

appliances, devices, or systems where malfunction of these products can

reasonably be expected to result in personal injury. Philips Semiconductors

customers using or selling these products for use in such applications do so

at their own risk and agree to fully indemnify Philips Semiconductors for any

damages resulting from such application.

Right to make changes Philips Semiconductors reserves the right to

make changes in the products - including circuits, standard cells, and/or

software - described or contained herein in order to improve design and/or

performance. When the product is in full production (status Production),

relevant changes will be communicated via a Customer Product/Process

Change Notification (CPCN). Philips Semiconductors assumes no

responsibility or liability for the use of any of these products, conveys no

license or title under any patent, copyright, or mask work r ight to these

products, and makes no representations or warranties that theseproductsare

free from patent, copyright, or maskwork right infringement, unless otherwise

specified.

12. Trademarks

TrenchMOS is a trademark of Koninklijke Philips Electronics N.V.

13. Contact information

For additional information, please visit: http://www.semiconductors.philips.comFor sales office addresses, send an email to: [email protected]

Level Data sheet status[1] Product status [2][3] Definition

I Objective data Development This data sheet contains data from the objective specification for product development. Philips

Semiconductors reserves the right to change the specification in any manner without notice.

II Preliminary data Qualification This data sheet contains data from the preliminaryspecification. Supplementarydata will be published

at a later date. Philips Semiconductors reserves the right to change the specification without notice, in

order to improve the design and supply the best possible product.

III Product data Production This data sheet contains data from the product specification. Philips Semiconductors reserves the

right to make changes at any time in order to improve the design, manufacturing and supply. Relevant

changes will be communicated via a Customer Product/Process Change Notification (CPCN).

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Koninklijke Philips Electronics N.V. 2004

All rights are reserved. Reproduct ion in whole or in part is prohibited without the priorwritten consent of the copyright owner. The information presented in this document doesnot form part of anyquotationor contract, is believed to be accurate and reliable and maybe changed without notice. No liab ility will be accepted by the pub lisher for anyconsequence of its use. Publication thereof does not convey nor imply any license underpatent- or other industrial or intellectual property rights.

Date of release: 8 November 2004Document number: 9397 750 14012

Published in The Netherlands


14. Contents

1 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1

1.1 General description. . . . . . . . . . . . . . . . . . . . . . 1

1.2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

1.3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

1.4 Quick reference data. . . . . . . . . . . . . . . . . . . . . 1

2 Pinning information. . . . . . . . . . . . . . . . . . . . . . 1

3 Ordering information. . . . . . . . . . . . . . . . . . . . . 2

4 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2

5 Thermal characteristics. . . . . . . . . . . . . . . . . . . 4

5.1 Transient thermal impedance . . . . . . . . . . . . . . 4

6 Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 5

7 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 9

8 Revision history. . . . . . . . . . . . . . . . . . . . . . . . 11

9 Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 12

10 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

11 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

12 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

13 Contact information . . . . . . . . . . . . . . . . . . . . 12

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