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0 ĐẠI HỌC BÁCH KHOA HÀ NỘI TRUNG TÂM ĐÀO TẠO TÀI NĂNG VÀ CHẤT LƢỢNG CAO GIÁO TRÌNH CƠ SỞ VÀ PHÁT TRIỂN AVR Giảng viên hướng dẫn : PGS.PHAN BÙI KHÔI Sinh viên : NGUYỄN VĂN TOẢN SHSV: 20092792 LÊ MINH NGHĨA 20091878 DƢƠNG VĂN HÀ 20090882 Lớp : KSTN-CƠ ĐIỆN TỬ K54 HÀ NỘI, 6/2013
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Giao Trinh Vi Dieu Khien Avr 5881

Nov 25, 2015

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  • 0

    I HC BCH KHOA H NI

    TRUNG TM O TO TI NNG V CHT LNG CAO

    GIO TRNH C S V PHT TRIN AVR

    Ging vin hng dn : PGS.PHAN BI KHI

    Sinh vin : NGUYN VN TON SHSV: 20092792

    L MINH NGHA 20091878

    DNG VN H 20090882

    Lp : KSTN-C IN T K54

    H NI, 6/2013

  • 1

  • 2

    Li Ni u

    Vi nhim v c phn cng : Pht trin Kit vi iu khin AVR trong thi gian thc tp k thut ; bn cnh nhng kin thc sn c v vi iu khin AVR, cng thm mt s tm hiu b sung nhm em gm bn L Minh Ngha , Dng Vn H v Nguyn Vn Ton hon thnh tt nhim v c giao . C th, nhm thc hin test phn cng ca mt s b Kit bng code ring do nhm t vit, thm vo nhm thc hin mt s bi ton m rng : iu khin n giao thng ; iu khin v hin th tc ng c mt chiu, nhit v ng h thi gian thc bng my tnh PC v hin th ra LCD;iu khin ng c bng phm bm, nhn phm v hin th v tr ca phm c nhn . Nhm cng c , b sung l thuyt v a thm mt s kin ci tin hon thin b gio trnh AVR . Ton b cng vic nhm thc hin c trnh by c th trong ni dung gio trnh .

    Qua thi gian thc tp , nhm em thu nhn c rt nhiu kinh nghim cng nh tc phong lm vic thc t ; y thc s l nhng kin thc rt b ch nhm em tip cn vi mi trng lm vic chuyn nghip. Thay mt nhm , em xin c gi li cm n chn thnh nht ti PGS.PHAN BI KHI v thy PHM HNG THI to iu kin cho nhm em c c hi hc hi v nghin cu.

    Nhm em xin chn thnh cm n Thy !

  • 3

    Mc Lc

    BI 1 : GII THIU V VI IU KHIN AVR ................................................ 5 1. Gii thiu v vi iu khin ........................................................................... 5

    2. Gii thiu v vi iu khin AVR......6 3. Lp trnh cho AVR ...................................................................................... 8

    BI 2 : GIAO TIP VO RA I/O .................................................................. 1414 1. Gii thiu giao tip vo ra I/O ................................................................. 144

    2. Cch cu hnh chc nng IO .................................................................... 144

    3. V d minh ha ........................................................................................ 155

    BI 3 : GIAO TIP VI LED 7 THANH ...................................................... 1919 1. C bn v led 7 thanh ................................................................................ 19

    2. Nguyn l lp trnh cho led 7 thanh .......................................................... 200

    3. V d minh ha ........................................................................................ 211

    BI 4 : GIAO TIP VI BN PHM ................................................................ 27 1. C bn v phm bm .................................................................................. 27

    2. Chng trnh v d..................................................................................... 27

    3. K thut chng rung bn phm.................................................................... 28

    BI 5 : B CHUYN I ADC ....................................................................... 31 1. Gii thiu v ADC ................................................................................... 311

    2. Cch cu hnh ADC trong Code Vision cho Atmega32. .......................... 322

    3. V d minh ha ........................................................................................ 322

    BI 6 : GIAO TIP LCD ................................................................................... 36 1. Gii thiu v LCD 16x2 ............................................................................ 36

    2. Cch cu hnh cho LCD trong Code Vision cho Atmega32 ....................... 50

    3. Bi tp ....................................................................................................... 52

    BI 7 : GIAO TIP VI LED MA TRN ......... Error! Bookmark not defined.3 1. C bn v led ma trn .............................................................................. 533

    2. To font cho led ma trn .......................................................................... 533

    3. V d minh ha. ....................................................................................... 555

    BI 8: GIAO TIP MY TNH ....................................................................... 556

  • 4

    1. C bn v giao tip RS232 ...................................................................... 566

    2. Cch cu hnh module UART trong Code Vision ...................................... 57

    3. V d.......................................................................................................... 58

    BI 9 : GIAO TIP I2C .................................................................................... 677 1. Gii thiu chung v I2C ........................................................................... 677

    2. Module I2C trong Atmega32 .................................................................... 744

    3. V d.......................................................................................................... 80

    BI 10 : NG C BC ............................................................................. 844 1. C bn v ng c bc .......................................................................... 844

    2. Cc mch iu khin ng c bc ......................................................... 844

    3. V d........................................................................................................ 888

    BI 11 : GIAO TIP VI CNG LPT .............................................................. 90 1. C bn v cng LPT .................................................................................. 90

    2. V d minh ha ........................................................................................ 933

    BI 12 : GIAO TIP VI MA TRN PHM ................................................... 945 1. C bn v ma trn phm ........................................................................... 955

    2. V d minh ha ........................................................................................ 966

    BI 13 : TIMER ............................................................................................... 989

    1. Gii thiu v timer ................................................................................... 999

    2. V d minh ha ...................................................................................... 1088

    BI 14 : NGT ............................................................................................ 11111 1. Gii thiu v ngt ................................................................................ 11111

    2. Cc bc cu hnh cho ngt hot ng ................................................ 11313

    3. V d.................................................................................................... 11414

    BI 15 : IU KHIN NG C MT CHIU............................................ 117 1. Gii thiu v iu khin ng c mt chiu ............................................. 117

    2. V d minh ha ........................................................................................ 118

    BI 16 : GIAO TIP VI GLCD..................... Error! Bookmark not defined.20 1. C bn v GLCD ..................................... Error! Bookmark not defined.20

    2. V d minh ha ........................................ Error! Bookmark not defined.24

    BI TON M RNG ...130

  • 5

    BI 1 : GII THIU V VI IU KHIN AVR - Gii thiu chung v vi iu khin.

    - Gii thiu v vi iu khin Atmega32.

    - Lp trnh cho Atmega32.

    1. Gii thiu v vi iu khin

    Khi nim vi iu khin (microcontroller MC) kh quen thuc vi cc sinh vin CNTT, in t, iu khin t ng cng nh C in t N l mt trong nhng IC thch hp nht thay th cc IC s trong vic thit k mch logic. Ngy nay c nhng MC tch hp tt c cc chc nng ca mch logic. Ni nh vy khng c ngha l cc IC s cng nh cc IC mch s lp trnh c khc nh PLC khng cn dng na. MC cng c nhng hn ch m r rng nht l tc chm hn cc mch logic MC cng l mt my tnh my tnh nhng v n c y chc nng ca mt my tnh. C CPU, b nh chng trnh, b nh d liu, c I/O v cc bus trao i d liu.

    Cn phn bit khi nim MC vi khi nim vi x l (microprocessor MP) nh 8088 chng hn. MP ch l CPU m khng c cc thnh phn khc nh b nh I/O, b nh. Mun s dng MP cn thm cc chc nng ny, lc ny ngi ta gi n l h vi x l (microprocessor system). Do c im ny nn nu la chn gia MC v MP trong mt mch in t no th tt nhin ngi ta s chn MC v n s r tin hn nhiu do tch hp cc chc nng khc vo trong chip.

    Vy mt vi iu khin chy c th cn nhng iu kin g :

    - Th nht l ngun cp, ngun cp l ci u tin, c bn nht trong cc mch

    in t, v vn v ngun l 1 trong nhng vn rt au u. Khng c

    ngun th khng th gi l 1 mch in c. Ngun cp cho vi iu khin l

    ngun 1 chiu.

  • 6

    - Th hai l mch dao ng, mch dao ng lm g ? Gi s cc bn lp trnh cho con AVR : n thi im A lm 1 cng vic g , th th n ly ci g xc nh c thi im no l thi im A ? chnh l mch dao ng. V d nh mi ngi u thng nht vo mt gi chun lm vic. C h thng vi iu khin cng vy, c h thng khi u ly xung nhp clock xung nhp mch dao ng lm xung nhp chun hot ng.

    - Th ba l ngoi vi, ngoi vi y l cc thit b giao tip vi vi iu khin thc hin 1 nhim v no m vi iu khin a ra. V d nh cc bn mun iu khin ng c 1 chiu, nhng v vi iu khin ch a ra cc mc in p 0-5V, v dng iu khin c my chc mA, vi ngun cp ny th ko th ni trc tip ng c vo vi iu khin iu khin, m phi qua 1 thit b khc gi l ngoi vi, chnh xc hn y l driver, ngi ta dng driver c th iu khin c cc dng in ln t cc ngun in nh. Cc bn phm, cng tc l cc ngoi vi.

    - Th 4 l chng trnh, y l file .hex np cho vi iu khin, chng trnh chnh l thut ton m bn trin khai thnh cc cu lnh ri bin dch thnh m hex np vo vi iu khin.

    Cc cng c hc AVR : - Ngn ng lp trnh : C, ASM - Phn mm lp trnh : IAR, CodeVisionAVR - Mch np : STK200/300/500, Burn-E - Mch pht trin : Board trng, phn mm m phng, kit

    2. Gii thiu v vi iu khin AVR.

    AVR l h vi iu khin 8 bit theo cng ngh mi, vi nhng tnh nng rt mnh c tch hp trong chip ca hng Atmel theo cng ngh RISC, n mnh ngang hng vi cc h vi iu khin 8 bit khc nh PIC, PSoC. Do ra i mun hn nn h vi iu khin AVR c nhiu tnh nng mi p ng ti a nhu cu ca ngi s dng, so vi h 8051, 89xx s c n nh, kh nng tch hp, s mm do trong vic lp trnh v rt tin li.

    Cc tnh nng mi ca h AVR:

    Giao din SPI ng b.

    Cc ng dn vo/ra (I/O) lp trnh c.

    Giao tip I2C.

    B bin i ADC 10 bit.

  • 7

    Cc knh bm xung PWM.

    Cc ch tit kim nng lng nh sleep, stand by..vv.

    Mt b nh thi Watchdog.

    3 b Timer/Counter 8 bit.

    1 b Timer/Counter 16 bit.

    1 b so snh analog.

    B nh EEPROM.

    Giao tip USART..vv.

    Atmelga32 c y tnh nng ca h AVR, v gi thnh so vi cc loi khc th gi thnh l va phi khi nghin cu v lm cc cng vic ng dng ti vi iu khin. Tnh nng : B nh 32KB Flash c kh nng c, ghi 10000 ln

    1024 byte EEPROM c kh nng c, ghi 100000 ln.

    2KB SRAM.

    8 knh u vo ADC 10 bit.

    ng v 40 chn , trong c 32 chn vo ra d liu chia lm 4 PORT

    A,B,C,D. Cc chn ny u c ch pull_up resistors.

    H tr cc giao tip UART, SPI, I2C.

    1 b so snh analog, 4 knh PWM.

    2 b timer/counter 8 bit, 1 b timer/counter1 16 bit.

    1 b nh thi Watchdog.

  • 8

    S chn Atmega32

    M t chc nng cc chn ca atmega32

    - Vcc v GND 2 chn cp ngun cho vi iu khin hot ng.

    - Reset y l chn reset cng khi ng li mi hot ng ca h thng.

    - 2 chn XTAL1, XTAL2 cc chn to b dao ng ngoi cho vi iu khin, cc

    chn ny c ni vi thch anh (hay s dng loi 4M), t gm (22p).

    - Chn Vref thng ni ln 5v(Vcc), nhng khi s dng b ADC th chn ny

    c s dng lm in th so snh, khi chn ny phi cp cho n in p c

    nh, c th s dng diode zener:

    - Chn Avcc thng c ni ln Vcc nhng khi s dng b ADC th chn ny

    c ni qua 1 cun cm ln Vcc vi mc ch n nh in p cho b bin

    i.

    3. Lp trnh cho AVR

    Gii thiu lp trnh cho AVR, chng ta c th s dng 2 ngn ng c bn l C v

    ASM. Nhn chung, 2 ngn ng ny c nhng u v nhc im ring. Ngn ng ASM c u im l gn nh, gip ngi lp trnh nm bt su

    hn v phn cng. Tuy nhin li c nhc im l phc tp, kh trin khai v mt thut ton, khng thun tin xy dng cc chng trnh ln.

    Ngc li ngn ng C li d dung, tin li, d debug, thun tin xy dng cc chng trnh ln. Nhng nhc im ca ngn ng C l kh gip ngi lp trnh hiu bit su v phn cng, cc thanh ghi, tp lnh ca vi iu khin, hn

  • 9

    na, xt v tc , chng trnh vit bng ngn ng C chy chm hn chng trnh vit bng ngn ng ASM.

    Ty vo tng bi ton, tng yu cu c th m ta chn la ngn ng lp trnh cho ph hp.

    C rt nhiu phn mm lp trnh cho AVR, nh Code Vision, IAR, AVRStudio, trong Code Vision l mt trong nhng phn mm kh ni ting v ph bin. Trong khun kh gio trnh ny, chng ta s s dng phn mm Code Vision lp trnh cho AVR.

    Giao din phn mm Code Vision

    To project trong Code Vision : to Project mi chn trn menu: File -> New c nh sau:

  • 10

    Chn Project sau click chut vo OK c ca s hi xem c s dng Code Winzard khng:

    Chn Yes c ca s CodeWinzardAVR nh sau :

  • 11

    - S dng chp AVR no v thch anh tn s bao nhiu ta nhp vo tab Chip.

    khi to cho cc cng IO ta chuyn qua tab Ports.

    - Cc chn IO ca AVR mc nh trng thi IN, mun chuyn thnh trng thi

    OUT c th a cc mc logic ra ta click chut vo cc nt IN (mu trng)

    n chuyn thnh OUT trong cc Tab Port. Sau chn File -> Generate,

    Save and Exit.

  • 12

    Sau ta save project li :

    Ta c nh sau :

  • 13

    Nh vy l chng ta to xong project trong Code Vision.

  • 14

    BI 2 : GIAO TIP VO RA I/O

    - C bn v giao tip vo ra I/O

    - Cc cng trong atmega32 v c bn v chc nng ca cc cng

    - Cch cu hnh vo ra I/O

    - Vit chng trnh nhy led

    1. Gii thiu giao tip vo ra I/O

    Lp trnh I/O l lp trnh n gin v c bn nht, nhng li c s dng nhiu nht, chng ta iu khin on/off bng n, ng c, hay 1 thit b no cng l 1 dng ca iu khin I/O. gim bt s chn ra, mt s chn ca AVR l cc chn a chc nng, n phc v cho cc thit b ngoi vi. y khi nim thit b ngoi vi khng c ngha l 1 chip khc mua ri bn ngoi m l cc m un c tch hp sn trong chip nh cc m un ADC.... Khi cc thit b ngoi vi ny c enable th cc chn ny khng c s dng nh cc chn ca cc cng I/O thng thng na.

    2. Cch cu hnh chc nng IO Atmega32 c 4 cng vo ra l PORTA, PORTB, PORTC, PORTD. Khi xem xt n cc cng I/O ca AVR th ta phi xt ti 3 thanh ghi DDxn,PORTxn,PINxn.

    - Cc bit DDxn truy cp cho a ch xut nhp DDRx. Bit DDxn trong thanh

    ghi DDRx dng iu khin hng d liu ca cc chn ca cng ny.Khi

    ghi gi tr logic 0 vo bt k bit no ca thanh ghi ny th n s tr thnh li

    vo,cn ghi 1 vo bit th n tr thnh li ra.

    - Cc bit PORTxn truy cp ti a ch xut nhp PORTx. Khi PORTx c

    ghi gi tr 1 khi cc chn c cu to nh cng ra th in tr ko l ch

    ng(c ni vi cng). Ngt in tr ko ra, PORTx c ghi gi tr 0 hoc

    cc chn c dng nh cng ra.Cc chn ca cng l 3 trng thi khi 1 iu kin

    reset l tch cc thm ch xung ng h khng hot ng.

    - Cc bit PINxn truy cp ti a ch xut nhp PINx. PINx l cc cng ch

    c,cc cng ny c th c trng thi logic ca PORTx.PINx khng phi l

  • 15

    thanh ghi,vic c PINx cho php ta c gi tr logic trn cc chn ca

    PORTx.ch PINx khng phi l thanh ghi,vic c PINx cho php ta c gi

    tr logic trn cc chn ca PORTx.

    - Nu PORTxn c ghi gi tr logic 1 khi cc chn ca cng c dng nh

    chn ra ,cc chn c gi tr 1.Nu PORTxn ghi gi tr 0 khi cc chn ca

    cng c dng nh chn ra th cc chn c gi tr 0.

    - Cc cng ca AVR u c th c, ghi. thit lp 1 cng l cng vo, ra th

    ta tc ng ti cc bit DDxn, PORTxn, PINxn. Ta c th thit lp tng bit

    lm cng vo, ra c khng ch vi cng, nh vy ta c th x l ti tng bit,

    y chnh l im mnh ca cc dng Vi iu khin 8 bit.

    3. V d minh ha

    Chng trnh sau s lm nhp nhy c 8 led, led ni vo port A.

    Phn tch

    Chng trnh trn rt n gin, s thut ton ca chng trnh trn nh sau :

  • 16

    Sau khi vit xong chng trnh, chng ta nhn Shift+F9 bin dch. Nu chng trnh khng c li v bin dch thnh cng, s c thng bo nh sau :

  • 17

    np chng trnh cc bn cn cu hnh cho mch np. Vo menu: Settings -> Programmer c ca s nh sau :

    Mch np ta dng STK 200 do cc bn chn Kanda Systems STK200+/300. Nhp OK. Sau cc bn chn trn menu : Projects -> Configure c ca s nh sau:

    Sau bn chn Too/ Chip Programmer np cho AVR :

  • 18

    Chng ta c ca s nh sau :

    Cc bn cu hnh cc thng s cn thit, nh chn thch anh ni hay ngoi, cu hnh cc fuse bit ri nhn vo Program All np chng trnh.

  • 19

    BI 3 : GIAO TIP VI LED 7 THANH

    - C bn v led 7 thanh

    - Nguyn l lp trnh led 7 thanh.

    - V d minh ha

    1. C bn v led 7 thanh

    bi hc ny, chng ta s hc v giao tip gia AVR v led 7 thanh ,cc hin th s trn led 7 thanh , cng nh cc gii thut v qut led.

    Led 7 thanh l linh kin in t dng hin th s. u im ca led 7 thanh l gi thnh r, khong cch quan st xa v d dng trong lp trnh. Nhc im l led 7 thanh ch hin th c 1 s k t nht nh.

    Led 7 thanh c 2 loi l anot chung v catot chung. C hnh dng thc t v hnh dng nguyn l nh hnh sau :

    3

    7 6 4 2 1 10 9 5

    A B C D E F G DP

    8

    D12A

    Catot chung

    3

    7 6 4 2 1 10 9 5

    8

    D13A

    Anot chung

  • 20

    2. Nguyn l lp trnh cho led 7 thanh

    S ghp ni vi vi iu khin

    Led 7 thanh bao gm 7 thanh a,b,c,d,e,f,g v 1 thanh dp, mi thanh l mt led. Ty vo cch ni chung anot hay catot gia cc thanh m ta c 2 loi anot chung hoc catot chung.

    Nh hnh v trn, led 7 thanh c dng catot chung, mun thanh no sng, chng ta ch vic cp in p dng vo chn tng ng, khi led tng ng vi thanh s c phn cc thun v pht sng.

    V d nh hnh v trn, sng thnh hnh s 5, ta cn cc thanh a,f,g,c,d sng, khi ta cn cp mc logic 1 (tng ng vi in p 5V) vo cc chn tng ng, v kt qu l ta c 1 chui s nh phn 10110110, hay dng m hex : 0xB6.

    Bng cch tng t, ta cng to c gi tr (m) xut ra port ca vi iu khin led sng cc s t 0 n 9. Ngi ta thng to ra 1 bng m nh vy nh vy tin s dng.

    LED 7 thanh anot chung v LED 7 thanh catot chung c mt c im khc nhau quan trng cn phi nh khi lp trnh cho n l : Vi loi anot chung th ta phi ni u anot chung vi ngun 5V th cc thanh LED mi sng , ngc li vi loi catot chung th ta phi ni u catot vi t. Vi tng cch ni phn cng m ta c m LED ring, v vy ngi lp trnh cn phi bit cch mc LED 7segment th no to ra m LED cho ng.

  • 21

    3. V d minh ha

    v d sau, chng ta s hin th ln lt cc s t 0 n 9 ln led 7 thanh.

    S mch :

    Bng m ha cc ch s

  • 22

    Chng trnh

    Trong chng trnh trn, cc cu lnh cu hnh tng t nh phn trc, chng ta ch phn tch v thut ton.

    Bin font[] l mt mng s kiu char, dng lu tr cc m ca cc s tng ng, v d s 0 s c m l phn t u tin ca mng : font[0] hay 0xC0, tng t, s 1 s c m l font[1] hay 0xF9

    Ln lt chng ta xut tng phn t ca mng font[] ra cng ni vo led (port B), khi chy chng trnh, chng ta s thy led sng t 0 n 9.

    Cch giao tip vi nhiu led

    Chng ta c th s dng nhiu port giao tip vi nhiu led 7 thanh, mi led ni vi 1 port khc nhau, tuy nhin, vi iu khin, v d nh dng 16F887 ch c 4 port 8 bit, nu lm nh vy, chng ta ch c th giao tip vi nhiu nht l 4 led 7 thanh.

    gii quyt vn trn, ngi ta s dng 1 phng php l qut led, ti mt thi im ch c mt led sng, mi led s sng trong mt khong thi gian nht nh, sau led tt v led k tip li sng. Lm nh vy, vi khong thi gian sng/tt rt nhanh, mt chng ta khng th phn bit c s ri rc v kt qu l chng ta s thy led sng lin tc. Vi phng php qut led, ngi ta chia ra lm 2 ng : ng iu khin v ng d liu, ng d liu c ni vo cc thanh a, b,c,d,e,f,g, ng iu khin dng bt/tt cc led.

  • 23

    V d nh hnh v trn, chng ta ch cn dng 2 port iu khin 4 led, port d liu l port 2 v port iu khin l port 1.

    Bi tp

    - Vit chng trnh hin th s 1234 led 4 led 7 thanh theo nh gi trn.

    - Vit chng trnh m trong 1 khong bt k nh hn 9999, v d t 1000 n

    65535. S m c hin th ln 4 led 7 thanh.

    Hng dn : hin th s 1234 ta dng PORTB truyn d liu s ra LED v PORTA iu khin qut LED. Chng trnh c vit nh sau: (PORTB ng vai tr nh PORT2 v PORTA ng vai tr nh PORT1 trn hnh v):

    #include #include

    unsigned char code[]={0x3F,0x06,0x5B,0x4F,0x66,0x6D,0x7D,0x07,0x7F,0x6F} ;

    void main(void)

    {

    DDRB=0xFF; //PORTB la cong ra DDRA=0xFF; // PORTA la cong ra

    PORTA=0x00;

  • 24

    while (1)

    { PORTA.0=1; // PORTA.0 dieu khien LED 1

    PORTB=code[1];

    PORTA.0=0;

    delay_ms(50); PORTA.1=1; // PORTA.1 dieu khien LED 2

    PORTB=code[2];

    PORTA.1=0; delay_ms(50);

    PORTA.2=1; // PORTA.2 dieu khien LED 3

    PORTB=code[3]; PORTA.2=0;

    delay_ms(50);

    PORTA.3=1; // PORTA.3 dieu khien LED 4

    PORTB=code[4]; PORTA.3=0;

    delay_ms(50);

    };

    }

    Nh bn thy; phng php qut LED bng Tranzitor nh trn va km hiu qu v phn cng v va km hiu qu v phn mm . C th : V phn cng nu ta qut n LED th ta s mt 1 PORT ca vi iu khin truyn d liu v n cng ra khc ca vi iu khin iu khin cc LED; l nhc im th nht nhng cha hn quan trng . V phn mm : bi v qut LED bng Tranzitor bn khng th cu trc chng trnh khc code trn, nu nhn vo code th bn thy chip phi lm vic lin tc vi ch mt cng vic l chn LED v gi d liu ra LED, c th chip s lm vic gn nh ht cng sut m ch lm c mt vic hin th LED . Theo kinh nghim thc tin khi m phng v khi lm mch tht th ti thy nu ch qut LED theo phng php trn thi th chip lm vic t nht 80% cng sut . Ni mt cch n gin, nu qut LED nh vy th chip ca bn s khng lm thm c vic khc. V tt nhin bn khng th dng c con vi iu khin ch lm mt mc ch duy nht l qut LED. Ti c mt gii php hu hiu gii quyt cc vn trn l s dng IC ghi dch cht d liu 74HC595, u vo ni tip u ra song song.Vi IC ny th bn ch mt 3 chn vi iu khin hin th ra s lng LED ty chn, khng hn ch s lng . Bn cnh , v l IC ghi dch cht d liu nn hin th mt s bt k ra LED th bn ch cn truyn d liu mt ln nn bn s qun l chng trnh ca bn chip ch phi lm vic v cng t khi hin th LED. Theo kinh nghim th ti dng ch mt con ATmega8 : iu khin ng c, o tc ng c, hin th ng h thi gian thc, o nhit mi

  • 25

    trng,giao tip truyn nhn vi my tnh, v cc gi tr trn u c hin th ra LED 7 seg vy m chip ch lm vic xp x 50% cng sut.

    V IC 74HC595 bn c th tm hiu thm trong datasheet ca n. gip bn hiu r hn th ti s lm v d trn dng 74HC595. Ti vit thnh mt hm truyn nhn tin s dng:

    Ty vo mc ch s dng bn c th nh thi nh khong thi gian hin th ra LED nu s n thy i theo thi gian ( v d nh khi o tc ng c, o nhit , hin th ng h thi gian thc ), v vn nh thi th bn cn tm hiu trong bi Timer.

    #include

    unsigned char code[]={0x7E,0x4F,0x12,0x06,0x4C,0x24,0x20,0x0F,0x00,0x04} ;

    // unsigned char code[]={0x01,0x2F,0x18,0x0A,0x26,0x42,0x40,0x0F,0x00,0x02};

    void HienThi (unsigned int n) // n bat ki, trong vi du nay ta su dung n la mot so co 4 chu so {

    unsigned int a[4];

    unsigned char i,j;

    a[3]=n/1000;a[2]=(n%1000)/100;a[1]=((n%1000)%100)/10;a[0]=((n%1000)%100)%10; for (i=0;ij)&(0x01);

    PORTC.2=1;

    PORTC.2=0; }

    PORTC.3=1;

    PORTC.3=0;

    }

    void main(void)

    { DDRC=0xFF; // PORTC la cong ra

    HienThi(1234);

    while (1)

    {

    }; }

  • 26

    Kt qu m phng :

    Lu : Khi ni tip cc 74HC595 th chn 9 ca 74HC595 trc ni vi chn data ca 74HC595 sau ( nh hnh m phng) , thm na l khi m phng chn MR (chn 10) v chn OE (chn 13) c th trng nhng trn mch tht nu ta khng ni chn MR vi ngun 5V v OE vi t th khng th hin th ra LED c, li ny ti gp khi lm .

  • 27

    BI 4 : GIAO TIP VI BN PHM

    - C bn v phm bm.

    - Chng trnh v d giao tip vi phm bm

    1. C bn v phm bm

    Bn phm c s dng trong rt nhiu cc thit b, gip ngi s dng la chn cc chc nng ca thit b. C th ni giao tip bn phm l mt ng dng kh quan trng. Phm bm thng dng nht c cu to gm 2 u tip xc, mi khi chng ta bm phm, 2 u ny s chm vo nhau (xem hnh v s nguyn l bn di). Ngoi ra cn nhiu loi phm bm khc, v cu to cng khc, c th l phm bm thng ng, khi ta bm phm th 2 u tip xc khng thng nhau. Hoc cng c loi phm bm cm ng, da trn s thay i in tr ca mng in tr, hoc da trn s thay i in dung hay in cm mi khi c tay ngi chm vo.

    2. Chng trnh v d

    v d ny ,chng ta s lp trnh dng bn phm iu khin cc con led bt tt theo mun.

    S nguyn l

  • 28

    C 8 phm bm, c ni vi port D, cc led n c ni vo port. Chng ta s lp trnh xem trng thi ca port D (trng thi ca cc phm bm) bng cch quan st trng thi ca led.

    Chng trnh :

    Phn tch chng trnh :

    Chng trnh trn rt n gin, chng ta set port B l port ra, port D l port vo, sau chng ta lin tc ly gi tr ca port D gn cho gi tr ca port B

    thng qua cu lnh : PORTB = PIND;

    3. K thut chng rung bn phm

    V sao phi chng rung : Bn phm ca chng ta l bn phm c hc, b mt tip xc ca c cu bn

    trong phm khng phi l phng l tng, do vy, mi khi bm phm hay nh phm, xung vo vi iu khin s khng phi l 1 xung thng ng, m l rt nhiu xung kim. V thi gian qut ca vi iu khin rt nhanh, nn tt c cc gi tr ti thi im rung u c ghi li. Chng ta phi tm cch sao cho vi iu khin khng ly gi tr ti thi im rung.

  • 29

    S xung khi bm phm

    Thi im 2 v 4 (xung mu ) trong hnh trn l thi im m khi ta bt u nhn phm v khi bt u nh phm, thi im 1 v 5 l thi im phm trng thi n nh khi c nh hon ton, thi im 3 l thi im phm trng thi n nh khi ang c nhn.

    C 2 phng php chng rung l chng rung bng phn cng v chng rung bng phn mm.

    Chng rung bng phn cng Chng ta mc thm t ni song song vi phm bm, thng l t 104, t ny

    c tc xng hp th cc xung nhn i vo chn vi iu khin, nh vy s trit tiu hon ton cc xung kim.

    Chng rung bng phn mm

    Mi khi pht hin c tn hiu bm phm, chng ta cho vi iu khin khng c lin tc gi tr ca phm na bng cch cho delay mt khong thi gian, khong trn 10ms, sau khong thi gian , chng ta li c phm nh bnh thng. V d code nh sau :

    If(pht hin bm phm){

    Delay_ms(10);

    Tip tc lm cc cng vic khc

    }

  • 30

    Bi tp

    - Vit chng trnh giao tip vi phm bm v led 7 thanh, mi khi bm phm, s

    trn led li tng ln 1 n v. Khi s tng n 9 m bm tip th s tr v 0.

  • 31

    BI 5 : B CHUYN I ADC

    - Gii thiu v ADC.

    - Cch cu hnh s dng module ADC trong Code Vision cho Atmega32

    - V d

    1. Gii thiu v ADC

    Chng ta bit rng cc tn hiu th gii xung quanh chng ta ton l cc tn hiu tng t : dng in 220VAC, dng in 5V, sc gi, tc ng c, tuy nhin vi iu khin ch x l c cc tn hiu s : 10101, nh vy, cn phi c 1 thit b no chuyn i qua li gia 2 loi tn hiu ny, l l do v sao chng ta c cc b ADC v DAC.

    ADC l 1 thit b dng chuyn i tn hiu tng t thnh tn hiu s. Cn DAC th ngc li, chuyn tn hiu s thnh tn hiu tng t.

    Atmega32 c 8 chn ca PORTA s dng lm 8 knh u vo ADC. s dng tnh nng ADC ca Atmega32 chng ta cn phi thit k phn cng ca Vi iu khin nh sau : - Chn AVCC chn ny bnh thng khi thit k mch chng ta a ln

    Vcc(5V) nhng khi trong mch c s dng cc knh ADC ca phn cng th

    chng ta phi ni chn ny ln Vcc qua 1 cun cm nhm mc ch cp ngun

    n nh cho cc knh (u vo) ca b bin i.

    - Chn AREF chn ny cn cp 1 gi tr in p n nh c s dng lm in

    p tham chiu, chnh v vy in p cp vo chn ny cn n nh v khi n

    thay i lm gi tr ADC cc knh thu c b tri (thay i ) khng n nh

    vi 1 gi tr u vo chng ta c cng thc tnh nh sau:

    ADCx=(V_INT*1024)/ AREF

    Chng ta thy gi tr ADCx t l thun vi in p vo V_INT. Gi tr ADC thu c t cc knh c lu vo 2 thanh ghi ADCH v ADCL khi s dng chng ta phi c gi tr t cc thanh ghi ny, khi s dng ch 8 bt th ch lu vo thanh ghi ADCL.

    Cc thanh ghi lin quan

    ADMUX (ADC Mutiplexer Selection Register) : L thanh ghi iu khin vic chn in p tham chiu, knh v ch hot ng ca ADC.

  • 32

    ADCSRA (ADC Control and Status Register A) : L thanh ghi iu khin hot ng v cha trng thi ca module ADC.

    ADCL v ADCH (ADC Data Register) : L 2 thanh ghi cha gi tr ca ADC sau qu trnh chuyn i.

    C th v ngha ca cc bit trong cc thanh ghi ny, cc bn c th tham kho trong datasheet ca Atmega32.

    Ty vo cch ta set cc thanh ghi nh th no m ta chn c in p tham chiu, phn gii,ch chuyn i n knh, chuyn i a knh nh mong mun.

    2. Cch cu hnh ADC trong Code Vision cho Atmega32.

    Sau y l cc bc cu hnh module ADC hot ng :

    - Chn in p tham chiu, knh c ADC (ADMUX)

    - Cho php module ADC hot ng (ADCSRA)

    - Cho php qu trnh chuyn i din ra v c gi tr sau khi chuyn i.

    3. V d minh ha

    Trong v d sau, chng ta s c gi tr ca ADC c ni vo chn A0, gi tr ADC sau khi chuyn i c xut ra port B v D

  • 33

    Chng trnh

  • 34

    Bi tp Bn hy phn tch chng trnh trn v ch ra cc ch hot ng ca module ADC c cu hnh nh trn.

    c th hn v chc nng ca chuyn i ADC ta nu ra mt th d : o nhit mi trng v hin th kt qu ra LED 7 segment. Cch lm tng t trn, y ti ch a ra code v kt qu m phng :

    Lu hm HienThi ta vit phn hin th LED 7seg nn ta ch vic s dng, lu l s n thay v 4 ch s th ta thay bng s c hai ch s v nhit mi trng ch nm trong phm vi hai ch s. Thm vo , do nhit l i lng bin i chm nn ta quy nh c sau mt khong thi gian bng hai ln Timer0 ngt th ta c gi tr nhit 1 ln, vi chu k c kh nh th nhit c c l kh chnh xc. ng nhin phn Timer bn phi tm hiu bi sau. Thm na l ta dng LM35 o nhit , c 10C ng vi 10mV nn (bn nn ch chuyn i cho ng).

    #include

    #include

    #define ADC_VREF_TYPE 0x00

    unsigned char input; unsigned char code[]={0x7E,0x4F,0x12,0x06,0x4C,0x24,0x20,0x0F,0x00,0x04} ;

    unsigned int read_adc(unsigned char adc_input) //adc_channel

    { ADMUX=adc_input | (ADC_VREF_TYPE & 0xFF);

    delay_us(10);

    ADCSRA|=0x40; while ((ADCSRA & 0x10)==0);

    ADCSRA|=0x10;

    return ADCW;

    } // Auto Update Value

    interrupt [ADC_INT] void adc_isr(void) {

    input=read_adc(0); ADCSRA|=0x40;//START CONVERTSION

    }

    unsigned char k; void HienThi(unsigned char);

    interrupt [TIM0_OVF] void timer0_ovf_isr(void)

    {

    TCNT0=0x00; k=k+1;

    if(k==2)

    { k=0;

    HienThi(500*input/1023);

  • 35

    ADCSRA|=0x40;

    } }

    void main(void)

    {

    DDRC=0xFF; DDRA=0x00;

    //Timer 0

    TCCR0=0x05; TCNT0=0x00;

    TIMSK=0X01;

    // Set ADC ADMUX=ADC_VREF_TYPE &0xFF ;

    ADCSRA=0xCF;// 11010111 ADEN=1;ADIE=1, PrescalE=128

    #asm("sei")

    while (1) {

    };

    }

  • 36

    BI 6 : GIAO TIP LCD

    - Gii thiu v LCD 16x2, Lp trnh

    - Cch cu hnh cho LCD trong Code Vision cho Atmega32

    1. Gii thiu v LCD 16x2, Lp trnh

    Ging nh led 7 thanh, LCD l mt thit b ngoi vi dng giao tip vi ngi dng, so vi led 7 thanh th LCD c u im l hin th c tt c cc k t trong bng m ascci, trong khi led 7 thanh ch hin th c mt s k t, nhng LCD li c nhc im l gi thnh cao v khong cch nhn gn. LCD l t vit tt ca Liquid Crystal Display (mn hnh tinh th lng). C nhiu loi mn hnh LCD vi cc kch c khc nhau, v d nh LCD 16x1 (16 ct v 1 hng), LCD 16x2 (16 ct v 2 hng), LCD 20x2 (20 ct v 2 hng) Trong bi hc ny, ta xt loi LCD 16x2 bn ph bin trn th trng.

    S nguyn l ca LCD 16x2

    Hnh dng thc ca 1 LCD 16x2 (16 hng, 2 ct). LCD c hai thanh ram l DDRAM thanh ny cha m lnh ca LCD; CGRAM cha m k t. truy cp vo 2 thanh ram ny ta c 2 thanh ghi lnh v thanh ghi data

  • 37

    Chc nng ca cc chn LCD :

    Cc chn VDD(VCC), VSS v V0(VEE)

    Chn VDD cp dng ngun 5V, chn VSS ni t, chn V0 c dng iu khin tng phn ca mn hnh LCD.

    RS ( Register select)

    Khi RS=0 thanh ghi lnh c chn, khi ny ta c th truyn cc lnh nh xa mn hnh, nhy con tr, cc lnh khc ca LCD s c cho trong bng. Khi RS=1 thanh ghi k t (data) c chn, khi ny ta c th truyn cc k t trong bng m ASCII. Cc k t c m c tra trong bng

    R/W (Read/Write)

    R/W=0 ghi d liu(lnh hoc k t) t MPU->LCD,R/W=1 c d liu t LCD, i vi LCD ta ch c bit busy D7

  • 38

    E (Enable)

    Cho php ta truy cp/xut n LCD thng qua chn RS v R/W.Khi chn E mc cao (1) LCD s kim tra trng thi ca 2 chn RS v R/W v p ng cho ph hp. Khi d liu c cp n chn d liu th mt xung mc cao xung thp phi c p n chn ny LCD cht d liu trn cc chn d liu. Xung ny phi rng ti thiu l 450ns( rng ny mnh thy mi datasheet vit mt khc nn cc bn hy cho n ln va phi d liu truyn c). Cn khi chn E mc thp (0), LCD s b v hiu ho hoc b qua tn hiu ca 2 chn RS v R/W.

    Cc chn D0 - D7

    Cc chn truyn lnh hoc k t n LCD . Chn D7 c dng kim tra bit busy khi RS=0 v R/W=1 nu D7=1 th LCD ang bn LCD s khng nhn data t MPU. Khi D7=0 th LCD khng bn.

    Bng m lnh ca LCD

    Bng m a ch hin th ca LCD

  • 39

    V d: set a ch th 5 th ta gi m lnh n LCD set DD RAM address l 0x85

    Bng m k t ascii

  • 40

    Phn khe thi gian ca LCD ch ghi :

    Phn khe thi gian ca LCD ch c :

  • 41

    Cn c vo phn khe thi gian ta c th lp trnh cho qu trnh ghi v c ca LCD

    lp giao tip c vi LCD trc ht cc bn phi khi to cho LCD; 1. Function set: (bt buc)

    -DL=1; giao tip thng qua 8bit

    -DL=0; giao tip thng qua 8bit D4->7

    N=0; LCD ch hin th 1 hng

    N=1; LCD ch hin th 2 hng

    F=0; 5x8 dot;

    F=1;5x10 dot. Ch : khi 2 hng th F=1 khng c tc dng khi ch hi

    th 5x8 dot

    2. Display on/off control

    D=0; Tt hin th/ D=1; Hin th

    C=0; Tt con tr/ C=1; M con tr

    B=0; Tt nhy tr; B=1 bt nhy tr

    3. Entry mode set:

    I/D=1; con tr t ng tng a ch sau khi truyn mt k t

    S =0 no shift

    Cc bn tham kho m lnh c th t khi to theo y ca mnh. Ch khi to ca 4bit v 8bit khc nhau rt nhiu cc bn xem tht k trong datasheet

    Truyn d liu theo 8bit S ni chn.

  • 42

    Qu trnh giao tip

    Da phn khe thi gian ta xy dng mt s hm c v vit vo LCD ; y mnh vit ton b chng trnh lun; dng bin dch l codevision To th vin: Library.h

    #include

    #include

    #define LCD_RS PORTB.0

    #define LCD_RW PORTB.1

    #define LCD_EN PORTB.2

    #define LCD_RD7 PIND.7

    #define LCD_data PORTD

  • 43

    char LCD_check_bit_busy();

    void LCD_busy(void);

    void writeCmd(unsigned char cmd);

    void writeData(unsigned char data);

    void LCD_init();

    Khai bo cc hm trong Library.h bi file Library.c #include "Library.h"

    char LCD_check_bit_busy()

    {

    char address;

    LCD_RS=0;

    LCD_RW=1;

    DDRD=0x00; // Cng D l cng vo

    LCD_EN=1;

    delay_us(5);

    address=PIND.7;

    LCD_EN=0;

    DDRD=0xff;

    return address;

    }

    void LCD_busy(void)

    {

    unsigned char busy;

    busy=LCD_check_bit_busy();

    while(busy)

    {

    busy=LCD_check_bit_busy();

    };

    }

    void writeCmd(unsigned char cmd)

    {

    LCD_data=cmd;

    LCD_RS=0;

    LCD_RW=0;

    LCD_EN=1;

    delay_us(5);

    LCD_EN=0;

    LCD_busy();

    }

  • 44

    void writeData(unsigned char data)

    {

    LCD_data=data;

    LCD_RS=1;

    LCD_RW=0;

    LCD_EN=1;

    delay_us(5);

    LCD_EN=0;

    LCD_busy();

    }

    void LCD_init()

    {

    delay_ms(100);

    writeCmd(0x30);

    delay_ms(30);

    writeCmd(0x30);

    delay_ms(10);

    writeCmd(0x30);

    writeCmd(0x38);//Function set: 2 Line, 8-bit,5x7 dot

    writeCmd(0x0f);// Display on, curson blinking command

    writeCmd(0x01);// Clear LCD

    writeCmd(0x06);//Entry mode,auto increment with no shift

    } LCD_RS=0;

    LCD_RW=0;

    LCD_EN=1;

    LCD_EN=0;

    LCD_busy();

    }

    Chng trnh chnh main.c #include "Library.h"

    void main(void)

    {

    DDRB=0x0f;

    DDRD=0xff;

    LCD_init();

    writeCmd(0x80+0x02);

    writeData('D');

    writeData('U');

    writeData('O');

    writeData('N');

    writeData('G');

  • 45

    writeData('-');

    writeData('V');

    writeData('A');

    writeData('N');

    writeData('-');

    writeData('H');

    writeData('A');

    writeCmd(0x80+0x42);

    writeData('K');

    writeData('S');

    writeData('T');

    writeData('N');

    writeData('-');

    writeData('C');

    writeData('D');

    writeData('T');

    writeData('-');

    writeData('K');

    writeData('5');

    writeData('4');

    }

    Cc bn c th t mnh to ra hm c chui k t theo cch ca mnh da vo cc hm con trn, y mnh khng gii thiu.

    Truyn d liu theo 4bit S ni chn.

  • 46

    Qu trnh giao tip

    Khi truyn 4bit ta truyn(c hoc ghi) 4bit cao trc sau truyn 4bit thp Chng trnh 4 bit: File Library.h

    #include

    #include

    #define LCD_RS PORTB.0

    #define LCD_RW PORTB.1

    #define LCD_EN PORTB.2

  • 47

    void EN_Clock();//enable pulse width >= 300ns this datasheet

    char LCD_check_bit_busy();

    void LCD_busy();

    void writeCmd(unsigned char cmd);

    void writeData(unsigned char data);

    void LCD_init();

    void Data(unsigned char data);

    File Library.c

    #include "Library.h"

    void Data(unsigned char data)

    {

    PORTB.4=data&0b00010000;

    PORTB.5=data&0b00100000;

    PORTB.6=data&0b01000000;

    PORTB.7=data&0b10000000;

    }

    void EN_Clock()

    {

    LCD_EN=1;

    delay_us(3); //enable pulse width >= 300ns

    LCD_EN=0;

    }

    char LCD_check_bit_busy()

    {

    char address_low,address_high;

    LCD_RS=0;

    LCD_RW=1;

    DDRB=0x0f; // 4bit cao Cng D l cng vo

    LCD_EN=1;

    delay_us(5);

    address_high=PINB&0xf0;

    LCD_EN=0;

    delay_us(10);

    LCD_EN=1;

    delay_us(5);

    address_low=PINB&0xf0;

    LCD_EN=0;

    DDRB=0xff;

    address_low>>=4;

    return (address_high|address_low);

  • 48

    }

    void LCD_busy()

    {

    char busy;

    busy=LCD_check_bit_busy();

    busy=busy>>7;

    while(busy)

    {

    busy=LCD_check_bit_busy();

    busy=busy>>7;

    };

    }

    void writeCmd(unsigned char cmd)

    {

    LCD_RS=0;

    LCD_RW=0;

    LCD_EN=1;

    Data(cmd);

    delay_us(5); //enable pulse width >= 300ns

    LCD_EN=0;

    cmd=cmd= 300ns

    LCD_EN=0;

    data=data

  • 49

    Data(data);

    delay_us(5); //enable pulse width >= 300ns

    LCD_EN=0;

    LCD_busy();

    }

    void LCD_init()

    {

    DDRB=0xff;

    PORTB=0xff;

    delay_ms(20);

    LCD_RS=0;

    LCD_RW=0;

    Data(0b00110000);

    delay_ms(6);

    EN_Clock();

    delay_ms(1);

    EN_Clock();

    delay_ms(1);

    EN_Clock();

    delay_ms(1);

    Data(0b00100000);

    EN_Clock();

    LCD_busy();

    writeCmd(0x28);//Function set: 2 Line, 4-bit,5x8 dot

    writeCmd(0x10);//Set cursor

    writeCmd(0x0e);// Display on, curson blinking command

    writeCmd(0x01);// Clear LCD

    writeCmd(0x06);//Entry mode,auto increment with no shift

    }

    File main.c

    #include "Library.h"

    void main(void)

    {

    LCD_init();

    writeData('K');

    writeData('S');

    writeData('T');

    writeData('N');

    writeData('-');

    writeData('C');

    writeData('D');

  • 50

    writeData('T');

    writeData('-');

    writeData('5');

    writeData('4');

    writeCmd(0x80+64); //line 2

    writeData('D');

    writeData('U');

    writeData('O');

    writeData('N');

    writeData('G');

    writeData(' ');

    writeData('V');

    writeData('A');

    writeData('N');

    writeData(' ');

    writeData('H');

    writeData('A');

    }

    Kt qu:

    2. Cch cu hnh cho LCD trong Code Vision cho Atmega32

    Code Vision h tr chng ta th vin giao tip vi LCD qua ch 4 bit thng qua file lcd.h. Sau y l cc hm thng dng :

    void lcd_write_byte(unsigned char addr, unsigned char data);

  • 51

    Hm ny gi 1 byte ti LCD

    void lcd_gotoxy(unsigned char x, unsigned char y);

    Hm ny t gi tr con tr ca LCD ti v tr x,y

    void lcd_clear(void);

    Hm ny dng xa mn hnh hin th ca LCD

    void lcd_putchar(char c);

    Hm ny dng hin th 1 k t ln LCD

    void lcd_puts(char *str);

    Hm ny dng hin th 1 chui k t (cha trong RAM) ln LCD

    void lcd_putsf(char flash *str);

    Hm ny dng hin th 1 chui k t (cha trong Flash) ln LCD

    unsigned char lcd_init(unsigned char lcd_columns);

    Hm ny dng khi to LCD

    S kt ni gia LCD vi 1 port ca vi iu khin c mc nh trong th vin nh sau :

    Cc bc cu hnh cho LCD : Bc 1 : nh ngha cc chn cho LCD Bc 2 : Khi to LCD : lcd_init(); Bc 3 : Vit lnh cn thit : lcd_puts(), lcd_gotoxy(x,y),

    Trong v d sau, chng ta s hin th dng ch LOP HOC VKD AVR ln LCD, LCD ni vo port B, s kt ni ch ra nh trn.

    Chng trnh :

  • 52

    3.Bi tp Cc hm c sn trong th vin ch h tr chng ta hin th k t ln LCD, by gi bn hy lp trnh mt hm sao cho c th hin th s thc, s nguyn ln LCD, i s truyn vo l s cn hin th.

    Gi : Cc k t hin th ln LCD tun theo chun trong bng m ASCII, mun hin th k t no, chng ta c th truyn lun k t vo hm lcd_putc() hoc c th cho i s truyn vo l v tr ca k t trong bng m ASCII. V d s 1 c v tr l 49 trong bng m ASCII, nh vy mun hin th s 1 ln LCD, chng ta dng th c 2 cch sau : lcd_putchar (1); Hoc lcd_putchar (49);

  • 53

    BI 7 : GIAO TIP VI LED MA TRN

    - C bn v led ma trn

    - Cch to font cho led ma trn

    - V d minh ha

    1. C bn v led ma trn

    Led ma trn l mt lot cc led n c sp xp thnh cc hng v cc ct dng ma trn, cc led c cng hng th s chung 1 chn, chn cn li ni chung vi cc led nm cng ct.

    Ma trn led c ng dng rt nhiu trong thc t, in hnh l cc bng quang bo.

    iu khin led ma trn sng theo mun, chng ta s dng phng

    php qut led, li dng tnh nng lu nh mt ngi, trong cc bin qung co, chng ta nhn thy led sng lin tc, thc ra khng phi vy, m l led nhp nhy lin tc, nhng do tc cao nn mt ngi khng kp phn bit v kt qu l chng ta nhn thy 1 hnh nh lin tc.

    C 1 cch qut led ma trn l qut theo hng v qut theo ct, v d trong bi s trnh by cc qut theo hng (ma trn led chng ta s dng l ma trn kch c 8x8), y cng l cch qut led ph bin hin nay. 2. To font cho led ma trn

  • 54

    C rt nhiu phn mm h tr chng ta to font cho led ma trn, tuy nhin, sau y tc gi s hng dn cc bn s dng phn mm Excel nm trong b Microsoft Office) to bng font, sau y l font cho ch A :

    Phng php qut led nh sau : - u tin, chng ta cho hng th nht active, cc hng th nht c gi tr

    0x18 (cc mu vng tng ng c gi tr 1, cc mu xanh nht c gi tr 0), nh vy 2 led hng th nht s sng (tng ng vi 2 mu vng).

    - Sau chng ta un-active hng th nht, ton b cc led hng th nht tt, v cho active hng th 2, cng tng t nh trn, chng ta a gi tr l 0x24 cho cc hng th 2, kt qu l chng ta cng c 2 sng (tng ng vi 2 mu vng) hng th 2.

    - Tng t, chng ta cho sng ln lt cc hng vi cc gi tr nh hnh v trn. - Do tc qut nhanh nn mt chng ta khng phn bit c s chuyn ng

    ri rc ca cc led. V kt qu l chng ta nhn thy led sng thnh hnh ch A nh hnh v.

    Cc k t khc cng c th to tng t nh trn.

  • 55

    3. V d minh ha.

    on chng trnh sau s lm hin th ch A ln led ma trn, cc hng v cc ct c ni tng ng vo cc port B v D :

    Bi tp Da vo nguyn l to ch A trn, bn hy to v vit chng trnh hin

    th cc k t bt k trong bng ch ci

  • 56

    BI 8: GIAO TIP MY TNH

    - C bn v giao tip RS232.

    - Cch cu hnh giao tip RS232 trong CCS cho PIC16F887

    - V d minh ha

    1. C bn v giao tip RS232

    RS232 l mt dng giao thc, dng truyn d liu gia cc thit b in t c h tr giao thc ny. RS232 l mt trong nhng giao thc ra i sm nht v c th ni l n gin nht.

    Cho n nay, RS232 vn cn c ng dng rt nhiu do giao thc n gin, tin cy cao, v khong cch truyn kh xa, tuy nhin tc truyn vn mc kh khim tn so vi cc giao thc ra i sau ny nh USB, SPI, I2C

    s dng c giao tip RS232, chng ta s dng module UART c sn trong Atmega32.

    UART l vit tt ca Universal Asynchronous Receiver Transmitter, l giao tip truyn nhn d b, d b y c ngha l thit b truyn v thit b nhn khng cng chung xung nhp clock.

    Trong giao thc RS232, chng ta quan tm n nhng thng s sau : - Tc baud : L s bit truyn trn 1s, in hnh l 9600 bit/s

    - Parity : c 2 loi parity l parity chn v parity l, dng tng tnh kim sot

    li trong 1 ln truyn, gi s ta cu hnh parity l chn th mi ln truyn, nu

    s bit c mc logic 1 l l th module t thm 1 bit 1 vo cui khung truyn,

    cn nu s bit c mc logic 1 l chn th khng thm bit 1 vo cui khung

    truyn. Parity l cng tng t nh vy.

    - S bit trn mi ln truyn : L s bit d liu (data) trn mi khung truyn,

    thng l 8 bit.

    Mt khung truyn UART c cu trc nh sau :

  • 57

    2. Cch cu hnh module UART trong Code Vision

    cu hnh s dng module UART trong Code Vision, ta s dng 4 thanh ghi UCSRA, UCSRB, UCSRC, UBRRH, UBRRL :

    UCSRA (USART Control and Status Register A)

    UCSRB (USART Control and Status Register B)

    UCSRC (USART Control and Status Register C)

    UBRRL v UBRRH (USART Baud Rate Registers)

    C th v cc bit v ngha ca cc bit trong cc thanh ghi ny, cc bn c th tham kho phn help ca Code Vision.

    Mt s hm thng dng :

    char getchar(void)

    Hm ny tr v mt k t nm trong b m nhn ca Atmega32 (nu c).

    void putchar(char c)

    Hm ny truyn mt k t thng qua module UART

    void printf(char flash *fmtstr [ , arg1, arg2, ...])

    Hm ny ging nh hm trong C, nhng thay v in cc k t ln mn hnh (trong C) th hm ny s gi d liu thng qua module UART.

  • 58

    3. V d.

    Sau y l mt chng trnh minh ha giao tip RS232, chng trnh s lin tc gi chui k t ln Chuong trinh giao tiep RS232 ln PC.

    Mch nguyn l :

    Trong mch nguyn l, chng ta s dng thm 1 IC max 232 chuyn in p tng ng vi 2 mc logic 0 v 1 ca vi iu khin thnh in p mc logic tng ng vi AVR, hai chn 11 v 12 ca max232 c ni vi 2 chn TX v RX ca vi iu khin.

  • 59

    Chng trnh :

    Chng trnh giao tip RS232 rt n gin. c th quan st k t c truyn ln PC, chng ta c th s dng 1 phn mm c sn trong window l Hyper Terminal, m phn mm ny, chng ta lm nh sau : - Vo Start/All Program/Accessories/Communications/Hyper Terminal

    - Tip n, xut hin hp thoi nhc nh nhp tn thng tin khu vc, chng ta

    chn cancel, sau chn yes v ok

  • 60

  • 61

    - Sau chng ta nhp m t kt ni :

    -

    - Nu li xut hin hp thoi nhc nh nhp tn thng tin khu vc, chng ta lm

    nh trn.

    - Sau , chng ta chn cc thng s thit lp kt ni :

    Chn cng COM kt ni

  • 62

    Chn tc baud, s bit d liu trn 1 khung truyn v parity

    - Giao din ca chng trnh nh sau :

    - Kt qu, chng ta c nh sau :

  • 63

    - Ch : Ngoi chng trnh Hyper Terminal c sn trong window, chng ta c

    th s dng nhiu chng trnh khc nh Terminal, hay nh chng trnh c

    sn ca CCS nh siow (Serial Input/Output Monitor), giao din cc chng

    trnh nh sau :

  • 64

    Bi tp: V d trn m t vic gi d liu ln PC, da vo cc hm c sn trong CCS nh gii thiu trc , bn hy vit chng trnh c d liu gi v t PC.

    Nhng nt c bn v giao tip vi my tnh c trnh by trn, sau y l mt v d : iu khin n giao thng v hin th ln my tnh trng thi ca cc n trn ct n. #include

    #include #include

    unsigned int i=0,j=0,k=0;

    //unsigned char code[]={0x3F,0x06,0x5B,0x4F,0x66,0x6D,0x7D,0x07,0x7F,0x6F} ; // Timer 1 overflow interrupt service routine

    interrupt [TIM1_OVF] void timer1_ovf_isr(void)

    { i=i+1;

    TCNT1=26474;

    TIFR=0x00;

    if(i=2)&&(i

  • 65

    if(i>=3) PORTD.2=1; else PORTD.2=0; // do1

    if((i>=3)&&(i=4)&&(i

  • 66

    Nn nh khi gi d liu th gi qua chn TXD v nhn d liu bng chn RXD nn ta phi ni cho, chn TXD ca vi iu khin vi chn RXD ca Virtual Terminal v ngc li .

  • 67

    BI 9 : GIAO TIP I2C

    - Gii thiu v giao tip I2C.

    - Cch cu hnh giao tip I2C trong Code Vision cho Atmega32.

    - V d minh ha.

    1. Gii thiu chung v I2C

    Ngy nay trong cc h thng in t hin i, rt nhiu IC hay thit b ngoi vi cn phi giao tip vi cc IC hay thit b khc giao tip vi th gii bn ngoi. Vi mc tiu t c hiu qu cho phn cng tt nht vi mch in n gin, Phillips pht trin mt chun giao tip ni tip 2 dy c gi l I2C. I2C l tn vit tt ca cm t Inter Intergrated. I2C c tc truyn kh cao, c Mbit/s, tuy nhin khong cch truyn rt ngn, ch khong trn board mch.

    I2C mc d c pht trin bi Philips, nhng n c rt nhiu nh sn

    xut IC trn th gii s dng. I2C tr thnh mt chun cng nghip cho cc giao tip iu khin, c th k ra y mt vi tn tui ngoi Philips nh : Texas Intrument (TI), Maxim Dallas,analog Device, National emiconductor Bus I2C c s dng lm bus giao tip ngoi vi cho rt nhiu loi IC khc nhau nh cc loi vi iu khin PIC, AVR, ARM, chip nh nh RAM tnh (Static Ram), EEPROM, b chuyn i tng t s (ADC), s tng t (DAC)

    Bus I2C v cc thit b ngoi vi

    Mt giao tip I2C gm c 2 dy : Serial Data (SDA) v Serial Clock (SCL). SDA l ng truyn d liu 2 hng, cn SCL l ng truyn xung ng h v ch theo mt hng.

  • 68

    Kt ni thit b vo bus I2C

    Mi dy SDA hay SCL u c ni vi in p dng ca ngun cp thng qua mt in tr ko ln (pull up resistor). S cn thit ca cc in tr ko ny l v chn giao tip I2C ca cc thit b ngoi vi thng l dng cc mng h (open drain or open collector).Gi tr ca cc in tr ny khc nhau ty vo tng thit b v chun giao tip, thng dao ng trong khong 1K n 4.7K.

    Ta thy c rt nhiu thit b (ICs) cng c kt ni vo mt bus I2C, tuy nhin s khng xy ra chuyn nhm ln gia cc thit b, bi mi thit b s c nhn ra bi mt a ch duy nht vi mt quan h ch/t tn ti trong sut thi gian kt ni. Mi thit b c th hot ng nh l thit b nhn d liu hay c th va truyn va nhn. Hot ng truyn hay nhn cn ty thuc vo vic thit b l ch (master) hay t (slave).

    Mt thit b hay mt IC khi kt ni vi bus I2C, ngoi mt a ch (duy nht) phn bit, n cn c cu hnh l thit b ch (master) hay t (slave). Ti sao li c s phn bit ny ? V trn mt bus I2C th quyn iu khin thuc v thit b ch (master). Thit b ch nm vai tr to xung ng h cho ton h thng, khi gia hai thit b ch/t giao tip th thit b ch c nhim v to xung ng h v qun l a ch ca thit b t trong sut qu trnh giao tip. Thit b ch gi vai tr ch ng, cn thit b t gi vai tr b ng trong vic giao tip.

    Truyn nhn d liu gia ch/t

    Nhn hnh trn ta thy xung ng h ch c mt hng t ch n t, cn lung d liu c th i theo hai hng, t ch n t hay ngc li t n ch. V d liu truyn trn bus I2C, mt bus I2C chun truyn 8 bit d liu c hng trn ng truyn vi tc l 100Kbits/s Ch chun (Standard mode). Tc

  • 69

    truyn c th ln ti 400Kbits/s Ch nhanh (Fast mode) v cao nht l 3,4Mbits/s Ch cao tc (High speed mode).

    Mt bus I2C c th hot ng nhiu ch khc nhau: - Mt ch mt t (one master one slave) - Mt ch nhiu t (one master multi slave) - Nhiu ch nhiu t (Multi master multi slave)

    D ch no, mt giao tip I2C u da vo quan h ch/t. Gi thit mt thit b A mun gi d liu n thit b B, qu trnh c thc hin nh sau :

    - Thit b A (Ch) xc nh ng a ch ca thit b B (t), cng vi vic xc nh a ch, thit b A s quyt nh vic c hay ghi vo thit b t.

    - Thit b A gi d liu ti thit b B - Thit b A kt thc qu trnh truyn d liu

    Khi A mun nhn d liu t B, qu trnh din ra nh trn, ch khc l A s nhn d liu t B. Trong giao tip ny, A l ch cn B vn l t. Chi tit vic thit lp mt giao tip gia hai thit b s c m t chi tit trong cc mc di y.

    START and STOP conditions

    START v STOP l nhng iu kin bt buc phi c khi mt thit b ch mun thit lp giao tip vi mt thit b no trong mng I2C. START l iu kin khi u, bo hiu bt u ca giao tip, cn STOP bo hiu kt thc mt giao tip. Hnh di y m t iu kin START v STOP.

    Ban u khi cha thc hin qu trnh giao tip, c hai ng SDA v SCL u mc cao (SDA = SCL = HIGH). Lc ny bus I2C c coi l di (bus free), sn sng cho mt giao tip. Hai iu kin START v STOP l khng th thiu trong vic giao tip gia cc thit b I2C vi nhau

    iu kin START v STOP ca bus I2C

    iu kin START : mt s chuyn i trng thi t cao xung thp trn ng SDA trong khi ng SCL ang mc cao (cao = 1; thp = 0) bo hiu mt iu kin START iu kin STOP : Mt s chuyn i trng thi t mc thp ln cao trn ng SDA trong khi ng SCL ang mc cao.

    C hai iu kin START v STOP u c to ra bi thit b ch. Sau tn hiu START, bus I2C coi nh ang trong trang thi lm vic (busy). Bus I2C s ri, sn sng cho mt giao tip mi sau tn hiu STOP t pha thit b ch. Sau khi

  • 70

    c mt iu kin START, trong qua trnh giao tip, khi c mt tn hiu START c lp li thay v mt tn hiu STOP th bus I2C vn tip tc trong trng thi bn. Tn hiu START v lp li START u c chc nng ging nhau l khi to mt giao tip.

    nh dng d liu truyn D liu c truyn trn bus I2C theo tng bit, bit d liu c truyn i ti

    mi sn dng ca xung ng h trn dy SCL, qu trnh thay i bit d liu xy ra khi SCL ang mc thp.

    Qu trnh truyn 1 bit d liu

    Mi byte d liu c truyn c di l 8 bits. S lng byte c th truyn trong mt ln l khng hn ch. Mi byte c truyn i theo sau l mt bit ACK bo hiu nhn d liu. Bit c trng s cao nht (MSB) s c truyn i u tin, cc bt s c truyn i ln lt. Sau 8 xung clock trn dy SCL, 8 bit d liu c truyn i. Lc ny thit b nhn, sau khi nhn 8 bt d liu s ko SDA xung mc thp to mt xung ACK ng vi xung clock th 9 trn dy SDA bo hiu nhn 8 bit. Thit b truyn khi nhn c bit ACK s tip tc thc hin qu trnh truyn hoc kt thc.

    D liu truyn trn bus I2C

  • 71

    Bit ACK trn bus I2C

    Lu thut ton truyn v nhn d liu trong giao tip I2C

    Mt byte truyn i c km theo bit ACK l iu kin bt buc, nhm m bo cho qu trnh truyn nhn c din ra chnh xc. Khi khng nhn c ng a ch hay khi mun kt thc qu trnh giao tip, thit b nhn s gi mt xung Not ACK (SDA mc cao) bo cho thit b ch bit, thit b ch s to xung STOP kt thc hay lp li mt xung START bt u qu trnh mi.

    nh dng a ch thit b

    Mi thit b ngoi vi tham gia vo bus I2C u c mt a ch duy nht, nhm phn bit gia cc thit b vi nhau. di a ch l 7 bit, iu c ngha l trn mt bus I2C ta c th phn bit ti a 128 thit b. Khi thit b ch mun giao tip vi ngoi vi no trn bus I2C, n s gi 7 bit a ch ca thit b ra bus ngay sau xung START. Byte u tin c gi s bao gm 7 bit a ch v mt bt th 8 iu khin hng truyn. Mi mt thit b ngoi vi s c mt a ch

  • 72

    ring do nh sn xut ra n quy nh. a ch c th l c nh hay thay i. Ring bit iu khin hng s quy nh chiu truyn d liu. Nu bit ny bng 0 c ngha l byte d liu tip theo sau s c truyn t ch n t, cn ngc li nu bng 1 th cc byte theo sau byte u tin s l d liu t con t gi n con ch. Vic thit lp gi tr cho bit ny do con ch thi hnh, con t s ty theo gi tr m c s phn hi tng ng n con ch.

    Truyn d liu trn bus I2C, ch Master Slave

    D liu truyn c th theo 2 hng, t ch n t hay ngc li. Hng truyn c quy nh bi bit th 8 trong byte u tin c truyn i.

    Cu trc byte d liu u tin

    Mi mt thit b ngoi vi s c mt a ch ring do nh sn xut ra n quy nh. a ch c th l c nh hay thay i. Ring bit iu khin hng s quy nh chiu truyn d liu. Nu bit ny bng 0 c ngha l byte d liu tip theo sau s c truyn t ch n t, cn ngc li nu bng 1 th cc byte theo sau byte u tin s l d liu t con t gi n con ch. Vic thit lp gi tr cho bit ny do con ch thi hnh, con t s ty theo gi tr m c s phn hi tng ng n con ch.

    Qu trnh truyn d liu

    Truyn d liu t ch n t (ghi d liu)

  • 73

    Qu trnh thc hin :

    - Thit b ch to tn hiu START

    - Thit b ch gi tn hiu iu khin (Control In) ti thit b t, bo hiu qu

    trnh tip theo s l c hay ghi d liu. Byte ny c qui nh bi nh sn

    xut.

    - Nu nhn c tn hiu ACK, c ngha l qu trnh gi Control In thnh

    cng, thit b ch tip tc gi a ch cn ghi d liu thit b t.

    - Khi tip tc nhn c xung ACK bo nhn din ng thit b t, thit b

    ch bt u gi d liu n thit b t theo tng byte mt. Theo sau mi byte

    ny u l mt xung ACK. S lng byte truyn l khng hn ch.

    - Kt thc qu trnh truyn, thit b ch sau khi truyn byte cui s to xung

    STOP bo hiu kt thc.

    Truyn d liu t t n ch (c d liu)

    Thit b ch mun c d liu t thit b t, qu trnh thc hin nh sau :

    - Khi bus ri, thit b ch to xung START, bo hiu bt u giao tip.

    - Thit b ch gi tn hiu iu khin (Control In) ti thit b t, bo hiu qu

    trnh tip theo s l c hay ghi d liu. Byte ny c qui nh bi nh sn

    xut.

    - Nu nhn c tn hiu ACK, c ngha l qu trnh gi Control In thnh

    cng, thit b ch tip tc gi a ch cn c d liu thit b t.

    - Sau xung ACK u tin, thit b t s gi tng byte ra bus, thit b ch s nhn

    d liu v tr v xung ACK. S lng byte khng hn ch

  • 74

    - Khi mun kt thc qu trnh giao tip, thit b ch gi xung Not ACK v to

    xung STOP kt thc.

    Qu trnh kt hp ghi v c d liu: gia hai xung START v STOP, thit b ch c th thc hin vic c hay ghi nhiu ln, vi mt hay nhiu thit b. thc hin vic , sau mt qu trnh ghi hay c, thit b ch lp li mt xung START v li gi li a ch ca thit b t v bt u mt qu trnh mi.

    Ch giao tip Master Slave l ch c bn trong mt bus I2C, ton b bus c qun l bi mt master duy nht. Trong ch ny s khng xy ra tnh trng xung t bus hay mt ng b xung clock v ch c mt master duy nht c th to xung clock. Ch Multi-Master

    Trn bus I2C c th c nhiu hn mt master iu khin bus. Khi bus I2C

    s hot ng ch Multi-Master.

    2. Module I2C trong Atmega32

    Vi nhng tin ch em li, khi giao tip I2C c tch hp cng trong kh nhiu loi vi iu khin khc nhau. Vi nhng loi Vi iu khin khng c h tr phn cng giao tip I2C, s dng ta c th dng phn mm lp trnh, khi ta s vit mt chng trinh diu khin 2 chn bt k ca Vi iu khin n thc hin giao tip I2C (cc hm START, STOP, WRITE, READ).

    Do Ds1307 l slave(IC thi gian thc) nn ta ch cn vit hm truyn v nhn cho Atmega32, mnh to ring th vin (Tn s thch anh 4MHz) File I2C_.h

    #include

    void RTC_set_time(unsigned char,unsigned char,unsigned char);

    void RTC_get_time(unsigned char *,unsigned char *,unsigned char *);

    void I2C_init();

    File I2C_.c

    #include "I2C_.h"

    void I2C_init()

    {

    TWBR=0x0C;//TWBR=12

    TWSR=0x00;//Prescaler Value=1=>SCL=100KHz>32KHz

    }

    void I2C_master_transmit(unsigned char slave_address,unsigned char

    register_address,unsigned char data)

    {

  • 75

    unsigned char write=0;

    i2c_retry:;

    TWCR=(1

  • 76

    TWCR=(1

  • 77

    bcd=(a4)&0x0F;

    b=bcd&0x0F;

    dec=a*10+b;

    return dec;

    }

    void RTC_set_time(unsigned char hours,unsigned char minutes,unsigned char

    seconds)

    {

    I2C_master_transmit(0xD0,0x02,dec_to_2bcd(hours));

    I2C_master_transmit(0xD0,0x01,dec_to_2bcd(minutes));

    I2C_master_transmit(0xD0,0x00,dec_to_2bcd(seconds));

    }

    void RTC_get_time(unsigned char *hours,unsigned char *minutes,unsigned char

    *seconds)

    {

    unsigned char hs,ms,ss;

    hs=I2C_master_receiver(0xD0,0x02);

    ms=I2C_master_receiver(0xD0,0x01);

    ss=I2C_master_receiver(0xD0,0x00);

    *hours=bcd_to_dec(hs);

    *minutes=bcd_to_dec(ms);

    *seconds=bcd_to_dec(ss);

    }

    File main.c

    #include "I2C_.h"

    #include "Library.h"

    // Declare your global variables here

    unsigned char h,m,s;

    void main(void)

    {

    DDRD=0xff;

    I2C_init();

  • 78

    LCD_init();

    RTC_set_time(1,1,1);

    while(1)

    {

    RTC_get_time(&h,&m,&s);

    writeData(0x30+h/10);

    writeData(0x30+h%10);

    writeData(':');

    writeData(0x30+m/10);

    writeData(0x30+m%10);

    writeData(':');

    writeData(0x30+s/10);

    writeData(0x30+s%10);

    delay_ms(100);

    writeCmd(0x01);

    }

    }

    Cc bn c th tn dng th vin c sn trong Code Vision c th vin h tr giao tip I

    2C, l file I2C.H.

    Cc hm h tr : void i2c_init(void);

    Hm ny khi to module I2C.

    unsigned char i2c_start(void);

    Hm ny to ra tn hiu Start cho module I2C

    void i2c_stop(void);

  • 79

    Hm ny to ra tn hiu Start cho module I2C

    unsigned char i2c_read(unsigned char ack);

    Hm ny c mt byte t bus. Ack c th bng 1 hoc 0, tng ng l c tr li tn hiu acknowledgement sau khi nhn c byte hay khng

    unsigned char i2c_write(unsigned char data);

    Hm ny ghi mt byte ln bus.

    Cc bc cu hnh module I2C

    nh ngha chn giao tip I2C

    V d : /* the I2C bus is connected to PORTB */

    /* the SDA signal is bit 3 */

    /* the SCL signal is bit 4 */

    #asm

    .equ __i2c_port=0x18

    .equ __sda_bit=3

    .equ __scl_bit=4

    #endasm

    Thm th vin I2C vo chng trnh include

    Khi to module I2C thng qua hm i2c_init()

    Vit cc lnh cn thit : read, write, start, stop

  • 80

    3. V d

    V d sau s s dng module I2C c trong Atmega32 giao tip vi IC thi gian thc DS1307, khi khi ng chng ta t giy trong DS1307 l 5s, sau chng ta c li t DS1307 ri hin th s giy ln LCD.

    S lc v DS1307 DS1307 l IC thi gian thc, s dng giao tip I2C giao tip vi cc

    thit b khc. D liu trong DS1307 nh gi, pht, giy c t ti cc a ch c nh, c cung cp bi nh sn xut. Vic c hay ghi gi, pht, giy chng ta s c/ghi vo cc a ch tng ng.

    S chn DS1307

    Chi tit v chc nng v a ch ca cc d liu trong DS1307, cc bn c th tham kho trong datasheet.

    Mt iu lu l d liu trong DS1307 c lu di dng s BCD, trong khi d liu dng trong vi iu khin li di dng s nh phn, do vy, trc khi c, ghi d liu, chng ta phi chuyn i gia 2 loi s ny cho ph hp.

    S ghp ni DS1307 v vi iu khin

    - c d liu t DS1307 :

  • 81

    - Ghi d liu vo DS1307 :

    Chng trnh :

  • 82

    Bi tp :

  • 83

    - Da vo chng trnh mu trn, hy vit chng trnh s dng DS1307,

    LCD v cc phm bm cn thit lm mt lch vn nin

  • 84

    BI 10 : NG C BC

    - C bn v ng c bc.

    - Cc mch iu khin ng c bc

    - V d minh ha

    1. C bn v ng c bc

    ng c bc l loi ng c n gin, c chnh xc cao, iu khin d dng, kch thc nh gi v c ng dng rt rng ri trong cc lnh vc iu khin chuyn ng, cc ng c dng trong u a CD, trong cng... hu ht l cc ng c bc.

    ng c bc hin nay t ti chnh xc rt cao, c th quay 1,8o mi bc.

    Cc c im chnh ca ng c bc :

    - Khng chi than : Khng xy ra hin tng nh la chi than lm tn hao

    nng lng, ti mt s mi trng c bit (hm l...) c th gy nguy him.

    - To c mmen gi : Mt vn kh trong iu khin l iu khin ng

    c tc thp m vn gi c mmen ti ln. ng c bc l thit b lm

    vic tt trong vng tc nh. N c th gi c mmen thm ch c v tr

    nh vo tc dng hm li ca t trng rotor.

    - iu khin v tr theo vng h : Mt li th rt ln ca ng c bc l ta c

    th iu chnh v tr quay ca roto theo mun m khng cn n phn hi v

    tr nh cc ng c khc, khng phi dng n encoder hay my pht tc (khc

    vi servo).

    - c lp vi ti : Vi cc loi ng c khc, c tnh ca ti rt nh hng ti

    cht lng iu khin. Vi ng c bc, tc quay ca rotor khng ph

    thuc vo ti (khi vn nm trong vng momen c th ko c). Khi momen

    ti qu ln gy ra hin tng trt, do khng th kim sot c gc quay.

    2. Cc mch iu khin ng c bc

  • 85

    C 3 cch iu khin ng c : iu khin bc, na bc v vi bc. chnh xc tng dn theo th t trn.

    Xt v cu to th ng c bc cng c cu to gm cc cun dy, mch iu khin ng c bc gn ging vi mch iu khin ca cc thit b nh relay, ng c 1 chiu

    Nu s dng mch c nguyn l nh trn, chng ta c th s dng 1 IC tch

    hp sn nh ULN2003, IC h ULN200x c u vo ph hp TTL, cc u emitor c ni vi chn 8.

    Mi transitor darlington c bo v bi hai diode. Mt mc gia emitor ti

    collector chn in p ngc ln t ln transitor. Diode th hai ni collector vi chn 9. Nu chn 9 ni vi cc dng ca cun dy, to thnh mch bo v cho transitor.

    Ngoi ra, c nhiu IC tch hp sn dng iu khin ng c bc, ph bin l cp IC L297 v L298, chuyn dng iu khin ng c bc vi nguyn l s dng mch cu H (L298), IC L297 cho php chng ta chn ch iu khin na bc hoc bc.

  • 86

    ng c bc trong kit th nghim l ng c 6 dy, trong c 2 dy ngun v 4 dy pha, chiu quay ca ng c ph thuc vo th t in p cp cho cc pha ny, sau y l s nguyn l iu khin 1 pha :

    Cc P2 c ni vo chn vi iu khin, chng ta s dng opto cch li

    gia phn cng sut v phn iu khin, in p cp cho cc pha ca ng c c iu khin thng qua FET. Cc pha khc c s nguyn l tng t hnh trn.

    Vic nhn bit cc u dy rt n gin, chng ta cng xem qua s sau :

    Chng ta ch vic o in tr gia cc u dy vi nhau, u dy no thng vi 2 u dy khc v in tr dy dn gia u dy vi 2 u dy cn li bng nhau th l u s 1 hoc u s 2, hai u ny c vai tr nh nhau nn khng cn phn bit 2 u ny. Gi ta phi xc nh th t cp in p vo cc u dy a,b iu khin ng c quay. Chng ta ni ngun vo 2 u chung 1,2, sau ln lt cp in p vo cc u dy cn li, cho ti khi t ti 1 th t cp in p no m ng c ch quay theo 1 chiu th chng ta ghi li th t v coi nh l th t chun iu khin ng c, mun ng c quay theo chiu ngc li, chng ta ch vic cp in p vo 4 u dy theo th t ngc li.

    Trong phm vi gio trnh chng ta ch xt ng c bc n cc , khi hiu r r v ng c bc n cc v cch iu khin n th ta c th d dng nm bt v iu khin cc ng c bc cn li. Nh trong hnh, dng in i qua t u trung tm ca mu 1 n u a

  • 87

    to ra cc Bc trong stator trong khi cc cn li ca stator l cc Nam. Nu in cung cp lin tc, chng ta ch cn p in vo hai mu ca ng c theo dy. Mu 1a : 1000100010001000100010001 Mu 1a Mu 1b : 0010001000100010001000100 Mu 1b Mu 2a : 0100010001000100010001000 Mu 2a Mu 2b : 0001000100010001000100010 Mu 2b Time Mu 1a : 1100110011001100110011001 Mu 1b : 0011001100110011001100110 Mu 2a : 0110011001100110011001100 Mu 2b : 1001100110011001100110011 Time

    Nh rng hai na ca mt mu khng bao gi c kch cng mt lc. Cp tn hiu nh trn th ng c bc s c iu khin theo mt bc . Nu kt hp hai dy vi nhau cho php ta iu khin na bc .

    Mu 1a 11000001110000011100000111 Mu 1b 00011100000111000001110000 Mu 2a 01110000011100000111000001 Mu 2b 00000111000001110000011100

  • 88

    3. V d

    Chng trnh sau s iu khin ng c bc 6 u dy quay theo 1 chiu c nh, cc u dy c ni vo Port D (Xem phn define trong chng trnh).

    Ch yu chng ta iu khin 2 ch l bc v na bc, ch vi bc ch s dng khi yu cu chnh xc cao.

    ch bc , chng ta ln lt cp xung vo cc pha ca ng c, cn ch na bc, chng ta cp cng 1 lc xung vo 2 pha k tip nhau ca ng c.

    Tc quay ca ng c bc ph thuc vo thi gian chuyn gia 2 ln cp xung k tip nhau vo cc u dy. Trong chng trnh trn, thi gian cp xung l time_delay.

  • 89

    Bi tp Chng trnh trong v d iu khin ng c bc theo ch bc

    (cp xung vo 1 cun dy ti 1 thi im), bn hy vit chng trnh iu khin ng c bc theo ch na bc. (cp xung vo 2 cun dy k tip nhau ti mt thi im). n gin ta ch vic cp xung theo dy xung iu khin na bc thay v dng dy xung iu khin c bc, cch cp xung iu khin c bc v na bc nh th no ti nu trn (cc dy logic cp vo cc mu), ta c code v d cng thm dy xung cn cp v bn ch cn lm mt vic n gin l thay vo code ca bi trn l ta c bi ton iu khin theo ch na bc .

  • 90

    BI 11 : GIAO TIP VI CNG LPT

    - C bn v cng LPT

    - V d minh ha

    1. C bn v cng LPT

    LPT l vit tt ca ch Line Print Terminal, giao tip LPT l giao tip song song nhm mc ch ni my tnh PC vi my in. V sau, cng song song pht trin thnh mt tiu chun khng chnh thc. Tn gi ca cng song song bt ngun t kiu d liu truyn qua cng ny : cc bit d liu c truyn song song hay ni c th hn l byte ni tip cn bit song song. Cho n nay cng song song c mt hu ht cc my tnh PC c sn xut trong nhng nm gn y. Cng song song cn c gi l cng my in hay cng Centronics. Cu trc ca cng song song rt n gin vi tm ng d liu, mt ng dn mass chung, bn ng dn iu khin chuyn cc d liu iu khin ti my in v nm ng dn trng thi ca my in ngc tr li my tnh. Giao din song song s dng cc mc logic TTL, v vy vic s dng trong mc ch o lng v iu khin c phn n gin.

    S cng LTP

    Khong cch cc i gia cng song song my tnh PC v thit b ngai vi b hn ch v in dung k sinh v hin tng cm ng gia cc ng dn c th

  • 91

    lm bin dn tn hiu. Khong cch gii hn l 8m, thng thng ch c 1,5 2 m. Khi khong cch ghp ni trn 3m nn xon cc ng dy tn hiu vi ng ni t theo kiu cp dy xon hoc dng loi cp dt nhiu si trong mi ng dn d liu iu nm gia hai ng ni mass.

    Tc truyn d liu qua cng song song ph thuc vo linh kin phn cng c s dng. Trn l thuyt tc truyn t gi tr 1 Mbit/s, nhng vi khong cch truyn b hn ch trong phm vi 1m. Vi nhiu mc ch s dng th khong cch ny hon ton tha ng. Nu cn truyn trn khong cch xa hn, ta nn ngh n kh nng truyn qua cng ni tip hoc USB. Mt im cn lu l : vic tng khong cch truyn d liu qua cng song song khng ch lm tng kh nng gy li i vi ng d liu c truyn m cn lm tng chi ph ca ng dn.

    Sau y l chc nng ca cc ng dn tn hiu:

    Strobe (1)

    Vi mt mc logic thp chn ny, my tnh thng bo cho my in bit c mt byte ang sn sng trn cc ng dn tn hiu c truyn. D0 n D7

    Cc ng dn d liu Acknowledge

    Vi mt mc logic thp chn ny, my in thng bo cho my tnh bit l nhn c k t va gi v c th tip tc nhn. Busy (bn 11)

    My in gi n chn ny mc logic cao trong khi ang n nhn hoc in ra d liu thng bo cho my tnh bit l cc b m trong my tnh bit l cc b m trong my tnh b y hoc my in trong trn thi Off-line. Paper empty (ht giy 12)

    Mc cao chn ny c ngha l giy dng ht. Select (13)

    Mt mc cao chn ny, c ngha l my in ang trong trng thi kch hot (On-line) Auto Linefeed (t np dng)

    C khi cn gi l Auto Feed. Bng mt mc thp chn ny my tnh PC nhc my in t ng np mt dng mi mi khi kt thc mt dng. Error (c li)

    Bng mt mc thp chn ny, my in thng bo cho my tnh l xut hin mt li, chng hn kt giy hoc my in ang trong trng thi Off-Line. Reset (t li)

  • 92

    Bng mt mc thp chn ny, my in c t li trng thi c xc nh lc ban u. Select Input

    Bng mt mc thp chn ny, my in c la chn bi my tnh.

    Cp ni gia my in v my tnh bao gm 25 si, nhng khng phi tt c iu c s dng m trn thc t ch c 18 si c ni vi cc chn c th. Nhn xt ny gip chng ta tn dng nhng cp ni m trong li b t mt hai si.

    Qua cch m t chc nng ca tng tn hiu ring l ta c th nhn thy cc ng dn d liu c th chia thnh 3 nhm: - Cc ng dn tn hiu, xut ra t my tnh PC v iu khin my tnh, c

    gi l cc ng dn iu khin.

    - Cc ng dn tn hiu, a cc thng tin thng bo ngc li t my in v

    my tnh, c gi l cc ng dn trng thi.

    - ng dn d liu, truyn cc bit rieng l ca cc k t cn in.

    T cch m t cc tn hiu v mc tn hiu ta c th nhn thy l: cc tn hiu Acknowledge, Auto Linefeed, Error, Reset v Select Input kch hot mc thp. Thng qua chc nng ca cc chn ny ta cng hnh dung c iu khin cng my in.

  • 93

    2. V d minh ha

    My tnh s gi d liu (dng 8 bit) thng qua cc ng data, t DATA0 n DATA7. V s nhn d liu phn hi t thit b thng qua cc ng iu khin, sau y l s kt ni :

    Do hnh thc giao tip l giao tip song song, nn lp trnh kh n gin, on code sau y dng nhn d liu t cng LPT v xut ra led, led c ni vi PORT B, d liu nhn t cng LPT c ni vo PORT C.

  • 94

    on m trn c d liu gi xung t cng LPT (cc ng t D0 n D7) thong qua Port B, sau xut d liu ra Port C. Phn mm giao tip vi cng LPT cc bn c th t vit, dng cc ngn ng lp trnh nh Visual Basic, hay C++, C#...

  • 95

    BI 12 : GIAO TIP VI MA TRN PHM

    - C bn v ma trn phm

    - V d minh ha

    1. C bn v ma trn phm

    Ging nh led ma trn, ma trn phm l tp hp cc phm n, c ni vi nhau thnh dng ma trn.

    Ma trn phm 4x4

    Vic giao tip vi bn phm ma trn cng tng t nh giao tip vi led ma trn, chng ta cng c 2 kiu l qut theo hang v qut theo ct.

    Sau y chng ta s cng tm hiu cch qut phm theo hng : - Ban u, chng ta cp in p (gi s l 5V mc logic 1) vo hang A, cc

    hang cn li cp mc logic 0. - Sau , chng ta kim tra mc logic ti cc ct 1,2,3,4, nu ct no c mc

    logic 1 th phm tng ng ct c nhn. Gi s ct 1 c mc logic 1 th

    phm 7 c nhn.

    - Tng t, chng ta ln lt cho cc hang B, C, D c mc logic 1, cc hang cn

    li c mc logic 0, thng qua vic c mc logic ti cc ct, chng ta s bit

    c phm no c nhn.

  • 96

    2. V d minh ha

    Sau y l chng trnh minh ha cch qut phm, bn phm gm 8 phm c ni vo Port B, gi tr ca cc phm sau khi c c a ra port C.

  • 97

    Bi tp

    Chng trnh trn ch c gi tr ca phm bm v xut gi tr (nh phn) ra

    Port C, bn hy vit chng trnh c gi tr ca phm v xut ra led 7 thanh.

    Thut ton nh trn, nhng cch vit nh trn l di dng , di y ti a ra cch code ngn gn hn v kt hp gii bi tp a ra : Trc tin ta thit lp cng thc th t ca cc nt bm khi ta qut n hng th j v ct th k : khi j v k chy t 1 n n ( vi n l s hng , s ct) : j*k+(j-1)*(n-k)

    #include #include

    unsigned int j=0,k=0; unsigned char code[]={0x7E,0x4F,0x12,0x06,0x4C,0x24,0x20,0x0F,0x00,0x04} ;

    void main(void)

    { // dung xung ngoai la 4Mhz

    DDRB=0x0F; // 4 bit cao cua PORTB la cong vao va 4 bit thap cua PORTB la cong ra de noi

    voi ma tran phim

    DDRC=0xFF; // PORTC la cong ra de hien thi LED while(1)

    {

    for(j=0;j

  • 98

    {

    unsigned int a; a=(j+1)*(k-3)+j*(7-k);

    HienThi(a);

    }

    } PORTB=0x00;

    }

    }

  • 99

    BI 13 : TIMER

    - Gii thiu v timer trong Atmega32

    - V d minh ha

    1. Gii thiu v timer

    Timer l mt trong nhng module rt quan trng trong vi iu khin, s dng timer, chng ta c th lp trnh cc tc v din ra 1 cch chnh xc theo thi gian nh trc, c th m s xung ni vo u vo timerHu nh tt c cc loi vi iu khin u c timer, s lng timer mi dng vi iu khin c th khc nhau.

    Timer c ng dng rng ri trong thc t, gi s nh chng ta mun to ra 1 khong thi gian chnh xc l 1ms lm 1 tc v no , hay nh chng ta mun m sn phm i qua bng chuyn, hoc m s xung t encoder Tt c cc cng vic chng ta c th hon ton thc hin bng timer.

    C 2 ch hot ng i vi timer, ch timer v ch counter. Vi ch timer th xung a vo module timer l xung nhp ca h thng, cn vi ch counter th xung a vo module timer l xung bn ngoi.

    Trong Atmega32 c 3 timer : Timer 0, timer 1 v timer 2

    *) Timer 0 : L timer 8 bit, c cc tnh nng sau : - S dng lm b nh thi

    - T xa khi t ti 1 gi tr t trc (T ng np li)

    - To xung

    - m s kin (Counter)

    - H tr prescaler

  • 100

    S cu to ca Timer 0

    Cc ch hot ng c ci t t thanh ghi TCCR0. Tuy l thanh ghi 8 bit nhng thc cht ch c 3 bit c tc dng l CS00, CS01 v CS02.

    Cc bit CS00, CS01 v CS02 gi l cc bit chn ngun xung nhp cho T/C0 (Clock Select). Chc nng cc bit ny c m t trong bng 1.

    Bng 1: chc nng cc bit CS0X

  • 101

    Thanh ghi TCNT0 dng cha gi tr vn hnh ca Timer 0, thanh ghi ny c th c c hay ghi. Thanh ghi OCR0 l gi tr t trc dng so snh vi gi tr trong thanh ghi TCNT0, khi gi tr 2 thanh ghi ny bng nhau s to ra 1 tn hiu ra chn OC0.

    Thanh ghi TIMSK: l thanh ghi mt n cho ngt ca tt c cc T/C trong Atmega8, trong ch c bit TOIE0 tc bit s 0 (bit u tin) trong thanh ghi ny l lin quan n T/C0, bit ny c tn l bit cho php ngt khi c trn T/C0. Trn (Overflow) l hin tng xy ra khi b gi tr trong thanh ghi TCNT0 t n MAX (255) v li m thm 1 ln na.

    Khi bit TOIE0=1, v bit I trong thanh ghi trng thi c set (xem li bi 3 v iu khin ngt), nu mt trn xy ra s dn n ngt trn.

    Thanh ghi TIFR l thanh ghi c nh cho tt c cc b T/C. Trong thanh ghi ny bit s 0, TOV0 l c ch th ngt trn ca T/C0. Khi c ngt trn xy ra, bit ny t ng c set ln 1. Thng thng trong iu khin cc T/C vai tr ca thanh ghi TIFR khng qu quan trng.

    Hot ng : T/C0 hot ng rt n gin, hot ng ca T/C c kch bi mt tn hiu (signal), c mi ln xut hin tn hiu kch gi tr ca thanh ghi TCNT0 li tng thm 1 n v, thanh ghi ny tng cho n khi n t mc MAX l 255, tn hiu kch tip theo s lm thanh ghi TCNT0 tr v 0 (trn), lc ny bit c trn TOV0 s t ng c set bng 1. Vi cch thc hot ng nh th c v T/C0 v dng v c tng t 0 n 255 ri li quay v 0, v qu trnh lp li. Tuy nhin, yu t to s khc bit chnh l tn hiu kch v ngt trn, kt hp 2 yu t ny chng ta c th to ra 1 b nh thi gian hoc 1 b m s kin. Trc ht bn hy nhn li bng 1 v cc bit chn xung nhp cho T/C0. Xung nhp cho T/C0 chnh l tn hiu kch cho T/C0. Xung nhp ny c th to bng ngun to dao ng ca chip (thch anh, dao ng ni trong chip). Bng cch t gi tr cho cc bit CS00, CS01 v CS02 ca thanh ghi iu khin TCCR0, chng ta s quyt nh bao lu th s kch T/C0 mt ln. V d mch ng dng ca bn c ngun dao ng clk = 1MHz tc chu k 1 nhp l 1us (1 micro giy), bn t thanh ghi TCCR0=5 (tc SC02=1, CS01=0, CS00=1). Cn c theo bng 1, tn hiu kch cho T/C0 s bng clk/1024 ngha l sau 1024us th T/C0 mi c kch 1 ln, ni cch khc gi tr ca TCNT0 tng thm 1 sau 1024us (ch l tn s c chia cho 1024 th chu k s tng 1024 ln). Quan st 2 dng cui cng trong bng 1 bn s thy rng tn hiu kch cho T/C0 c th ly t bn ngoi (External clock

  • 102

    source), y chnh l tng cho hot ng ca chc nng m s kin trn T/C0. Bng cch thay i trng thi chn T0 (chn 6 trn chip Atmega8) chng ta s lm tng gi tr thanh ghi TCNT0 hay ni cch khc T/C0 c th dng m s kin xy ra trn chn T0. Di y chng ta s xem xt c th cch iu khin T/C0 theo 1 ch nh thi gian v m. *) Timer 1 : L Timer 16 bit, c nhng tnh nng sau : - C 2 module Output Compare hot ng c lp

    - Hai thanh ghi m cha gi tr t trc

    - Mt module Capture

    - Ch t ng np li

    - Ch PWM vi chu k c th thay i c

    - B to tn s

    - B m s kin (Counter)

    - C 4 ngun ngt c lp

    S cu to ca Timer 1

    Timer 2 : L timer 8 bit, c cc tnh nng sau :

  • 103

    - T xa khi t ti 1 gi tr t trc (T ng np li)

    - B to tn s

    - H tr PWM

    - m s kin (Counter)

    - H tr prescaler.

    - H tr clock input t thch anh 32KHz qua chn I/O.

    S cu to ca Timer 2

    Cc thanh ghi cho Timer 1 v timer 2 cng tng t nh timer 0, cc bn c th tham kho trong datasheet bit r hn. y c s khc bit l Timer1 l thanh ghi 16 bit nn n c mt s khc bit sau : - TCNT1 c to nn t hai thanh ghi 8 bit l TCNT1H v TCNT1L .

    - TCCR1A v TCCR1B : iu khin hot ng ca T/C1

  • 104

    Nhn chung thuc ht cch phi hp cc bit trong 2 thanh ghi TCCR1A v TCCR1B l tng i phc tp v T/C1 c rt nhiu mode hot ng, chng ta s kho st chng trong phn cc ch hot ng ca T/C1 bn di. y, trong thanh ghi TCCR1B c 3 bit kh quen thuc l CS10, CS11 v CS12. y l cc bit chn xung nhp cho T/C1 nh truong T/C0. Bng 2 s tm tt cc ch xung nhp trong T/C1.

    Bng 2: chc nng cc bit CS12, CS11 v CS10.

    - OCR1A v OCR1B :

  • 105

    - ICR1 : l khi nim mi ca T/C1 l Input Capture. Khi c 1 s kin trn chn ICP1 (chn 14 trn Atmega8), thanh ghi ICR1s capture gi tr ca thanh ghi m TCNT1. Mt ngt c th xy ra trong trng hp ny, v th Input Capture c th c dng cp nht gi tr TOP ca T/C1.

    - TIFR l thanh ghi c nh cho tt c cc b T/C. Cc bit t 2 n 5 trong thanh

    ghi ny l cc c trng thi ca T/C1.

    Cc mode hot ng: c tt c 5 ch hot ng chnh trn T/C1. Cc ch hot ng c bn c quy nh bi 4 bit Waveform Generation Mode (WGM13, WGM12, WGM11 WGM10) v mt s bit ph khc. 4 bit Waveform Generation Mode li c b tr nm trong 2 thanh ghi TCCR1A v TCCR1B (WGM13 l bit 4, WGM12 l bit 3 trong TCCR1B trong khi WGM11 l bit 1 v

    WGM10 l bit 0 trong thanh ghi TCCR1A) v th cn phi hp 2 thanh ghi TCCR1 trong lc iu khin T/C1. Cc ch hot ng ca T/C1 c tm tt trong bng sau 3: Bng 3: cc bit WGM v cc ch hot ng ca T/C1.

  • 106

    Cc Timer/Counter c s dng ph bin vi ch thng(nh thi), ch counter,to xung PWM, ngoi ra n cn mt s ch khc nhng do khng c dng ph bin nn ti khng ni trong gio trnh ny.

    +) Ch thng (b nh thi): nh mt khong thi gian m ta mong mun khi cho gi tr ca thanh ghi TCNTn tng t mt gi tr khi im no n gi tr trn b timer (gi tr t trc ph thuc vo thi gian ta yu cu) . +) Ch Counter : m cc s kin xy ra chn Tn , mi khi c mt s kin xy ra chn Tn th gi tr trong thanh ghi TCNTn tng ln 1 n v cho n khi trn. C th m theo sn ln hoc sn xung ty vo vic bn set thanh ghi TCCRn.

    +) To xung iu rng PWM : To ra xung c rng thay i ty , rt c ngha trong iu khin ng c. Ty vo vic bn set gi tr cho thanh ghi OCR m bn s c rng xung PWM nh mong mun. Trong ch Fast PWM, 1 chu k c tnh trong 1 ln m t BOTTOM ln TOP (single-slope), v th m ch ny gi l Fast PWM (PWM nhanh). C tt c 5 mode trong Fast PWM tng ng vi 5 cch chn gi tr TOP khc nhau (tham kho bng 3). Vic xc lp ch hot ng cho Fast PWM thc hin thng qua 4 bit WGM v cc bit chn dng xung ng ra, Compare Output Mode trong thanh ghi TCCR1A, nhn li 2 thanh ghi TCCR1A v TCCR1B.

    Ch cc bit COM1A1, COM1A0 v COM1B1, COM1B0 l cc bit chn dng tn hiu ra ca PWM (Compare Output Mode bits). COM1A1, COM1A0

    dng cho knh A v COM1B1, COM1B0 dng cho knh B. Hy i chiu bng 4.

    Bng 4: m t cc bit COM trong ch fast PWM.

    Ti s gii thch hot ng ca Fast PWM knh A thng qua 1 trng hp c th, mode 14 (WGM13=1, WGM12=1, WGM11=1, WGM10=0). Trong mode 14, gi tr TOP (cng l chu k ca PWM) c cha trong thanh ghi ICR1, khi hot

  • 107

    ng thanh ghi TCNT1 tng gi tr t 0, gi s cc bit ph COM1A=1, COM1A0=0, lc ny trng thi ca chn OC1A (chn 15) l HIGH (5V), khi TCNT1 tng n bng gi tr ca thanh ghi OCR1A th chn OC1A c xa v mc LOW (0V), thanh ghi m TCNT1 vn tip tc tng n khi no n bng gi tr TOP cha trong thanh ghi ICR1 th TCNT1 t ng reset v 0 v chn OC1A tr v trng thi HIGH, ci ny gi l Clear OC1A/OC1B on Compare Match, set OC1A/OC1B at TOP m bn thy trong hng 4 bng 4. Hnh 10 m t cch to xung PWM trn chn OC1A mode 14.

    Hnh 10: Fast PMW mode 14.

    R rng chng ta c th iu khin c time period v duty cycle ca PWM bng 2 thanh ghi ICR1 v OCR1A. Thng thng gi tr ca ICR1 c tnh ton v gn c nh, gi tr ca OCR1A c thay i thc hin mc ch iu khin (nh thay i vn tc ng c). Ch l nu chng ta set cc bit ph ngc li: COM1A=0, COM1A0=1, th tn hiu PWM trn chn OC1A s c phn LOW t 0 n OCR1A v HIGH t OCR1A n ICR1, y gi l set OC1A/OC1B on Compare Match, clear OC1A/OC1B at TOP (ngc vi tn hiu trn hnh 10). Hot ng ca fast PWM knh B hon ton tng t, trong thanh ghi ICR1 cng cha TOP ca PWM knh B v thanh ghi ICR1B cha duty cycle. Nh vy 2 knh A v B c cng tn s hay Time period v duty cycle c iu khin c lp. Chn xut tn hiu PWM ca knh B l chn OC1B (chn 16 trn Atmega8).

    Cc mode 5, 6 v 7 ca Fast PWM hot ng hon ton tng t mode 14. im khc nhau c bn l gi tr TOP(Time period). Trong cc mode ny gi tr TOP khng do thanh thi ICR1 nh ngha m l cc hng s khng i. Vi mode 5, tc mode 8 bits, (WGM13=0, WGM12=1, WGM11=0, WGM10=1) gi tr TOP l 1 hng s, TOP = 255 (s 8 bits ln nht). Vi mode 6, tc mode 9 bits, (WGM13=0, WGM12=1, WGM11=1, WGM10=0) gi tr TOP l 1 hng s, TOP = 511 (s 9 bits ln nht). V vi mode 7, tc mode 10 bits, (WGM13=0, WGM12=1, WGM11=1, WGM10=1) TOP =1023 (s 10 bits ln nht). Mode 15 cng l Fast PWM trong TOP do OCR1A quy nh, v th m tn hiu ra knh A hu nh khng phi l 1 xung, n ch thay i trng thi trong 1 clock. Theo ti, s dng Fast PWM bn nn dng mode 14 c gii thch trn. Cc mode 5, 6, 7 cng c th dng nhng khng nn dng mode 15.

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    2. V d minh ha

    V d sau s s dng timer o mc logic ti port A, ch hot ng ca timer l ch n gin nht, chng ta s dng timer 1

    quan st gi tr logic ti port A, chng ta mc vo 8 led n.

    Chng trnh

    Bi tp Bi 1 : Bn hy tnh ton xem vi cu hnh timer nh trn th sau bao lu

    PORT A o gi tr mt ln.

    Bi 2 : Vit chng trnh tr n(ms) s dng timer.

    Li gii :

    Bi 1: Nh trn bn thy, c sau mt ln Timer1 trn th PORTA o gi tr mt

    ln; gi tr t trc ca Timer1 l 0x00; v Prescale =64, vy c sau mt khong

    thi gian t= (64.216 )/(4.106) = 1.048576 (s).

  • 109

    Lu trn ta ly tn s ca chip 4.106(Hz).

    Bi 2 : vit chng trnh tr n(ms)c rt nhiu cch v cch vit tng qut nht l dng ngt timer ( c th tr vi thi gian bt k ),nhng vi gii hn ms th ch cn dng trong phm vi thi gian trn ca Timer1 th bn cng c th dng thoi mi : #include

    void main(void)

    { TCCR1=0x05; Prescale=1024

    TCNT1= 1- (4.106/1024).n.10

    -3 ;// vi n l khong thi gian cn tr n(ms)

    while(TCNT165500) // neu tiep tuc dung Timer 1 thi ta dung doan nay, neu khong thi bo qua

    {

    TCNT1= 1- (4.106/1024).n.10

    -3 ;

    } */

    }

    Bi 3 : Bn hy dng ngt Timer nh thi n(s).

    Va ri l v d v ch dnh thi ca Timer, sau y chng ta s lm mt v d hiu r hn v ch Counter ( T v d ny bn c th ng dng m tc ng c , tt nhin bn phi tm hiu mt cht v ng c v encoder c th tnh chnh xc tc ca n ). V phn to xung PWM theo mnh th bn nn tm hiu sau khi n vi bi iu khin ng c mt chiu, v hiu r hn bn c th tham kho cch to xung PWM trong phn bi tp m rng cui gio trnh.

    M t v d v Counter : C mi ln phm c nhn th gi tr counter tng ln 1 n v v hin th ra LED 7 segment, khi gi tr counter qu 20 th reset b m (y ch l mt v d ti ngh ra, bn c th lm v vn v d vi counter):

    #include

    unsigned char code[]={0x01,0x4F,0x12,0x06,0x4C,0x24,0x20,0x0F,0x00,0x04} ;

    void HienThi (unsigned int n) // n bat ki, trong vi du nay ta su dung n la mot so co 4 chu so

    { unsigned int a[4];

    unsigned char i,j;

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    a[1]=((n%1000)%100)/10;a[0]=((n%1000)%100)%10;

    for (i=0;ij)&(0x01);

    PORTC.2=1; PORTC.2=0;

    }

    PORTC.3=1; PORTC.3=0;

    }

    void main(void)

    {

    DDRC=0xFF; // PORTC la cong ra

    DDRB=0x00; // PORTB la cong vao PORTB=0xFF;

    TCCR0=0x06; // dem theo suon xuong

    TCNT0=0;

    while (1)

    { if(TCNT0>20) TCNT0=0;

    HienThi(TCNT0);

    };

    }

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    BI 14 : NGT

    - Gii thiu v ngt

    - Cch cu hnh cho ngt trong Atmega32.

    - V d minh ha vi ngt ngoi

    - V d minh ha vi ngt timer

    1. Gii thiu v ngt

    Ging vi timer, ngt cng l 1 trong nhng module rt quan trng ca vi iu khin, s dng ngt s gip chng ta khng phi mt thi gian kim tra lin tc 1 on chng trnh no , ngoi ra, chng ta c th s dng ngt ng thi cho vi iu khin cng 1 lc lm nhiu nhim v.

    Chng ta cng hnh dung 1 v d n gin v ngt nh sau : Mi gia nh u c 1 ci chung ca, ci chung ca ng vai tr nh 1

    ngt, mi khi c ai bm chung (xy ra ngt), chng ta xung m ca cho ngi vo. Nu nh khng c chung ca, chng ta phi lin tc kim tra xem c ai cng hay khng m ca, lm nh th s mt thi gian hn rt nhiu.

    Mt chng trnh ngt cng ging nh 1 chng trnh con, khi iu kin xy ra ngt tha mn, vi iu khin s tm dng chng trnh ang thc hin nhy ti chng trnh ngt, sau khi thc hin xong chng trnh ngt, vi iu khin li tip tc thc hin cng vic m trc n ang lm.

    im khc bit gia chng trnh ngt v chng trnh con l chng trnh ngt khng c i s truyn vo v khng c php gi (call) t 1 chng trnh chnh hay 1 chng trnh con khc.

    Vi iu khin Atmega32 c rt nhiu loi ngt, c th tng loi, chng ta c th tham kho trong datasheet. Trong bi hc ny, chng ta ch xem xt 2 loi ngt l ngt ngoi v ngt timer.

    Ngt ngoi Trong Atmega32 c 3 ngt ngoi l INT0, INT1, INT2. Cc ngt ny c cu hnh bi 2 thanh ghi MCUCR v MCUCSR

    Thanh ghi MCUCR

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    ISCx0 ISCx1 M t

    0 0 Ngt INTx xy ra khi chn INTx mc thp

    0 1 Ngt INTx xy ra khi c thay i mc logic chn INTx

    1 0 Ngt theo sn xung

    1 1 Ngt theo sn ln

    Thanh ghi MCUCSR

    ISC2 M t

    0 Ngt theo sn xung

    1 Ngt theo sn ln

    Thanh ghi cho php ngt GICR :

    Cc bit INT0, INT1, INT2 c dng enable cc ngt tng ng, khi cc bit ny c set ln 1, cc ngt tng ng s c enable.

    Ngt timer Ngt timer xy ra khi trn timer hoc khi gi tr trong timer t ti mt gi tr t trc. Cu hnh timer cc bn c th tham kho bi timer, cu hnh ngt cho timer, chng ta s dng thanh ghi TIMSK :

    TOIE0 : Bit ny t ch ngt cho timer 0, nu